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target/alpha: fix tlb_fill trap_arg2 value for instruction fetch 

Commit e41c945297 ("target/alpha: Convert to CPUClass::tlb_fill")
slightly changed the way the trap_arg2 value is computed in case of TLB
fill. The type of the variable used in the ternary operator has been
changed from an int to an enum. This causes the -1 value to not be
sign-extended to 64-bit in case of an instruction fetch. The trap_arg2
ends up with 0xffffffff instead of 0xffffffffffffffff. Fix that by
changing the -1 into -1LL.

This fixes the execution of user space processes in qemu-system-alpha.

Fixes: e41c945297
Cc: qemu-stable@nongnu.org
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
[rth: Test MMU_DATA_LOAD and MMU_DATA_STORE instead of implying them.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
stable-4.2
Aurelien Jarno 2019-08-22 10:45:14 -07:00 committed by Richard Henderson
parent 586f3dced9
commit cb1de55a83
1 changed files with 3 additions and 1 deletions
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4
target/alpha/helper.c
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@ -283,7 +283,9 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
cs->exception_index = EXCP_MMFAULT;
env->trap_arg0 = addr;
env->trap_arg1 = fail;
env->trap_arg2 = (access_type == MMU_INST_FETCH ? -1 : access_type);
env->trap_arg2 = (access_type == MMU_DATA_LOAD ? 0ull :
access_type == MMU_DATA_STORE ? 1ull :
/* access_type == MMU_INST_FETCH */ -1ull);
cpu_loop_exit_restore(cs, retaddr);
}