target-arm: Fix lpae bit in FSR on an alignment fault
If an alignment fault occurred and target EL is using AArch32, then DFSR/IFSR bit LPAE[9] must be set correctly. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Message-id: 1471283293-169850-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
c2da8a8b90
commit
e0fe723c24
|
@ -194,7 +194,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
|
||||||
* the LPAE long descriptor format, or the short descriptor format
|
* the LPAE long descriptor format, or the short descriptor format
|
||||||
*/
|
*/
|
||||||
if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
|
if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
|
||||||
env->exception.fsr = 0x21;
|
env->exception.fsr = (1 << 9) | 0x21;
|
||||||
} else {
|
} else {
|
||||||
env->exception.fsr = 0x1;
|
env->exception.fsr = 0x1;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue