target/ppc: Put LPCR[GTSE] in hflags
Because this bit was not in hflags, the privilege check for tlb instructions was essentially random. Recompute hflags when storing to LPCR. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210323184340.619757-7-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
parent
f43520e5b2
commit
f03de3b44b
|
@ -596,6 +596,7 @@ enum {
|
|||
HFLAGS_LE = 0, /* MSR_LE -- comes from elsewhere on 601 */
|
||||
HFLAGS_HV = 1, /* computed from MSR_HV and other state */
|
||||
HFLAGS_64 = 2, /* computed from MSR_CE and MSR_SF */
|
||||
HFLAGS_GTSE = 3, /* computed from SPR_LPCR[GTSE] */
|
||||
HFLAGS_DR = 4, /* MSR_DR */
|
||||
HFLAGS_IR = 5, /* MSR_IR */
|
||||
HFLAGS_SPE = 6, /* from MSR_SPE if cpu has SPE; avoid overlap w/ MSR_VR */
|
||||
|
|
|
@ -149,6 +149,9 @@ void hreg_compute_hflags(CPUPPCState *env)
|
|||
if ((ppc_flags & POWERPC_FLAG_TM) && (msr & (1ull << MSR_TM))) {
|
||||
hflags |= 1 << HFLAGS_TM;
|
||||
}
|
||||
if (env->spr[SPR_LPCR] & LPCR_GTSE) {
|
||||
hflags |= 1 << HFLAGS_GTSE;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_USER_ONLY
|
||||
if (!env->has_hv_mode || (msr & (1ull << MSR_HV))) {
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
#include "exec/log.h"
|
||||
#include "hw/hw.h"
|
||||
#include "mmu-book3s-v3.h"
|
||||
#include "helper_regs.h"
|
||||
|
||||
/* #define DEBUG_SLB */
|
||||
|
||||
|
@ -1125,6 +1126,8 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
|
|||
CPUPPCState *env = &cpu->env;
|
||||
|
||||
env->spr[SPR_LPCR] = val & pcc->lpcr_mask;
|
||||
/* The gtse bit affects hflags */
|
||||
hreg_compute_hflags(env);
|
||||
}
|
||||
|
||||
void helper_store_lpcr(CPUPPCState *env, target_ulong val)
|
||||
|
|
|
@ -7908,7 +7908,7 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
|
|||
ctx->altivec_enabled = (hflags >> HFLAGS_VR) & 1;
|
||||
ctx->vsx_enabled = (hflags >> HFLAGS_VSX) & 1;
|
||||
ctx->tm_enabled = (hflags >> HFLAGS_TM) & 1;
|
||||
ctx->gtse = !!(env->spr[SPR_LPCR] & LPCR_GTSE);
|
||||
ctx->gtse = (hflags >> HFLAGS_GTSE) & 1;
|
||||
|
||||
ctx->singlestep_enabled = 0;
|
||||
if ((hflags >> HFLAGS_SE) & 1) {
|
||||
|
|
Loading…
Reference in a new issue