haraldwolff/qemu-patch-raspberry4
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Author SHA1 Message Date
Richard Henderson 0b4232f108 target-tilegx: Implement table index instructions 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:03:14 +11:00
Richard Henderson ba1fc78f65 target-tilegx: Implement crc instructions 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:03:14 +11:00
Chen Gang 38c949ffe7 target-tilegx: Implement v1multu instruction 
Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1442874414-3578-1-git-send-email-gang.chen.5i5j@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:03:14 +11:00
Chen Gang c6876d7e1c target-tilegx: Implement v*add and v*sub instructions 
[rth: Implement everything inline; handle v1addi and v2addi as well.]

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Message-Id: <1442873918-3394-1-git-send-email-gang.chen.5i5j@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:03:14 +11:00
Chen Gang 0ab0a3d768 target-tilegx: Implement v*shl, v*shru, and v*shrs instructions 
v2sh* are implemented with helper functions; v4sh* are implmeneted
with inline code.

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Message-Id: <1442872055-2836-1-git-send-email-gang.chen.5i5j@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:03:13 +11:00
Richard Henderson 461aa6783e target-tilegx: Handle v1shl, v1shru, v1shrs 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:34 -07:00
Richard Henderson 3be19e8c83 target-tilegx: Handle v1shli, v1shrui 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:34 -07:00
Richard Henderson 5151c69abc target-tilegx: Handle v4int_l/h 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:34 -07:00
Richard Henderson 0583b23323 target-tilegx: Handle atomic instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:34 -07:00
Richard Henderson 03b217b168 target-tilegx: Handle mtspr, mfspr 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson e7346cf036 target-tilegx: Handle v1cmpeq, v1cmpne 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 661ff7431f target-tilegx: Handle mask instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 4ff49775ec target-tilegx: Handle scalar multiply instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson f090f9f7ce target-tilegx: Handle conditional move instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 2369976deb target-tilegx: Handle shift instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson c06b181729 target-tilegx: Handle bitfield instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson d5dbd6eb38 target-tilegx: Implement system and memory management instructions 
Most of which are either nops or exceptions.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 73c543776b target-tilegx: Handle comparison instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson e04e98bf27 target-tilegx: Handle conditional branch instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson c230a9944d target-tilegx: Handle unconditional jump instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 01cd675cfe target-tilegx: Handle post-increment load and store instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 0426335d4f target-tilegx: Handle basic load and store instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 7f41a8d672 target-tilegx: Handle most bit manipulation instructions 
The crc instructions are omitted from this set.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 89b8c7504f target-tilegx: Handle arithmetic instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson a9fdfc7e7b target-tilegx: Handle simple logical operations 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:32 -07:00
Richard Henderson 8fd29dd72b target-tilegx: Framework for decoding bundles 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:41:36 -07:00