haraldwolff/qemu-patch-raspberry4
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity
41371 commits 38 branches 310 tags 420 MiB
Commit graph

25 commits

Author SHA1 Message Date
Richard Henderson 190ce7fbc7 tcg: Add TCG_MAX_INSNS 
Adjust all translators to respect it.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:36:50 +11:00
Richard Henderson 959082fc4a target-*: Increment num_insns immediately after tcg_gen_insn_start 
This does tidy the icount test common to all targets.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:36:27 +11:00
Richard Henderson 667b8e29c5 target-*: Unconditionally emit tcg_gen_insn_start 
While we're at it, emit the opcode adjacent to where we currently
record data for search_pc.  This puts gen_io_start et al on the
"correct" side of the marker.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:36:27 +11:00
Richard Henderson 765b842ade tcg: Rename debug_insn_start to insn_start 
With an eye toward making it mandatory.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-10-07 20:36:26 +11:00
Richard Henderson 461aa6783e target-tilegx: Handle v1shl, v1shru, v1shrs 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:34 -07:00
Richard Henderson 3be19e8c83 target-tilegx: Handle v1shli, v1shrui 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:34 -07:00
Richard Henderson 5151c69abc target-tilegx: Handle v4int_l/h 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:34 -07:00
Richard Henderson 0583b23323 target-tilegx: Handle atomic instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:34 -07:00
Richard Henderson 03b217b168 target-tilegx: Handle mtspr, mfspr 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson e7346cf036 target-tilegx: Handle v1cmpeq, v1cmpne 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 661ff7431f target-tilegx: Handle mask instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 4ff49775ec target-tilegx: Handle scalar multiply instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson f090f9f7ce target-tilegx: Handle conditional move instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 2369976deb target-tilegx: Handle shift instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson c06b181729 target-tilegx: Handle bitfield instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson d5dbd6eb38 target-tilegx: Implement system and memory management instructions 
Most of which are either nops or exceptions.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 73c543776b target-tilegx: Handle comparison instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson e04e98bf27 target-tilegx: Handle conditional branch instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson c230a9944d target-tilegx: Handle unconditional jump instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 01cd675cfe target-tilegx: Handle post-increment load and store instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 0426335d4f target-tilegx: Handle basic load and store instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 7f41a8d672 target-tilegx: Handle most bit manipulation instructions 
The crc instructions are omitted from this set.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson 89b8c7504f target-tilegx: Handle arithmetic instructions 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:33 -07:00
Richard Henderson a9fdfc7e7b target-tilegx: Handle simple logical operations 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:45:32 -07:00
Richard Henderson 8fd29dd72b target-tilegx: Framework for decoding bundles 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2015-09-15 07:41:36 -07:00