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19458 commits

Author SHA1 Message Date
Blue Swirl 2050396801 Use uintptr_t for various op related functions
Use uintptr_t instead of void * or unsigned long in
several op related functions, env->mem_io_pc and
GETPC() macro.

Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14 14:23:37 +00:00
Peter Maydell d1b719e98c coroutine-gthread.c: Avoid threading APIs deprecated in GLib 2.31
The GLib threading APIs were revamped in GLib 2.31 and a number
of the old interfaces were deprecated, which means they provoke
compilation warnings (errors if -Werror) now. Add support for the
new interfaces while retaining the old ones so we can still compile
on older versions of GLib too.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14 10:59:14 +00:00
Blue Swirl 044c62aaf2 Merge branch 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensa
* 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensa:
  target-xtensa: Start QOM'ifying CPU init
  target-xtensa: QOM'ify CPU reset
  target-xtensa: QOM'ify CPU
  target-xtensa: improve unit tests debugging
  target-xtensa: Move helpers.h to helper.h
2012-04-14 10:56:04 +00:00
Blue Swirl e92861ccb1 Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  hw/arm_gic: Remove stray hardcoded tab
  hw/arm_gic: gic_set_pending_private() is NVIC only
  hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define
  hw/arm_gic: Make gic_reset a sysbus reset function
  hw/arm11mpcore: Convert to using sysbus GIC device
  hw/exynos4210_gic: Convert to using sysbus GIC
  hw/realview_gic: switch to sysbus GIC
  hw/a9mpcore: Switch to using sysbus GIC
  hw/a15mpcore: switch to using sysbus GIC
  hw/arm_gic: Make the GIC its own sysbus device
  hw/arm_gic: Expose PPI inputs as gpio inputs
  hw/arm_gic: Move gic_get_current_cpu into arm_gic.c
  hw/arm_gic: Move NCPU definition to arm_gic.c
  hw/exynos4210_combiner.c: Drop excessive read/write access check.
  ARM: Exynos4210: Drop gic_cpu_write() after initialization.
  Fix bit test in Exynos4210 UART emulation to use & instead of &&
2012-04-14 10:55:00 +00:00
Andreas Färber e554bbc689 target-xtensa: Start QOM'ifying CPU init
Move XtensaConfig-independent code from cpu_xtensa_init() into a
QOM initfn, as a start.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-04-14 03:48:08 +04:00
Andreas Färber 5087a72cb3 target-xtensa: QOM'ify CPU reset
Move code from cpu_state_reset() into QOM xtensa_cpu_reset().
To avoid moving reset_mmu() and dependencies, make it non-static.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-04-14 03:48:08 +04:00
Andreas Färber a4633e16d7 target-xtensa: QOM'ify CPU
Embed CPUXtensaState as first member of XtensaCPU.
Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-04-14 03:48:08 +04:00
Max Filippov 7d6b9f0a38 target-xtensa: improve unit tests debugging
- add testcase announcement;
- add global symbols for individual tests;
- add host-debug-* makefile target.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-04-14 03:48:08 +04:00
Lluís Vilanova 16c1deae21 target-xtensa: Move helpers.h to helper.h
Provides a file naming scheme consistent with other targets.

Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-04-14 03:48:08 +04:00
Anthony Liguori 7672725d41 Merge remote-tracking branch 'stefanha/trivial-patches' into staging
* stefanha/trivial-patches:
  configure: Insist on a Python 2, not Python 3
  bsd-user: fix compile failure
  ps2: avoid repeated header file includes
  make: Always set LC_ALL=C for makeinfo
  configure: Fix wrong preprocessor statement
  configure: Remove useless uses of ARCH_CFLAGS
2012-04-13 08:04:43 -05:00
Anthony Liguori 3cbe19b2e2 Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master:
  kvmclock: guest stop notification
  kvm: update linux headers
  kvm: set gsi_bits and max_gsi correctly
  kvm: Drop unused kvm_pit_in_kernel
  kvm: allow arbitrarily sized mmio ioeventfd
  kvm: Drop redundant kvm_enabled from cpu_thread_is_idle
  kvm: add flightrecorder script
2012-04-13 08:04:31 -05:00
Anthony Liguori a602e48958 Merge remote-tracking branch 'afaerber/qom-cpu-lm32.v3' into staging
* afaerber/qom-cpu-lm32.v3:
  target-lm32: QOM'ify CPU reset
  target-lm32: QOM'ify CPU init
  target-lm32: QOM'ify CPU
2012-04-13 08:04:13 -05:00
Peter Maydell c79981ceec hw/arm_gic: Remove stray hardcoded tab
Remove the single instance of a hardcoded tab from hw/arm_gic.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:04 +00:00
Peter Maydell b7dc1a597a hw/arm_gic: gic_set_pending_private() is NVIC only
The function gic_set_pending_private() is now used by the NVIC
only (for the GIC we now set PPI interrupts via gpio lines and
gic_set_irq()). So make it #ifdef NVIC and remove the 'attribute
unused' annotation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:04 +00:00
Peter Maydell 0d256bdc8f hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define
Now all the A profile cores have been switched to use the standalone
sysbus GIC, the only remaining code which #includes arm_gic.c is
the v7M NVIC. The coupling is much closer here so it's not so
easily disentangled. For now, add a comment about how arm_gic.c
is compiled, and assume that the NVIC always includes arm_gic.c
and the non-NVIC GIC is always compiled standalone.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:04 +00:00
Peter Maydell aecff6924d hw/arm_gic: Make gic_reset a sysbus reset function
Make gic_reset a sysbus reset function, so we actually
reset the GIC on system reset rather than only at init.
For the NVIC this requires us also to implement reset
of the SysTick.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:04 +00:00
Peter Maydell 2e9dfe20a6 hw/arm11mpcore: Convert to using sysbus GIC device
Convert arm11mpcore to using the standalone sysbus GIC device.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:04 +00:00
Peter Maydell 23b92f6028 hw/exynos4210_gic: Convert to using sysbus GIC
Convert the Exynos GIC code to use the standalone sysbus
GIC device.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13 12:29:03 +00:00
Peter Maydell fbbd05dc2a hw/realview_gic: switch to sysbus GIC
Switch the realview_gic device to the standalone sysbus GIC.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:03 +00:00
Peter Maydell ddd761653b hw/a9mpcore: Switch to using sysbus GIC
Switch the a9mpcore to using the sysbus GIC device rather
than having the a9mp private memory region device subclass
the GIC.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:03 +00:00
Peter Maydell 4637a02752 hw/a15mpcore: switch to using sysbus GIC
Switch the a15mpcore private peripheral region to using
the standalone sysbus GIC device.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:03 +00:00
Peter Maydell 496dbcd1a3 hw/arm_gic: Make the GIC its own sysbus device
Compile arm_gic.c as a standalone C file to produce a self contained
sysbus GIC device. Support the legacy usage by #include of the .c file
by making those users #define LEGACY_INCLUDED_GIC, so we can convert
them one by one.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13 11:39:07 +00:00
Peter Maydell 544d1afa70 hw/arm_gic: Expose PPI inputs as gpio inputs
Expose the Private Peripheral Interrupt inputs as GPIO inputs.
The layout of the GPIO array is thus:
  [0..N-1] SPIs
  [N..N+31] PPIs for CPU 0
  [N+32..N+63] PPIs for CPU 1
  ...

Treating PPIs as being another kind of input line is in line with the
GIC architecture specification, where they are clearly described that
way. The 11MPCore TRM is a bit more ambiguous, but there is no practical
difference between "set PPI X as pending" and "0->1 transition on a
PPI input line configured as edge triggered", and PPIs are always
edge triggered, so this change won't affect behaviour.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 11:39:07 +00:00
Peter Maydell 926c4aff6e hw/arm_gic: Move gic_get_current_cpu into arm_gic.c
Move the gic_get_current_cpu() function into arm_gic.c.
There are only two implementations: (1) "get the index
of the currently executing CPU", used by all multicore
GICs, and (2) "always 0", used by all GICs instantiated
with a single CPU interface (the Realview board GIC and
the v7M NVIC). So we can move this into the main GIC
source file.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13 11:39:07 +00:00
Peter Maydell 386e29554e hw/arm_gic: Move NCPU definition to arm_gic.c
Move the NCPU definition to arm_gic.c: the maximum number
of CPU interfaces is defined by the GIC architecture specification
to be 8, so we don't need to have this #define in each of the
sources files which currently includes arm_gic.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13 11:39:07 +00:00
Evgeny Voevodin 5181b50fc8 hw/exynos4210_combiner.c: Drop excessive read/write access check.
Access to reserved area at offset higher than 0x3c is allowed in
External Combiner. Samsung Galaxy Kernel implements this. So, drop
excessive checks in read/write functions.

Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 11:39:06 +00:00
Evgeny Voevodin 3f088e36de ARM: Exynos4210: Drop gic_cpu_write() after initialization.
Remove gic_cpu_write() call after initialization that was emulating
functionality of earliest SOC bootloader which enables external
GIC CPU1 interface. Instead introduce Exynos4210-specific secondary
CPU bootloader, which enables both Internal and External GIC CPU1
interfaces.

Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 11:39:06 +00:00
Daniel P. Berrange b85f62d781 Fix bit test in Exynos4210 UART emulation to use & instead of &&
* hw/exynos4210_uart.c: s/&&/&/

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 11:39:06 +00:00
Peter Maydell 6ccea1e4d9 configure: Insist on a Python 2, not Python 3
Our Python scripts require Python 2 and will fail on Python 3, eg:
  File "/home/petmay01/linaro/qemu-from-laptop/qemu/scripts/qapi-commands.py", line 378
      except getopt.GetoptError, err:
                               ^
  SyntaxError: invalid syntax

Add a check to configure that Python is not a Python 3, so we can
fail with a comprehensible error rather than an obscure one.

Reported-by: Boris Matti <swiftos@lavabit.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-13 10:01:35 +01:00
Peter Maydell d6ef40bf18 bsd-user: fix compile failure
bsd-user doesn't actually support reserving a memory area for the
guest address space, but we need to at least define the reserved_va
global so that cpu-all.h's RESERVED_VA macro will work correctly.

This fixes a compilation error introduced in commit 39879bb
which added a use of RESERVED_VA to h2g_valid().

Reported-by: Brad Smith <brad@comstyle.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-13 09:57:36 +01:00
Eric B Munson f349c12c04 kvmclock: guest stop notification
Often when a guest is stopped from the qemu console, it will report spurious
soft lockup warnings on resume.  There are kernel patches being discussed that
will give the host the ability to tell the guest that it is being stopped and
should ignore the soft lockup warning that generates.  This patch uses the qemu
Notifier system to tell the guest it is about to be stopped.

Signed-off-by: Eric B Munson <emunson@mgebm.net>
Signed-off-by: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-04-12 19:01:42 -03:00
Marcelo Tosatti 9ab2195dcb kvm: update linux headers
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-04-12 19:01:42 -03:00
Jason Baron bc8c6788b6 kvm: set gsi_bits and max_gsi correctly
The current kvm_init_irq_routing() doesn't set up the used_gsi_bitmap
correctly, and as a consequence pins max_gsi to 32 when it really
should be 1024. I ran into this limitation while testing pci
passthrough, where I consistently got an -ENOSPC return from
kvm_get_irq_route_gsi() called from assigned_dev_update_msix_mmio().

Signed-off-by: Jason Baron <jbaron@redhat.com>
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-04-12 19:01:42 -03:00
Jan Kiszka c73b00973b kvm: Drop unused kvm_pit_in_kernel
This is now implied by kvm_irqchip_in_kernel.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-04-12 19:01:41 -03:00
Michael S. Tsirkin 4b8f1c88e9 kvm: allow arbitrarily sized mmio ioeventfd
We use a 2 byte ioeventfd for virtio memory,
add support for this.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Amos Kong <akong@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-04-12 19:01:41 -03:00
Jan Kiszka 56b9ead234 kvm: Drop redundant kvm_enabled from cpu_thread_is_idle
This is now implied by kvm_irqchip_in_kernel.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-04-12 19:01:41 -03:00
Stefan Hajnoczi b3c09bde48 kvm: add flightrecorder script
The kvm kernel module includes a number of trace events which can be
useful when debugging system behavior.  Even on production systems these
trace events can be used to observe guest behavior and identify the
source of problems.

The kvm_flightrecorder script is a command-line wrapper for the
/sys/kernel/debug/tracing interface.  Kernel symbols do not need to be
installed.

This script captures a fixed-size buffer of KVM trace events.  Recent
events overwrite the oldest events when the buffer size is exceeded and
it is possible to leave KVM tracing enabled for any period of time with
just a fixed-size buffer.  If the buffer is large enough this script is
a useful tool for collecting detailed information after an issue occurs
with a guest.  Hence the name "flight recorder".

The script can also be used in 'tail' mode to simply view KVM trace
events as they occur.  This is handy for development and to ensure that
the guest is indeed running.

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-04-12 19:01:41 -03:00
Wanpeng Li fd65f595fe ps2: avoid repeated header file includes
Signed-off-by: Wanpeng Li <liwp@linux.vnet.ibm.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-12 11:14:29 +01:00
Stefan Weil 952ef67cc0 make: Always set LC_ALL=C for makeinfo
Otherwise the generated file qemu-doc.html will contain "Anhang"
instead of "Appendix" with a German locale (de_DE.UTF-8).

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-12 11:14:21 +01:00
Stefan Weil e172fe1177 configure: Fix wrong preprocessor statement
#abort is not a preprocessor statement. It aborts, but the preprocessor
statement #error is more common to abort a compilation.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-12 09:51:54 +01:00
Peter Maydell 8fb0315165 configure: Remove useless uses of ARCH_CFLAGS
Remove some useless uses of ARCH_CFLAGS -- this variable was never set
so will always be empty. The uses were accidental: in commit 0c439cbf8
Juan Quintela removed ARCH_CFLAGS in favour of CFLAGS (which in turn
became QEMU_CFLAGS). However in commit be17dc90 a use of it was
reintroduced (apparently accidentally) by Michael S. Tsirkin, and then
I subsequently cut-n-pasted that into a number of other configure
feature tests.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-12 09:51:54 +01:00
Peter A. G. Crosthwaite dadc1064c3 target-microblaze: added PetaLogix copyright
Microblaze cpu development has been driven and funded by PetaLogix. Added (c)
PetaLogix line accordingly.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-04-12 09:56:51 +02:00
Andreas Färber 3eab169085 target-lm32: QOM'ify CPU reset
Move code from cpu_state_reset() into QOM lm32_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
2012-04-12 01:08:04 +02:00
Andreas Färber 8d7d505add target-lm32: QOM'ify CPU init
Move code from cpu_lm32_init() to an initfn; call cpu_reset()
instead of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
2012-04-12 01:07:59 +02:00
Andreas Färber fc0ced2fbd target-lm32: QOM'ify CPU
Embed CPULM32State as first member of QOM LM32CPU.
Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
2012-04-12 01:07:41 +02:00
Stefan Hajnoczi 3e48dd4a2d rtl8139: do not assume TxStatus[] and TxAddr[] are adjacent
Commit afe0a59535 ("rtl8139: support byte
read to TxStatus registers") reused rtl8139_TxStatus_read() for reading
TxAddr registers.  It relies on the fact that TxStatus[] and TxAddr[]
are adjacent.

This causes a gcc warning because the compiler can detect that array
access is out-of-bounds:

  hw/rtl8139.c:2501:27: error: array subscript is above array bounds [-Werror=array-bounds]

This patch refactors the function so that we don't rely on out-of-bounds
accesses.

Cc: Jason Wang <jasonwang@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-11 12:30:01 -05:00
Andreas Färber c1958aea51 target-i386: QOM'ify CPU reset
Move code from cpu_state_reset() into QOM x86_cpu_reset(),
fixing style issues for FPU init.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00
Andreas Färber de024815e3 target-i386: QOM'ify CPU init
Move code from cpu_x86_init() to new QOM x86_cpu_initfn().
Also move mce_init() to cpu.c since it's used nowhere else.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00
Andreas Färber 5fd2087a1b target-i386: QOM'ify CPU
Embed CPUX86State as first member of X86CPU.
Distinguish between "x86_64-cpu" and "i386-cpu".
Drop cpu_x86_close() in favor of calling object_delete() directly.

For now let CPUClass::reset() call cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00
Andreas Färber 30471bc94e target-i386: Rename cpuid.c
Name it cpu.c to align with other QOM'ified targets.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00