Commit graph

26 commits

Author SHA1 Message Date
Peter Maydell 0d256bdc8f hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define
Now all the A profile cores have been switched to use the standalone
sysbus GIC, the only remaining code which #includes arm_gic.c is
the v7M NVIC. The coupling is much closer here so it's not so
easily disentangled. For now, add a comment about how arm_gic.c
is compiled, and assume that the NVIC always includes arm_gic.c
and the non-NVIC GIC is always compiled standalone.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:04 +00:00
Peter Maydell aecff6924d hw/arm_gic: Make gic_reset a sysbus reset function
Make gic_reset a sysbus reset function, so we actually
reset the GIC on system reset rather than only at init.
For the NVIC this requires us also to implement reset
of the SysTick.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-13 12:29:04 +00:00
Peter Maydell 496dbcd1a3 hw/arm_gic: Make the GIC its own sysbus device
Compile arm_gic.c as a standalone C file to produce a self contained
sysbus GIC device. Support the legacy usage by #include of the .c file
by making those users #define LEGACY_INCLUDED_GIC, so we can convert
them one by one.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13 11:39:07 +00:00
Peter Maydell 926c4aff6e hw/arm_gic: Move gic_get_current_cpu into arm_gic.c
Move the gic_get_current_cpu() function into arm_gic.c.
There are only two implementations: (1) "get the index
of the currently executing CPU", used by all multicore
GICs, and (2) "always 0", used by all GICs instantiated
with a single CPU interface (the Realview board GIC and
the v7M NVIC). So we can move this into the main GIC
source file.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13 11:39:07 +00:00
Peter Maydell 386e29554e hw/arm_gic: Move NCPU definition to arm_gic.c
Move the NCPU definition to arm_gic.c: the maximum number
of CPU interfaces is defined by the GIC architecture specification
to be 8, so we don't need to have this #define in each of the
sources files which currently includes arm_gic.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-13 11:39:07 +00:00
Andreas Färber 83f7d43a9e qom: Unify type registration
Replace device_init() with generalized type_init().

While at it, unify naming convention: type_init([$prefix_]register_types)
Also, type_init() is a function, so add preceding blank line where
necessary and don't put a semicolon after the closing brace.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: malc <av1474@comtv.ru>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-15 09:39:21 -06:00
Anthony Liguori 39bffca203 qdev: register all types natively through QEMU Object Model
This was done in a mostly automated fashion.  I did it in three steps and then
rebased it into a single step which avoids repeatedly touching every file in
the tree.

The first step was a sed-based addition of the parent type to the subclass
registration functions.

The second step was another sed-based removal of subclass registration functions
while also adding virtual functions from the base class into a class_init
function as appropriate.

Finally, a python script was used to convert the DeviceInfo structures and
qdev_register_subclass functions to TypeInfo structures, class_init functions,
and type_register_static calls.

We are almost fully converted to QOM after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:06 -06:00
Anthony Liguori 999e12bbe8 sysbus: apic: ioapic: convert to QEMU Object Model
This converts three devices because apic and ioapic are subclasses of sysbus.
Converting subclasses independently of their base class is prohibitively hard.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27 10:50:50 -06:00
Mark Langsdorf a32134aad8 arm: make the number of GIC interrupts configurable
Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
and create a configurable property for each defaulting to 96 and 64
(respectively) so that device modelers can set the value appropriately
for their SoC. Other ARM processors also set their maximum number of
used IRQs appropriately.

Set the maximum theoretical number of GIC interrupts to 1020 and
update the save/restore code to only use the appropriate number for
each SoC.

Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
[Peter Maydell: fixed minor whitespace snafu]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-17 10:54:07 +00:00
Avi Kivity 755c080225 arm_gic: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-22 10:20:10 -05:00
Matthew Fernandez 8e31bf388e Correct spelling of licensed
Correct typos of "licenced" to "licensed".

Reviewed-by: Stefan Weil <weil@mail.berlios.de>
Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de>
Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-23 11:26:12 -05:00
Juan Quintela 0797226c56 vmstate: port armv7m nvic
Signed-off-by: Juan Quintela <quintela@redhat.com>
2011-04-22 14:41:41 -05:00
Paolo Bonzini 7447545544 change all other clock references to use nanosecond resolution accessors
This was done with:

    sed -i 's/qemu_get_clock\>/qemu_get_clock_ns/' \
        $(git grep -l 'qemu_get_clock\>' )
    sed -i 's/qemu_new_timer\>/qemu_new_timer_ns/' \
        $(git grep -l 'qemu_new_timer\>' )

after checking that get_clock and new_timer never occur twice
on the same line.  There were no missed occurrences; however, even
if there had been, they would have been caught by the compiler.

There was exactly one false positive in qemu_run_timers:

     -    current_time = qemu_get_clock (clock);
     +    current_time = qemu_get_clock_ns (clock);

which is of course not in this patch.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2011-03-21 09:23:23 +01:00
Alex Williamson 0be71e324f savevm: Add DeviceState param
When available, we'd like to be able to access the DeviceState
when registering a savevm.  For buses with a get_dev_path()
function, this will allow us to create more unique savevm
id strings.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-07-06 10:36:28 -05:00
Blue Swirl ace22f6917 Fix missing '|' in '|=', spotted by clang analyzer
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-02 18:38:10 +00:00
Gerd Hoffmann 81a322d4a1 qdev: add return value to init() callbacks.
Sorry folks, but it has to be.  One more of these invasive qdev patches.

We have a serious design bug in the qdev interface:  device init
callbacks can't signal failure because the init() callback has no
return value.  This patch fixes it.

We have already one case in-tree where this is needed:
Try -device virtio-blk-pci (without drive= specified) and watch qemu
segfault.  This patch fixes it.

With usb+scsi being converted to qdev we'll get more devices where the
init callback can fail for various reasons.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27 20:43:28 -05:00
Paul Brook bdb11366b9 Remove ARM NVIC initialization hack
The ARMv7-M NVIC device pokes itself into the CPU state.  Now we have a
proper device model we can have the CPU/SoC code do this.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-06-04 13:12:05 +01:00
Paul Brook fe7e8758d0 ARM GIC qdev conversion
Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-14 22:35:08 +01:00
Paul Brook 2ac711791b Replace cpu_abort with hw_error
Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-08 02:35:15 +01:00
blueswir1 7ee930d031 Fix warnings that would be caused by ld flag --warn-common
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5240 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-17 19:04:14 +00:00
blueswir1 79383c9c08 Fix some warnings that would be generated by gcc -Wredundant-decls
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:51:20 +00:00
pbrook 23e3929403 Save/restore for stellaris boards.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4824 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-02 16:48:32 +00:00
pbrook eea589cc22 Stellaris ethernet support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3728 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-24 03:13:04 +00:00
pbrook e57ec0168c ARMv7-M SysTick fix.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3727 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-24 03:09:07 +00:00
pbrook 87ecb68bdf Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 17:14:51 +00:00
pbrook 9ee6e8bb85 ARMv7 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 00:04:49 +00:00