haraldwolff/qemu-patch-raspberry4
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Author SHA1 Message Date
Richard Henderson fbb96c4b7f target-openrisc: Use cpu_exec_interrupt qom hook 
Cc: Jia Liu <proljc@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Tested-by: Jia Liu <proljc@gmail.com>
Message-id: 1410626734-3804-17-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-09-25 18:54:22 +01:00
Andreas Färber 00c8cb0a36 cputlb: Change tlb_flush() argument to CPUState 
Signed-off-by: Andreas Färber <afaerber@suse.de>
 2014-03-13 19:52:47 +01:00
Andreas Färber a47dddd734 exec: Change cpu_abort() argument to CPUState 
Signed-off-by: Andreas Färber <afaerber@suse.de>
 2014-03-13 19:52:28 +01:00
Andreas Färber 27103424c4 cpu: Move exception_index field from CPU_COMMON to CPUState 
Signed-off-by: Andreas Färber <afaerber@suse.de>
 2014-03-13 19:20:46 +01:00
Sebastian Macke ae52bd96ce target-openrisc: Correct wrong epcr register in interrupt handler 
This patch corrects several misbehaviors during an interrupt process.
Most of the time the pc is already correct and therefore no special treatment
of the exceptions is necessary.

Tested by checking crashing programs which otherwise work in or1ksim.

Signed-off-by: Sebastian Macke <sebastian@macke.de>
Reviewed-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Jia Liu <proljc@gmail.com>
 2013-11-20 21:45:42 +08:00
Andreas Färber 97a8ea5a3a cpu: Replace do_interrupt() by CPUClass::do_interrupt method 
This removes a global per-target function and thus takes us one step
closer to compiling multiple targets into one executable.

It will also allow to override the interrupt handling for certain CPU
families.

Signed-off-by: Andreas Färber <afaerber@suse.de>
 2013-03-12 10:35:55 +01:00
Paolo Bonzini 1de7afc984 misc: move include files to include/qemu/ 
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
 2012-12-19 08:32:39 +01:00
Paolo Bonzini 022c62cbbc exec: move include files to include/exec/ 
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
 2012-12-19 08:31:31 +01:00
Jia Liu b6a71ef7e0 target-or32: Add interrupt support 
Add OpenRISC interrupt support.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:12:57 +00:00
Jia Liu e67db06e9f target-or32: Add target stubs and QOM cpu 
Add OpenRISC target stubs, QOM cpu and basic machine.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2012-07-27 21:12:55 +00:00