Commit graph

90879 commits

Author SHA1 Message Date
Richard Henderson 76e366e728 tcg: Canonicalize alignment flags in MemOp
Having observed e.g. al8+leq in dumps, canonicalize to al+leq.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 09:14:35 -07:00
Richard Henderson d2ba802657 tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h
These functions have been replaced by cpu_*_mmu as the
most proper interface to use from target code.

Hide these declarations from code that should not use them.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:46:42 -07:00
Richard Henderson 1a2eaf9e38 target/arm: Use cpu_*_mmu instead of helper_*_mmu
The helper_*_mmu functions were the only thing available
when this code was written.  This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.

Cc: qemu-arm@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:46:11 -07:00
Richard Henderson a8f84958d0 target/sparc: Use cpu_*_mmu instead of helper_*_mmu
The helper_*_mmu functions were the only thing available
when this code was written.  This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:45:13 -07:00
Richard Henderson bfe5b847af target/s390x: Use cpu_*_mmu instead of helper_*_mmu
The helper_*_mmu functions were the only thing available
when this code was written.  This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.

Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:44:36 -07:00
Richard Henderson 68ad9260e0 target/mips: Use 8-byte memory ops for msa load/store
Rather than use 4-16 separate operations, use 2 operations
plus some byte reordering as necessary.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:42:49 -07:00
Richard Henderson 948f88661c target/mips: Use cpu_*_data_ra for msa load/store
We should not have been using the helper_ret_* set of
functions, as they are supposed to be private to tcg.
Nor should we have been using the plain cpu_*_data set
of functions, as they do not handle unwinding properly.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:41:49 -07:00
Richard Henderson b4c8f3d4dd accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h
The previous placement in tcg/tcg.h was not logical.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:14:54 -07:00
Richard Henderson f83bcecb1f accel/tcg: Add cpu_{ld,st}*_mmu interfaces
These functions are much closer to the softmmu helper
functions, in that they take the complete MemOpIdx,
and from that they may enforce required alignment.

The previous cpu_ldst.h functions did not have alignment info,
and so did not enforce it.  Retain this by adding MO_UNALN to
the MemOp that we create in calling the new functions.

Note that we are not yet enforcing alignment for user-only,
but we now have the information with which to do so.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 08:09:53 -07:00
Richard Henderson f79e80899d target/hexagon: Implement cpu_mmu_index
The function is trivial for user-only, but still must be present.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 07:59:23 -07:00
Richard Henderson 35c65de029 target/s390x: Use MO_128 for 16 byte atomics
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 07:59:10 -07:00
Richard Henderson 68e33d869d target/ppc: Use MO_128 for 16 byte atomics
Cc: qemu-ppc@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 07:58:31 -07:00
Richard Henderson 26b14640d9 target/i386: Use MO_128 for 16 byte atomics
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 07:58:00 -07:00
Richard Henderson c21751f394 target/arm: Use MO_128 for 16 byte atomics
Cc: qemu-arm@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 07:26:33 -07:00
BALATON Zoltan 7a7142f025 memory: Log access direction for invalid accesses
In memory_region_access_valid() invalid accesses are logged to help
debugging but the log message does not say if it was a read or write.
Log that too to better identify the access causing the problem.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20211011173616.F1DE0756022@zero.eik.bme.hu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13 07:25:07 -07:00
Richard Henderson ee26ce674a Pull request
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+ber27ys35W+dsvQfe+BBqr8OQ4FAmFl/8cACgkQfe+BBqr8
 OQ7I8A/+K1vF5/TYME+9jPGJFrVVrT4TgMbzQlwxy6WOPXdO1prGmBR5cu9EqyfM
 PcQ4meYqKMGIWOYcxVYpDcsTkzT94nc4VuMQx0b3jw9W6PIKd4zZd0Kt10FqepAE
 akr8dzcgsClVvSwBHo9/9fXT5WWLGdeCttR42Lpv25ggMKSLuiL51w+/TmxJ8zuU
 pUn7tq2AjlQugqkZm+qtSq18Lu/0trmtPH5FyMCs0xxAPYP/h0QwaT6DizYIsLdz
 xZDH7ds/VsnQ41l5d+xG2/uh55ZTSzGQrCyVGoDbSI4jR8mWh3nj5uj1FQLWfKHT
 z7k/0oQZpp+9yFJ7M+yvPtW9L/narWuxW33qgGKT+CpicmEz1ZcEt9erWVitwbB9
 diP2z3AZzZlbxSOf+QKzl4TgYaKmFXcR6tCleitdvkwbUvOeSu0DyqmgMikdiRQw
 04BN3deuPjcZPWB007vQ/hQXdt2rQdv9E+E0qLszDyFBIVE2WIR4BNRl4AmsaSgz
 Fj8JrAERtdlaTW/iO34wboob3k+6e8de+USbqEMj1SgQBbsYRy5SGW0WaOe9r3lV
 D0ywZ8nB9G2Bb4iAvY38S80c04bAkgYwZuA4fpVjT0NpdLB0IcOBxLTuGwFrgfOF
 CBZ0e69pIMouWvRS56WPFUd6rXFCLtI0nXqiHxR/wunprB0/krU=
 =Yxqp
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/jsnow/tags/python-pull-request' into staging

Pull request

# gpg: Signature made Tue 12 Oct 2021 02:36:07 PM PDT
# gpg:                using RSA key F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E
# gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full]

* remotes/jsnow/tags/python-pull-request:
  python, iotests: remove socket_scm_helper
  python/qmp: add send_fd_scm directly to QEMUMonitorProtocol
  python/qmp: clear events on get_events() call
  python/aqmp: Disable logging messages by default
  python/aqmp: Reduce severity of EOFError-caused loop terminations
  python/aqmp: Add dict conversion method to Greeting object
  python/aqmp: add send_fd_scm
  python/aqmp: Return cleared events from EventListener.clear()
  python/aqmp: add .empty() method to EventListener
  python/aqmp: add greeting property to QMPClient

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-12 16:08:33 -07:00
Richard Henderson 8be1d4ed98 seabios-hppa update
-----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmFlt5wdHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9QBwgAl836mwZNny1QeJEX
 62MOf5tTSH5wbkWKIVsZ+XoKI1DO+PiBM+2S9cQb3A45usAQ6XcXrDERa+nXLv02
 1YRYX0xBSlOxfRCcceL9Xy6ksTMyRXcfXSEyCV7jd5sDd00bneWI8ofwHWQtNUTf
 VkPwiE/JxJPKvyoGRTC0KU+owEyZIxBtUEv2IAL1Gp9fH8j3gXaadU7XZqQPEfCE
 IY2EE4b27tMTnmySlAQd+OiUx3GrnocnOMmDZ7kFYvYZjSWQMIABemILIjfAbtT7
 56ErQSKzy/ZJG7B7esAQZu04jS5K6FbvjKwwpTLMLR4iSWpvf7pCmya7GqQB9LTA
 SLHM+g==
 =tVDl
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-20211012' into staging

seabios-hppa update

# gpg: Signature made Tue 12 Oct 2021 09:28:12 AM PDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* remotes/rth/tags/pull-hppa-20211012:
  pc-bios: Update hppa-firmware.img

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-12 09:37:19 -07:00
Helge Deller e770b8cf76 pc-bios: Update hppa-firmware.img
Update SeaBIOS to seabios-hppa-v2

Changes in seabios-hppa:
* Include all latest upstream SeaBIOS patches
* add support for the qemu "bootindex" parameter
* add support for the qemu "-boot order=g-m" parameter to choose
  SCSI ID

Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <YU4st/zcLcg6RKNn@ls3530>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-12 09:27:28 -07:00
John Snow c163c723ef python, iotests: remove socket_scm_helper
It's not used anymore, now.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 20210923004938.3999963-11-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:11 -04:00
John Snow 514d00df5f python/qmp: add send_fd_scm directly to QEMUMonitorProtocol
It turns out you can do this directly from Python ... and because of
this, you don't need to worry about setting the inheritability of the
fds or spawning another process.

Doing this is helpful because it allows QEMUMonitorProtocol to keep its
file descriptor and socket object as private implementation
details. /that/ is helpful in turn because it allows me to write a
compatible, alternative implementation.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 20210923004938.3999963-10-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:11 -04:00
John Snow d911accf0a python/qmp: clear events on get_events() call
All callers in the tree *already* clear the events after a call to
get_events(). Do it automatically instead and update callsites to remove
the manual clear call.

These semantics are quite a bit easier to emulate with async QMP, and
nobody appears to be abusing some emergent properties of what happens if
you decide not to clear them, so let's dial down to the dumber, simpler
thing.

Specifically: callers of clear() right after a call to get_events() are
more likely expressing their desire to not see any events they just
retrieved, whereas callers of clear_events() not in relation to a recent
call to pull_event/get_events are likely expressing their desire to
simply drop *all* pending events straight onto the floor. In the sync
world, this is safe enough; in the async world it's nearly impossible to
promise that nothing happens between getting and clearing the
events.

Making the retrieval also clear the queue is vastly simpler.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 20210923004938.3999963-9-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:11 -04:00
John Snow 3a3d84f5ec python/aqmp: Disable logging messages by default
AQMP is a library, and ideally it should not print error diagnostics
unless a user opts into seeing them. By default, Python will print all
WARNING, ERROR or CRITICAL messages to screen if no logging
configuration has been created by a client application.

In AQMP's case, ERROR logging statements are used to report additional
detail about runtime failures that will also eventually be reported to the
client library via an Exception, so these messages should not be
rendered by default.

(Why bother to have them at all, then? In async contexts, there may be
multiple Exceptions and we are only able to report one of them back to
the client application. It is not reasonably easy to predict ahead of
time if one or more of these Exceptions will be squelched. Therefore,
it's useful to log intermediate failures to help make sense of the
ultimate, resulting failure.)

Add a NullHandler that will suppress these messages until a client
application opts into logging via logging.basicConfig or similar. Note
that upon calling basicConfig(), this handler will *not* suppress these
messages from being displayed by the client's configuration.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20210923004938.3999963-8-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:11 -04:00
John Snow 3e55dc35b8 python/aqmp: Reduce severity of EOFError-caused loop terminations
When we encounter an EOFError, we don't know if it's an "error" in the
perspective of the user of the library yet. Therefore, we should not log
it as an error. Reduce the severity of this logging message to "INFO" to
indicate that it's something that we expect to occur during the normal
operation of the library.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20210923004938.3999963-7-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:11 -04:00
John Snow 58026b11f3 python/aqmp: Add dict conversion method to Greeting object
The iotests interface expects to return the greeting as a dict; AQMP
offers it as a rich object.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20210923004938.3999963-6-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:10 -04:00
John Snow 6e2f6ec561 python/aqmp: add send_fd_scm
Add an implementation for send_fd_scm to the async QMP implementation.
Like socket_scm_helper mentions, a non-empty payload is required for
QEMU to process the ancillary data. A space is most useful because it
does not disturb the parsing of subsequent JSON objects.

A note on "voiding the warranty":

Python 3.11 removes support for calling sendmsg directly from a
transport's socket. There is no other interface for doing this, our use
case is, I suspect, "quite unique".

As far as I can tell, this is safe to do -- send_fd_scm is a synchronous
function and we can be guaranteed that the async coroutines will *not* be
running when it is invoked. In testing, it works correctly.

I investigated quite thoroughly the possibility of creating my own
asyncio Transport (The class that ultimately manages the raw socket
object) so that I could manage the socket myself, but this is so wildly
invasive and unportable I scrapped the idea. It would involve a lot of
copy-pasting of various python utilities and classes just to re-create
the same infrastructure, and for extremely little benefit. Nah.

Just boldly void the warranty instead, while I try to follow up on
https://bugs.python.org/issue43232

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20210923004938.3999963-5-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:10 -04:00
John Snow 6bfebc7306 python/aqmp: Return cleared events from EventListener.clear()
This serves two purposes:

(1) It is now possible to discern whether or not clear() removed any
event(s) from the queue with absolute certainty, and

(2) It is now very easy to get a List of all pending events in one
chunk, which is useful for the sync bridge.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 20210923004938.3999963-4-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:10 -04:00
John Snow 16cce725ed python/aqmp: add .empty() method to EventListener
Synchronous clients may want to know if they're about to block waiting
for an event or not. A method such as this is necessary to implement a
compatible interface for the old QEMUMonitorProtocol using the new async
internals.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 20210923004938.3999963-3-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:10 -04:00
John Snow 0257209a09 python/aqmp: add greeting property to QMPClient
Expose the greeting as a read-only property of QMPClient so it can be
retrieved at-will.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 20210923004938.3999963-2-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-10-12 12:22:10 -04:00
Richard Henderson bfd9a76f9c Some testing and plugin updates:
- don't override the test compiler when specified
   - split some multiarch tests by guest OS
   - add riscv64 docker image and cross-compile tests
   - drop release tarball test from Travis
   - skip check-patch on master repo
   - fix passing of TEST_TARGETS to cirrus
   - fix missing symbols in plugins
   - ensure s390x insn start ops precede plugin instrumentation
   - refactor plugin instruction boundary detection
   - update github repo lockdown
   - add a debian-native test image for multi-arch builds
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmFlVsQACgkQ+9DbCVqe
 KkQP4wf/WErJTOCALRjH3ebLasdOAC4O9BZhH5vMx39o8jwbap2/dZT70IVSgEPj
 2bePVnCTRTkgNqcQR/3nsvTkIxpzxR8HAtwbv0XdDBo6b+7090st2z+jHf6ZgFdV
 bVqNE0nDAScsUPW2xpgQ4UwlJHMI8QucMt+ptPM5lmRnxPvHij9MeodergPooqt/
 joI+eUtsnT6bQQTzJA4dJpHunQofjPyvtviYae3PvPSQIITUz461JQRr0kJZO6Ql
 VHuBmuupfuAGijPSTsVPKAFAYkd2UkMKnvAmx2hzKDAVL/QmB0bE90BdAde7d6+X
 3/wR/jVE8QpSlP1nwVERdy++YU0oZw==
 =0UIz
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/stsquad/tags/pull-for-6.2-121021-2' into staging

Some testing and plugin updates:

  - don't override the test compiler when specified
  - split some multiarch tests by guest OS
  - add riscv64 docker image and cross-compile tests
  - drop release tarball test from Travis
  - skip check-patch on master repo
  - fix passing of TEST_TARGETS to cirrus
  - fix missing symbols in plugins
  - ensure s390x insn start ops precede plugin instrumentation
  - refactor plugin instruction boundary detection
  - update github repo lockdown
  - add a debian-native test image for multi-arch builds

# gpg: Signature made Tue 12 Oct 2021 02:35:00 AM PDT
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]

* remotes/stsquad/tags/pull-for-6.2-121021-2:
  tests/docker: add a debian-native image and make available
  .github: move repo lockdown to the v2 configuration
  accel/tcg: re-factor plugin_inject_cb so we can assert insn_idx is valid
  target/s390x: move tcg_gen_insn_start to s390x_tr_insn_start
  plugins/: Add missing functions to symbol list
  gitlab: fix passing of TEST_TARGETS env to cirrus
  gitlab: skip the check-patch job on the upstream repo
  travis.yml: Remove the "Release tarball" job
  gitlab: Add cross-riscv64-system, cross-riscv64-user
  tests/docker: promote debian-riscv64-cross to a full image
  tests/tcg: move some multiarch files and make conditional
  tests/tcg/sha1: remove endian include
  configure: don't override the selected host test compiler if defined

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-12 06:16:25 -07:00
Richard Henderson 81d8537cb2 Aspeed patches :
* I2C QOMify (Cedric)
 * SMC model cleanup and QOMify (Cedric)
 * ADC model (Peter and Andrew)
 * GPIO fixes (Peter)
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmFlOvYACgkQUaNDx8/7
 7KGimQ/+LG8B04Aveo74ezIX0GCNQIi6ZVRAzPBOsHZ1FSW3rXfOxr1k/uUWDWiC
 t05r9e63f4IPVtoP14H8zFnQngddG2Q3AByOilJLRYYct3N6G+ewUqBmR1LN+iBZ
 1F/koyNvBNfCBQHCmPHsJF6UGgs48NbXPWoQX2Dsudkkxk3KS+RTUrtIk4fD9tB9
 a5lDxSjJ756pkQkvS7tCLjyGB4rOicfEE0gDh4Uyr3+t9VRXPVCSG7NX1jvytZ2t
 1udj7MmnNEjY0CtUFjtfjog5f3gcXU40lGmbvNxEB8dPykJnnPqbdSWtStRryN5L
 FVvOeP4rKb0jF0TmNsBWTtSZvNuNBzQkwL/tYgzJ+bKNVoYQUDHzhWsC99GqH9Vi
 +z3s5TlEqiTN1krw8+0vF/4GeTse0lsYuGIvD3jqdrERCtpPvmSynMWXtIGi/QOr
 ILVXaSbJ4A6ZkAXQjKNVOGqqEeQqr96synSeyiNQs9su9X/Sl5P71r9mFRhVV9T7
 4EgvzGQCMIH+aL/nMnb2IhQNd/3sq51wc+TOnmb+by22s85LWvaSuBQVI2kvDn4v
 Bckl11qP6AZFu2xvq+mGnPI3cXRm57N5S499mwF+wygLpWOQI2CjoUunC+0GWQ7O
 ISMvukTskpwOkDNbfTB+e0cT80w5REdIcLL5oLmxcA+s35zthb8=
 =ydTX
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-20211012' into staging

Aspeed patches :

* I2C QOMify (Cedric)
* SMC model cleanup and QOMify (Cedric)
* ADC model (Peter and Andrew)
* GPIO fixes (Peter)

# gpg: Signature made Tue 12 Oct 2021 12:36:22 AM PDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/clg/tags/pull-aspeed-20211012:
  aspeed/smc: Dump address offset in trace events
  aspeed/wdt: Add trace events
  hw/arm: Integrate ADC model into Aspeed SoC
  hw/adc: Add basic Aspeed ADC model
  hw: aspeed_gpio: Fix GPIO array indexing
  hw: aspeed_gpio: Fix pin I/O type declarations
  aspeed/i2c: QOMify AspeedI2CBus
  aspeed/smc: Remove unused attribute 'irqline'
  aspeed/smc: Introduce a new addr_width() class handler
  aspeed/smc: Add default reset values
  aspeed/smc: QOMify AspeedSMCFlash
  aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs'
  aspeed/smc: Remove the 'size' attribute from AspeedSMCFlash
  aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlash
  aspeed/smc: Drop AspeedSMCController structure
  aspeed/smc: Stop using the model name for the memory regions
  aspeed/smc: Introduce aspeed_smc_error() helper
  aspeed/smc: Add watchdog Control/Status Registers

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-12 04:41:59 -07:00
Alex Bennée 17888749ba tests/docker: add a debian-native image and make available
This image is intended for building whatever the native versions of
QEMU are for the host architecture. This will hopefully be an aid for
3rd parties who want to be able to build QEMU themselves without
redoing all the dependencies themselves.

We disable the registry because we currently don't have multi-arch
support there.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Acked-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20210922151528.2192966-1-alex.bennee@linaro.org>
2021-10-12 08:38:10 +01:00
Alex Bennée 9b89cdb2a5 .github: move repo lockdown to the v2 configuration
I was getting prompted by GitHub for new permissions but it turns out
per https://github.com/dessant/repo-lockdown/issues/6:

  Repo Lockdown has been rewritten for GitHub Actions, offering new
  features and better control over your automation presets. The legacy
  GitHub App has been deprecated, and the public instance of the app
  has been shut down.

So this is what I've done. As the issues tab is disabled I've removed
the handling for issues from the new version.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20211004154308.2114870-1-alex.bennee@linaro.org>
2021-10-12 08:38:10 +01:00
Alex Bennée 453d50ce75 accel/tcg: re-factor plugin_inject_cb so we can assert insn_idx is valid
Coverity doesn't know enough about how we have arranged our plugin TCG
ops to know we will always have incremented insn_idx before injecting
the callback. Let us assert it for the benefit of Coverity and protect
ourselves from accidentally breaking the assumption and triggering
harder to grok errors deeper in the code if we attempt a negative
indexed array lookup.

However to get to this point we re-factor the code and remove the
second hand instruction boundary detection in favour of scanning the
full set of ops and using the existing INDEX_op_insn_start to cleanly
detect when the instruction has started. As we no longer need the
plugin specific list of ops we delete that.

My initial benchmarks shows no discernible impact of dropping the
plugin specific ops list.

Fixes: Coverity 1459509
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210917162332.3511179-12-alex.bennee@linaro.org>
2021-10-12 08:38:10 +01:00
Richard Henderson 5d23d53023 target/s390x: move tcg_gen_insn_start to s390x_tr_insn_start
We use INDEX_op_insn_start to make the start of instruction boundaries.
If we don't do it in the .insn_start hook things get confused especially
now plugins want to use that marking to identify the start of instructions
and will bomb out if it sees instrumented ops before the first instruction
boundary.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20211011185332.166763-1-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2021-10-12 08:37:53 +01:00
Lukas Jünger 6a78a987c6 plugins/: Add missing functions to symbol list
Some functions of the plugin API were missing in
the symbol list. However, they are all used by
the contributed example plugins. QEMU fails to
load the plugin if the function symbol is not
exported.

Signed-off-by: Lukas Jünger <lukas.junger@greensocs.com>
Message-Id: <20210905140939.638928-2-lukas.junger@greensocs.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210917162332.3511179-11-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Daniel P. Berrangé f13abca0a3 gitlab: fix passing of TEST_TARGETS env to cirrus
A typo meant the substitution would not work, and the placeholder in the
target file didn't even exist.

The result was that tests were never run on the FreeBSD and macOS jobs,
only a basic build.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210915125452.1704899-3-berrange@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210917162332.3511179-10-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Daniel P. Berrangé dcbad7a6ed gitlab: skip the check-patch job on the upstream repo
The check-patch job is intended to be used by contributors or
subsystem maintainers to see if there are style mistakes. The
false positive rate is too high to be used in a gating scenario
so should not run it on the upstream repo ever.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210915125452.1704899-2-berrange@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210917162332.3511179-9-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Thomas Huth 9d03f5abed travis.yml: Remove the "Release tarball" job
This is a leftover from the days when we were using Travis excessively,
but since x86 jobs are not really usable there anymore, this job has
likely never been used since many months. Let's simply remove it now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20210917094826.466047-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210917162332.3511179-8-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Richard Henderson 9f62025141 gitlab: Add cross-riscv64-system, cross-riscv64-user
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210914185830.1378771-3-richard.henderson@linaro.org>
[AJB: add allow_failure]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20210917162332.3511179-6-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Alex Bennée 5c24acf320 tests/docker: promote debian-riscv64-cross to a full image
To be able to cross build QEMU itself we need to include a few more
libraries. These are only available in Debian's unstable ports repo
for now so we need to base the riscv64 image on sid with the the
minimal libs needed to build QEMU (glib/pixman).

The result works but is not as clean as using build-dep to bring in
more dependencies. However sid is by definition a shifting pile of
sand and by keeping the list of libs minimal we reduce the chance of
having an image we can't build. It's good enough for a basic cross
build testing of TCG.

Cc: "Daniel P. Berrangé" <berrange@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210914185830.1378771-2-richard.henderson@linaro.org>
[AJB: tweak allow_failure]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210917162332.3511179-5-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Alex Bennée 5343a837cd tests/tcg: move some multiarch files and make conditional
We had some messy code to filter out stuff we can't build. Lets junk
that and simplify the logic by pushing some stuff into subdirs. In
particular we move:

  float_helpers into libs - not a standalone test
  linux-test into linux - so we only build on Linux hosts

This allows for at least some of the tests to be nominally usable
by *BSD user builds.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Message-Id: <20210917162332.3511179-4-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Alex Bennée 4f0ebed418 tests/tcg/sha1: remove endian include
This doesn't exist in BSD world and doesn't seem to be needed by
either.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Message-Id: <20210917162332.3511179-3-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Alex Bennée 9557af9ce9 configure: don't override the selected host test compiler if defined
There are not many cases you would want to do this but one is if you
want to use a test friendly compiler like gcc instead of a system
compiler like clang. Either way we should honour the users choice if
they have made it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Warner Losh <imp@bsdimp.com>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Message-Id: <20210917162332.3511179-2-alex.bennee@linaro.org>
2021-10-12 08:37:05 +01:00
Cédric Le Goater e2804a1ec9 aspeed/smc: Dump address offset in trace events
The register index is currently printed and this is confusing.

Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00
Cédric Le Goater a8eb9a4333 aspeed/wdt: Add trace events
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00
Andrew Jeffery 199fd6230c hw/arm: Integrate ADC model into Aspeed SoC
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Message-Id: <20211005052604.1674891-3-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00
Andrew Jeffery 5857974d5d hw/adc: Add basic Aspeed ADC model
This model implements enough behaviour to do basic functionality tests
such as device initialisation and read out of dummy sample values. The
sample value generation strategy is similar to the STM ADC already in
the tree.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
[clg : support for multiple engines (AST2600) ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
[pdel : refactored engine register struct fields to regs[] array field]
[pdel : added guest-error checking for upper-8 channel regs in AST2600]
[pdel : allow 16-bit reads of the channel data registers]
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Message-Id: <20211005052604.1674891-2-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00
Peter Delevoryas 87bd33e8b0 hw: aspeed_gpio: Fix GPIO array indexing
The gpio array is declared as a dense array:

  qemu_irq gpios[ASPEED_GPIO_NR_PINS];

(AST2500 has 228, AST2400 has 216, AST2600 has 208)

However, this array is used like a matrix of GPIO sets
(e.g. gpio[NR_SETS][NR_PINS_PER_SET] = gpio[8][32])

  size_t offset = set * GPIOS_PER_SET + gpio;
  qemu_set_irq(s->gpios[offset], !!(new & mask));

This can result in an out-of-bounds access to "s->gpios" because the
gpio sets do _not_ have the same length. Some of the groups (e.g.
GPIOAB) only have 4 pins. 228 != 8 * 32 == 256.

To fix this, I converted the gpio array from dense to sparse, to that
match both the hardware layout and this existing indexing code.

Fixes: 4b7f956862 ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500")
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Message-Id: <20211008033501.934729-2-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00
Peter Delevoryas 9fffe140a9 hw: aspeed_gpio: Fix pin I/O type declarations
Some of the pin declarations in the Aspeed GPIO module were incorrect,
probably because of confusion over which bits in the input and output
uint32_t's correspond to which groups in the label array. Since the
uint32_t literals are in big endian, it's sort of the opposite of what
would be intuitive. The least significant bit in ast2500_set_props[6]
corresponds to GPIOY0, not GPIOAB7.

GPIOxx indicates input and output capabilities, GPIxx indicates only
input, GPOxx indicates only output.

AST2500:
- Previously had GPIW0..GPIW7 and GPIX0..GPIX7, that's correct.
- Previously had GPIOY0..GPIOY3, should have been GPIOY0..GPIOY7.
- Previously had GPIOAB0..GPIOAB3 and GPIAB4..GPIAB7, should only have
  been GPIOAB0..GPIOAB3.

AST2600:
- GPIOT0..GPIOT7 should have been GPIT0..GPIT7.
- GPIOU0..GPIOU7 should have been GPIU0..GPIU7.
- GPIW0..GPIW7 should have been GPIOW0..GPIOW7.
- GPIOY0..GPIOY7 and GPIOZ0...GPIOZ7 were disabled.

Fixes: 4b7f956862 ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500")
Fixes: 36d737ee82 ("hw/gpio: Add in AST2600 specific implementation")
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
Reviewed-by: Rashmica Gupta <rashmica.g@gmail.com>
Message-Id: <20210928032456.3192603-2-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00
Cédric Le Goater 602610383f aspeed/i2c: QOMify AspeedI2CBus
Introduce an AspeedI2CBus SysBusDevice model and attach the associated
memory region and IRQ to the newly instantiated objects.

Before this change, the I2C bus IRQs were all attached to the
SysBusDevice model of the I2C controller. Adapt the AST2600 SoC
realize routine to take into account this change.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00