haraldwolff/qemu-patch-raspberry4
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135 commits

Author SHA1 Message Date
blueswir1 90cbed4656 Fix 32 bit address overflow 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5019 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-17 16:13:02 +00:00
blueswir1 bffe143153 Restore AREG0 after calls 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5018 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-17 14:34:27 +00:00
blueswir1 56fc64dfd0 Sparc code generator update (fix qemu_ld & qemu_st) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5014 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-16 19:54:01 +00:00
blueswir1 53c3748794 Sparc code generator update 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5009 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-15 18:14:44 +00:00
malc bf6bca527c Account for MacOS X ABI reserved space in linkage area (Andreas Faerber) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4985 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-03 19:04:11 +00:00
malc f9bf298717 Preliminary MacOS X on PPC32 support 
Big thanks to BlueSwirl for Sparc failure analysis.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4984 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-03 19:04:07 +00:00
malc 52781543ad On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64 
Avoids nasty warnings about flush_icache_range from gcc4 and inability
to compile [cpu-]exec.c with gcc3 and -O, also the function is much
too large to be candidate for inlining anyway.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4974 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-29 20:08:17 +00:00
malc fe6f943f3b Immediate versions of some operations 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4962 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 23:46:06 +00:00
malc 000a2d866a Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4961 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 23:46:03 +00:00
malc e924bbec7a Set the L field of CMP[L][I] when dealing with 64 bit quantities 
This (along with previous 2 commits) makes X86_64 work on ppc64 too.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4960 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 19:42:23 +00:00
malc 880e52b8b0 Fix preprocessor guard condition 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4959 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 19:42:20 +00:00
malc 95153fde07 Remove leftover from previous way to load 64 bit constants 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4958 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 19:42:17 +00:00
malc 4a40e23194 Special-case some paths inside tcg_out_tlb_read 
a. Use 32bit arithmetics in TARGET_LONG_BITS == 32 case
b. Optimize byte access case in TARGET_LONG_BITS == 64 case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4955 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-27 11:09:21 +00:00
malc 301f6d903a Fix the opcode value of LWA 
That should teach one to not blindly trust documentation that will
(out of the blue) use decimal and binary representation for numbers in
the same chart for no apparent reason and without any prefixes, sigh..

Unbreaks MIPS.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4954 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-27 10:28:15 +00:00
blueswir1 e97b640d47 Try to avoid glibc global register mangling, again 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4953 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 17:19:35 +00:00
malc c070355d39 Relax memory operations constraints 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4950 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:21:03 +00:00
malc b01d9fea6c Fix qemu_ld64 constraint list 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4949 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:21:00 +00:00
malc e03ae7f9b3 Use proper offset for LR save slot 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4948 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:20:57 +00:00
malc 5424fd1018 Reduce amount of space reserved for tb jump 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4947 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:20:54 +00:00
malc 6fc9dbcc17 Fix and improve 64 bit immediate loading 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4946 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:20:50 +00:00
malc 450e62e768 Fix EXTSW arguments 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4945 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:20:44 +00:00
malc e7d05e6f1d Use proper value for TCG_TARGET_CALL_STACK_OFFSET 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4941 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-24 22:56:21 +00:00
malc a69abbe0b3 Emit and use adhoc function descriptor for code_gen_prologue on PPC64 
Thus avoiding fragile inline assembly hackery to call into generated
code.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4939 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-24 17:37:09 +00:00
malc 6926be2a59 Remove neg_i32 debugging leftover 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4935 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-23 20:01:27 +00:00
malc e46b9681e5 Provide extNs_M instructions 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4934 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-23 20:01:23 +00:00
malc 1d58ee9f3b Remove stray "i" from mul_i64 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4933 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-23 20:01:19 +00:00
malc 810260a8f3 Preliminary PPC64/Linux host support 
ppc64.ld from Heikki Lindholm's patch
http://marc.info/?l=qemu-devel&m=114086179024634&w=2

Issues:
x86_64 tripple faults shortly after decompressing the kernel
No immediate versions of most 64 bit operations
More...

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4932 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-23 19:17:46 +00:00
bellard d643ccca01 64 bit signed comparison fix (Juergen Lock) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-07 20:15:54 +00:00
blueswir1 d795eb86d7 Fix 64 bit constant generation 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4854 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-07 19:34:45 +00:00
malc e924c48573 Fuse EQ and NE handling in tcg_out_brcond2 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4845 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-03 23:49:14 +00:00
malc 8c5e95d807 Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4841 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-03 18:51:23 +00:00
pbrook a50f5b9186 Suppress bogus compiler warnings. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4803 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 15:25:29 +00:00
malc ca88500f43 According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatile 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4779 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-23 05:47:06 +00:00
malc a35e86c55f Shuffle contents of tcg_target_reg_alloc_order 
Move reserved/volatile registers down. Currently qemu_ld/stXX are
marked with TCG_OPF_CALL_CLOBBER and since memory accesses are
frequent and R3 through R12 are volatile moving this down results in
less spills and tighter generated code.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4778 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-23 05:47:03 +00:00
malc 17ca26e791 Save LR into proper place on callers stack frame 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4745 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-18 01:58:52 +00:00
malc c596defdb9 Reimplement brcond2 and refactor brcond 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4738 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-12 12:33:10 +00:00
ths 8df1ca4ba5 Allocate register pair for 64-bit registers on 32-bit host. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4730 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-11 11:03:34 +00:00
malc 0d5bd3631f Remove stray variable 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4725 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-10 01:47:17 +00:00
malc 77b73de676 Use rem/div[u]_i32 drop div[u]2_i32 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4722 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 23:44:44 +00:00
malc fa4fbfb98a Emit trampolines manually in prologue 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4715 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 19:57:36 +00:00
malc 5d794885a2 Fix test for signed div fast path 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4714 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 19:57:27 +00:00
malc 398ce98e4f Fix div[u]2. 
Previous code assummed 32 by 32 bit divmod operation, and survived
x86_64 test only by sheer luck. MIPS wasn't so forgiving.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4705 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 06:06:25 +00:00
malc 0a878c4760 PPC TCG Fixes 
* Fix typo in aliased div2
* "Optimize" aliased div2/divu2
* Fix two remaining branch retranslation problems
  (Kudos to Andrzej Zaborowski)
* Rework goto_tb and set_jmp_target1
* Use correct size when flushing icache
* Use correct register selection for ORI
  (Was harmless since in both cases srcreg was equal to dstreg)



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4691 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-07 20:31:33 +00:00
ths c588979bfc Allocate a register pair instead of a single register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4688 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-07 04:31:49 +00:00
ths 1235fc066a Spelling fixes, by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4655 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-03 19:51:57 +00:00
bellard 932a690969 support of long calls for PPC (malc) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4629 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 20:56:52 +00:00
bellard f3f478a7ef Fix signed/unsigned issues of immediate version of brcond (malc) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4588 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-26 19:11:07 +00:00
bellard 2662e13f68 ppc TCG target (malc) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4584 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 18:59:57 +00:00
bellard 560f92cc34 jump simplification 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4583 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 18:49:06 +00:00
bellard affa3264db jump optimizations 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4582 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 18:41:58 +00:00