Jia Liu
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d962783e98
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target-or32: Add linux user support
Add QEMU OpenRISC linux user support.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:13:05 +00:00 |
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Jia Liu
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4dd044c6ba
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target-or32: Add system instructions
Add OpenRISC system instructions.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:13:03 +00:00 |
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Jia Liu
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99f575edcc
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target-or32: Add timer support
Add OpenRISC timer support.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:13:02 +00:00 |
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Jia Liu
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dd29c7fb01
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target-or32: Add PIC support
Add OpenRISC Programmable Interrupt Controller support.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:13:01 +00:00 |
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Jia Liu
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bbe418f25d
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target-or32: Add instruction translation
Add OpenRISC instruction tanslation routines.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:13:00 +00:00 |
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Jia Liu
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5b5695073b
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target-or32: Add float instruction helpers
Add OpenRISC float instruction helpers.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:13:00 +00:00 |
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Jia Liu
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e54a5aff13
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target-or32: Add int instruction helpers
Add OpenRISC int instruction helpers.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:12:59 +00:00 |
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Jia Liu
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1d7d403469
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target-or32: Add exception support
Add OpenRISC exception support.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:12:58 +00:00 |
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Jia Liu
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b6a71ef7e0
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target-or32: Add interrupt support
Add OpenRISC interrupt support.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:12:57 +00:00 |
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Jia Liu
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726fe04572
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target-or32: Add MMU support
Add OpenRISC MMU support.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:12:56 +00:00 |
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Jia Liu
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e67db06e9f
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target-or32: Add target stubs and QOM cpu
Add OpenRISC target stubs, QOM cpu and basic machine.
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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2012-07-27 21:12:55 +00:00 |
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