47374b0761
Microchip PolarFire SoC integrates 2 Candence GEMs to provide IEEE 802.3 standard-compliant 10/100/1000 Mbps ethernet interface. On the Icicle Kit board, GEM0 connects to a PHY at address 8 while GEM1 connects to a PHY at address 9. The 2nd stage bootloader (U-Boot) is using GEM1 by default, so we must specify 2 '-nic' options from the command line in order to get a working ethernet. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1598924352-89526-14-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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boot.h | ||
boot_opensbi.h | ||
microchip_pfsoc.h | ||
numa.h | ||
opentitan.h | ||
riscv_hart.h | ||
riscv_htif.h | ||
sifive_clint.h | ||
sifive_cpu.h | ||
sifive_e.h | ||
sifive_e_prci.h | ||
sifive_gpio.h | ||
sifive_plic.h | ||
sifive_test.h | ||
sifive_u.h | ||
sifive_u_otp.h | ||
sifive_u_prci.h | ||
sifive_uart.h | ||
spike.h | ||
virt.h |