qemu-patch-raspberry4/target/i386/tcg
Peter Maydell e0e875a68a target/i386: Use assert() to sanity-check b1 in SSE decode
In the SSE decode function gen_sse(), we combine a byte
'b' and a value 'b1' which can be [0..3], and switch on them:
   b |= (b1 << 8);
   switch (b) {
   ...
   default:
   unknown_op:
       gen_unknown_opcode(env, s);
       return;
   }

In three cases inside this switch, we were then also checking for
 "if (b1 >= 2) { goto unknown_op; }".
However, this can never happen, because the 'case' values in each place
are 0x0nn or 0x1nn and the switch will have directed the b1 == (2, 3)
cases to the default already.

This check was added in commit c045af25a5 in 2010; the added code
was unnecessary then as well, and was apparently intended only to
ensure that we never accidentally ended up indexing off the end
of an sse_op_table with only 2 entries as a result of future bugs
in the decode logic.

Change the checks to assert() instead, and make sure they're always
immediately before the array access they are protecting.

Fixes: Coverity CID 1460207
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-15 10:35:26 +00:00
..
sysemu target-i386: mmu: fix handling of noncanonical virtual addresses 2021-11-08 08:55:20 +01:00
user target/i386: Implement x86_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
bpt_helper.c target/i386: fix exceptions for MOV to DR 2021-07-09 18:21:34 +02:00
cc_helper.c i386: move TCG cpu class initialization to tcg/ 2020-12-16 15:50:33 -05:00
cc_helper_template.h
excp_helper.c target/i386: Mark some helpers as noreturn 2021-05-19 12:17:11 -05:00
fpu_helper.c target/i386: Correct implementation for FCS, FIP, FDS and FDP 2021-07-13 08:13:19 -07:00
helper-tcg.h target/i386: Implement x86_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
int_helper.c i386: move TCG cpu class initialization to tcg/ 2020-12-16 15:50:33 -05:00
mem_helper.c target/i386: Use MO_128 for 16 byte atomics 2021-10-13 07:58:00 -07:00
meson.build i386: split svm_helper into sysemu and stub-only user 2021-05-10 15:41:51 -04:00
misc_helper.c target/i386: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
mpx_helper.c i386: move TCG cpu class initialization to tcg/ 2020-12-16 15:50:33 -05:00
seg_helper.c target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder 2021-09-14 12:00:21 -07:00
seg_helper.h i386: split seg_helper into user-only and sysemu parts 2021-05-10 15:41:52 -04:00
tcg-cpu.c target/i386: Implement x86_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00
tcg-cpu.h target/i386: Move X86XSaveArea into TCG 2021-07-06 08:33:51 +02:00
tcg-stub.c
translate.c target/i386: Use assert() to sanity-check b1 in SSE decode 2021-12-15 10:35:26 +00:00