Get kernel and fdt start address in virt.c, and pass them to KVM when cpu reset. Add kvm_riscv.h to place riscv specific interface. In addition, PLIC is created without M-mode PLIC contexts when KVM is enabled. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Mingwang Li <limingwang@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Message-id: 20220112081329.1835-7-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
341 lines
12 KiB
C
341 lines
12 KiB
C
/*
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* QEMU RISC-V Boot Helper
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*
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* Copyright (c) 2017 SiFive, Inc.
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* Copyright (c) 2019 Alistair Francis <alistair.francis@wdc.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "qemu/datadir.h"
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#include "qemu/units.h"
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#include "qemu/error-report.h"
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#include "exec/cpu-defs.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "hw/riscv/boot.h"
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#include "hw/riscv/boot_opensbi.h"
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#include "elf.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/qtest.h"
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#include "sysemu/kvm.h"
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#include <libfdt.h>
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bool riscv_is_32bit(RISCVHartArrayState *harts)
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{
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return harts->harts[0].env.misa_mxl_max == MXL_RV32;
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}
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/*
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* Return the per-socket PLIC hart topology configuration string
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* (caller must free with g_free())
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*/
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char *riscv_plic_hart_config_string(int hart_count)
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{
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g_autofree const char **vals = g_new(const char *, hart_count + 1);
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int i;
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for (i = 0; i < hart_count; i++) {
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CPUState *cs = qemu_get_cpu(i);
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CPURISCVState *env = &RISCV_CPU(cs)->env;
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if (kvm_enabled()) {
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vals[i] = "S";
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} else if (riscv_has_ext(env, RVS)) {
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vals[i] = "MS";
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} else {
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vals[i] = "M";
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}
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}
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vals[i] = NULL;
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/* g_strjoinv() obliges us to cast away const here */
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return g_strjoinv(",", (char **)vals);
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}
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target_ulong riscv_calc_kernel_start_addr(RISCVHartArrayState *harts,
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target_ulong firmware_end_addr) {
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if (riscv_is_32bit(harts)) {
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return QEMU_ALIGN_UP(firmware_end_addr, 4 * MiB);
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} else {
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return QEMU_ALIGN_UP(firmware_end_addr, 2 * MiB);
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}
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}
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target_ulong riscv_find_and_load_firmware(MachineState *machine,
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const char *default_machine_firmware,
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hwaddr firmware_load_addr,
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symbol_fn_t sym_cb)
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{
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char *firmware_filename = NULL;
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target_ulong firmware_end_addr = firmware_load_addr;
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if ((!machine->firmware) || (!strcmp(machine->firmware, "default"))) {
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/*
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* The user didn't specify -bios, or has specified "-bios default".
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* That means we are going to load the OpenSBI binary included in
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* the QEMU source.
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*/
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firmware_filename = riscv_find_firmware(default_machine_firmware);
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} else if (strcmp(machine->firmware, "none")) {
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firmware_filename = riscv_find_firmware(machine->firmware);
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}
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if (firmware_filename) {
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/* If not "none" load the firmware */
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firmware_end_addr = riscv_load_firmware(firmware_filename,
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firmware_load_addr, sym_cb);
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g_free(firmware_filename);
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}
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return firmware_end_addr;
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}
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char *riscv_find_firmware(const char *firmware_filename)
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{
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char *filename;
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware_filename);
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if (filename == NULL) {
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if (!qtest_enabled()) {
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/*
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* We only ship plain binary bios images in the QEMU source.
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* With Spike machine that uses ELF images as the default bios,
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* running QEMU test will complain hence let's suppress the error
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* report for QEMU testing.
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*/
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error_report("Unable to load the RISC-V firmware \"%s\"",
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firmware_filename);
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exit(1);
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}
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}
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return filename;
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}
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target_ulong riscv_load_firmware(const char *firmware_filename,
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hwaddr firmware_load_addr,
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symbol_fn_t sym_cb)
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{
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uint64_t firmware_entry, firmware_size, firmware_end;
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if (load_elf_ram_sym(firmware_filename, NULL, NULL, NULL,
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&firmware_entry, NULL, &firmware_end, NULL,
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0, EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
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return firmware_end;
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}
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firmware_size = load_image_targphys_as(firmware_filename,
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firmware_load_addr,
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current_machine->ram_size, NULL);
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if (firmware_size > 0) {
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return firmware_load_addr + firmware_size;
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}
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error_report("could not load firmware '%s'", firmware_filename);
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exit(1);
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}
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target_ulong riscv_load_kernel(const char *kernel_filename,
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target_ulong kernel_start_addr,
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symbol_fn_t sym_cb)
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{
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uint64_t kernel_load_base, kernel_entry;
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/*
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* NB: Use low address not ELF entry point to ensure that the fw_dynamic
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* behaviour when loading an ELF matches the fw_payload, fw_jump and BBL
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* behaviour, as well as fw_dynamic with a raw binary, all of which jump to
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* the (expected) load address load address. This allows kernels to have
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* separate SBI and ELF entry points (used by FreeBSD, for example).
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*/
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if (load_elf_ram_sym(kernel_filename, NULL, NULL, NULL,
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NULL, &kernel_load_base, NULL, NULL, 0,
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EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
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return kernel_load_base;
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}
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if (load_uimage_as(kernel_filename, &kernel_entry, NULL, NULL,
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NULL, NULL, NULL) > 0) {
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return kernel_entry;
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}
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if (load_image_targphys_as(kernel_filename, kernel_start_addr,
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current_machine->ram_size, NULL) > 0) {
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return kernel_start_addr;
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}
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error_report("could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size,
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uint64_t kernel_entry, hwaddr *start)
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{
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int size;
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/*
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* We want to put the initrd far enough into RAM that when the
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* kernel is uncompressed it will not clobber the initrd. However
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* on boards without much RAM we must ensure that we still leave
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* enough room for a decent sized initrd, and on boards with large
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* amounts of RAM we must avoid the initrd being so far up in RAM
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* that it is outside lowmem and inaccessible to the kernel.
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* So for boards with less than 256MB of RAM we put the initrd
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* halfway into RAM, and for boards with 256MB of RAM or more we put
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* the initrd at 128MB.
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*/
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*start = kernel_entry + MIN(mem_size / 2, 128 * MiB);
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size = load_ramdisk(filename, *start, mem_size - *start);
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if (size == -1) {
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size = load_image_targphys(filename, *start, mem_size - *start);
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if (size == -1) {
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error_report("could not load ramdisk '%s'", filename);
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exit(1);
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}
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}
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return *start + size;
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}
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uint32_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt)
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{
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uint32_t temp, fdt_addr;
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hwaddr dram_end = dram_base + mem_size;
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int ret, fdtsize = fdt_totalsize(fdt);
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if (fdtsize <= 0) {
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error_report("invalid device-tree");
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exit(1);
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}
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/*
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* We should put fdt as far as possible to avoid kernel/initrd overwriting
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* its content. But it should be addressable by 32 bit system as well.
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* Thus, put it at an 16MB aligned address that less than fdt size from the
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* end of dram or 3GB whichever is lesser.
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*/
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temp = MIN(dram_end, 3072 * MiB);
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fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 16 * MiB);
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ret = fdt_pack(fdt);
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/* Should only fail if we've built a corrupted tree */
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g_assert(ret == 0);
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/* copy in the device tree */
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qemu_fdt_dumpdtb(fdt, fdtsize);
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rom_add_blob_fixed_as("fdt", fdt, fdtsize, fdt_addr,
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&address_space_memory);
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return fdt_addr;
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}
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void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base,
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hwaddr rom_size, uint32_t reset_vec_size,
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uint64_t kernel_entry)
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{
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struct fw_dynamic_info dinfo;
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size_t dinfo_len;
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if (sizeof(dinfo.magic) == 4) {
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dinfo.magic = cpu_to_le32(FW_DYNAMIC_INFO_MAGIC_VALUE);
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dinfo.version = cpu_to_le32(FW_DYNAMIC_INFO_VERSION);
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dinfo.next_mode = cpu_to_le32(FW_DYNAMIC_INFO_NEXT_MODE_S);
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dinfo.next_addr = cpu_to_le32(kernel_entry);
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} else {
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dinfo.magic = cpu_to_le64(FW_DYNAMIC_INFO_MAGIC_VALUE);
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dinfo.version = cpu_to_le64(FW_DYNAMIC_INFO_VERSION);
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dinfo.next_mode = cpu_to_le64(FW_DYNAMIC_INFO_NEXT_MODE_S);
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dinfo.next_addr = cpu_to_le64(kernel_entry);
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}
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dinfo.options = 0;
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dinfo.boot_hart = 0;
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dinfo_len = sizeof(dinfo);
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/**
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* copy the dynamic firmware info. This information is specific to
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* OpenSBI but doesn't break any other firmware as long as they don't
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* expect any certain value in "a2" register.
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*/
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if (dinfo_len > (rom_size - reset_vec_size)) {
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error_report("not enough space to store dynamic firmware info");
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exit(1);
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}
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rom_add_blob_fixed_as("mrom.finfo", &dinfo, dinfo_len,
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rom_base + reset_vec_size,
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&address_space_memory);
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}
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void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts,
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hwaddr start_addr,
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hwaddr rom_base, hwaddr rom_size,
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uint64_t kernel_entry,
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uint32_t fdt_load_addr, void *fdt)
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{
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int i;
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uint32_t start_addr_hi32 = 0x00000000;
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if (!riscv_is_32bit(harts)) {
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start_addr_hi32 = start_addr >> 32;
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}
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/* reset vector */
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uint32_t reset_vec[10] = {
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0x00000297, /* 1: auipc t0, %pcrel_hi(fw_dyn) */
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0x02828613, /* addi a2, t0, %pcrel_lo(1b) */
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0xf1402573, /* csrr a0, mhartid */
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0,
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0,
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0x00028067, /* jr t0 */
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start_addr, /* start: .dword */
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start_addr_hi32,
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fdt_load_addr, /* fdt_laddr: .dword */
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0x00000000,
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/* fw_dyn: */
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};
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if (riscv_is_32bit(harts)) {
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reset_vec[3] = 0x0202a583; /* lw a1, 32(t0) */
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reset_vec[4] = 0x0182a283; /* lw t0, 24(t0) */
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} else {
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reset_vec[3] = 0x0202b583; /* ld a1, 32(t0) */
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reset_vec[4] = 0x0182b283; /* ld t0, 24(t0) */
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}
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/* copy in the reset vector in little_endian byte order */
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for (i = 0; i < ARRAY_SIZE(reset_vec); i++) {
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reset_vec[i] = cpu_to_le32(reset_vec[i]);
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}
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rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
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rom_base, &address_space_memory);
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riscv_rom_copy_firmware_info(machine, rom_base, rom_size, sizeof(reset_vec),
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kernel_entry);
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return;
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}
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void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr)
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{
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CPUState *cs;
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for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
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RISCVCPU *riscv_cpu = RISCV_CPU(cs);
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riscv_cpu->env.kernel_addr = kernel_addr;
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riscv_cpu->env.fdt_addr = fdt_addr;
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}
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}
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