Initial Commit
commit
a4b16006ff
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.pbxdir
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@ -0,0 +1,512 @@
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#
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# Makefile WANPIPE WAN Router Installation/Removal Makefile
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#
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# Copyright (c) 2007, Sangoma Technologies Inc.
|
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#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License
|
||||
# as published by the Free Software Foundation; either version
|
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# 2 of the License, or (at your option) any later version.
|
||||
# ----------------------------------------------------------------------------
|
||||
# Author: Nenad Corbic <ncorbic@sangoma.com>
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||||
#
|
||||
|
||||
PWD=$(shell pwd)
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KBUILD_VERBOSE=0
|
||||
CC=gcc
|
||||
LDCONFIG=/sbin/ldconfig
|
||||
|
||||
EXTRA_CFLAGS=
|
||||
EXTRA_FLAGS=
|
||||
|
||||
#Default zaptel directory to be overwritten by user
|
||||
|
||||
ifdef DAHDI_DIR
|
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ZAPDIR=$(DAHDI_DIR)
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endif
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||||
|
||||
ifndef ZAPDIR
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ZAPDIR=/usr/src/dahdi
|
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ifneq (,$(wildcard ./.pbxdir))
|
||||
ZAPDIR=$(shell cat .pbxdir)
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endif
|
||||
endif
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||||
|
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$(shell echo $(ZAPDIR) > .pbxdir)
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|
||||
#Kernel version and location
|
||||
ifndef KVER
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KVER=$(shell uname -r)
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endif
|
||||
ifndef KMOD
|
||||
KMOD=/lib/modules/$(KVER)
|
||||
endif
|
||||
ifndef KDIR
|
||||
KDIR=$(KMOD)/build
|
||||
endif
|
||||
ifndef KSRC
|
||||
KSRC=$(KMOD)/source
|
||||
endif
|
||||
ifndef KINSTDIR
|
||||
KINSTDIR=$(KMOD)/kernel
|
||||
endif
|
||||
|
||||
ifndef WARCH
|
||||
WARCH=$(shell uname -m)
|
||||
endif
|
||||
ifndef ASTDIR
|
||||
ASTDIR=/usr/src/asterisk
|
||||
endif
|
||||
|
||||
ifdef DESTDIR
|
||||
INSTALLPREFIX=$(DESTDIR)
|
||||
endif
|
||||
|
||||
ifndef INSTALLPREFIX
|
||||
INSTALLPREFIX=
|
||||
endif
|
||||
|
||||
ifndef LIBPREFIX
|
||||
LIBPREFIX=/usr
|
||||
endif
|
||||
|
||||
ifndef 64BIT_4G
|
||||
64BIT_4G="Disabled"
|
||||
else
|
||||
EXTRA_CFLAGS+= -DWANPIPE_64BIT_4G_DMA
|
||||
endif
|
||||
|
||||
ifndef 64BIT_2G
|
||||
64BIT_2G="Disabled"
|
||||
else
|
||||
EXTRA_CFLAGS+= -DWANPIPE_64BIT_2G_DMA
|
||||
endif
|
||||
|
||||
|
||||
#Local wanpipe includes
|
||||
WINCLUDE=kdrivers/include
|
||||
HWECINC=kdrivers/wanec/oct6100_api
|
||||
KMODDIR=kdrivers
|
||||
|
||||
#Location of wanpipe source in release
|
||||
WAN_DIR=$(PWD)/$(KMODDIR)/src/net
|
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WANEC_DIR=$(PWD)/$(KMODDIR)/wanec
|
||||
MODTYPE=ko
|
||||
|
||||
#Setup include path and extra cflags
|
||||
EXTRA_CFLAGS += -I$(PWD)/$(WINCLUDE) -I$(PWD)/$(WINCLUDE)/annexg -I$(PWD)/kdrivers/wanec -D__LINUX__
|
||||
EXTRA_CFLAGS += -I$(WANEC_DIR) -I$(WANEC_DIR)/oct6100_api -I$(WANEC_DIR)/oct6100_api/include
|
||||
|
||||
#Setup utility extra flags and include path
|
||||
EXTRA_UTIL_FLAGS = -I$(PWD)/$(WINCLUDE) -I$(INSTALLPREFIX)/include -I$(INSTALLPREFIX)/usr/include -L$(INSTALLPREFIX)/lib
|
||||
EXTRA_UTIL_FLAGS += -I$(PWD)/kdrivers/wanec -I$(PWD)/kdrivers/wanec/oct6100_api/include
|
||||
|
||||
ENABLE_WANPIPEMON_ZAP=NO
|
||||
ZAPHDLC_PRIV=/etc/wanpipe/.zaphdlc
|
||||
|
||||
PRODUCT_DEFINES= -DCONFIG_PRODUCT_WANPIPE_BASE -DCONFIG_PRODUCT_WANPIPE_AFT -DCONFIG_PRODUCT_WANPIPE_AFT_CORE
|
||||
PRODUCT_DEFINES+= -DCONFIG_PRODUCT_WANPIPE_AFT_TE1 -DCONFIG_PRODUCT_WANPIPE_AFT_TE3 -DCONFIG_PRODUCT_WANPIPE_AFT_56K
|
||||
PRODUCT_DEFINES+= -DCONFIG_WANPIPE_HWEC -DCONFIG_PRODUCT_WANPIPE_SOCK_DATASCOPE -DCONFIG_PRODUCT_WANPIPE_AFT_BRI -DCONFIG_PRODUCT_WANPIPE_AFT_SERIAL
|
||||
PRODUCT_DEFINES+= -DCONFIG_PRODUCT_WANPIPE_TDM_VOICE_DCHAN -DCONFIG_PRODUCT_WANPIPE_CODEC_SLINEAR_LAW -DCONFIG_PRODUCT_WANPIPE_AFT_RM
|
||||
PRODUCT_DEFINES+= -DCONFIG_PRODUCT_WANPIPE_USB -DCONFIG_PRODUCT_WANPIPE_A700 -DCONFIG_PRODUCT_A600 -DCONFIG_PRODUCT_WANPIPE_AFT_A600 -DCONFIG_PRODUCT_WANPIPE_AFT_A700
|
||||
PRODUCT_DEFINES+= -DCONFIG_PRODUCT_WANPIPE_AFT_B601 -DCONFIG_PRODUCT_WANPIPE_AFT_B800
|
||||
|
||||
EXTRA_CFLAGS += $(EXTRA_FLAGS) $(PRODUCT_DEFINES)
|
||||
EXTRA_UTIL_FLAGS += $(PRODUCT_DEFINES)
|
||||
DAHDI_CFLAGS=
|
||||
|
||||
|
||||
|
||||
|
||||
#Check if zaptel exists
|
||||
ifneq (,$(wildcard $(ZAPDIR)/zaptel.h))
|
||||
ZAPDIR_PRIV=$(ZAPDIR)
|
||||
ENABLE_WANPIPEMON_ZAP=YES
|
||||
DAHDI_CFLAGS+= -DSTANDALONE_ZAPATA -DBUILDING_TONEZONE
|
||||
ZAP_OPTS= --zaptel-path=$(ZAPDIR)
|
||||
ZAP_PROT=TDM
|
||||
PROTS=DEF-TDM
|
||||
else
|
||||
ifneq (,$(wildcard $(ZAPDIR)/kernel/zaptel.h))
|
||||
ZAPDIR_PRIV=$(ZAPDIR)
|
||||
ENABLE_WANPIPEMON_ZAP=YES
|
||||
DAHDI_CFLAGS+= -DSTANDALONE_ZAPATA -DBUILDING_TONEZONE -I$(ZAPDIR)/kernel
|
||||
ZAP_OPTS= --zaptel-path=$(ZAPDIR)
|
||||
ZAP_PROT=TDM
|
||||
PROTS=DEF-TDM
|
||||
else
|
||||
ifneq (,$(wildcard $(ZAPDIR)/include/dahdi/version.h))
|
||||
ZAPDIR_PRIV=$(ZAPDIR)
|
||||
ENABLE_WANPIPEMON_ZAP=YES
|
||||
DAHDI_CFLAGS+= -DSTANDALONE_ZAPATA -DCONFIG_PRODUCT_WANPIPE_TDM_VOICE_DCHAN_ZAPTEL -DDAHDI_ISSUES -DBUILDING_TONEZONE -I$(ZAPDIR)/include -I$(ZAPDIR)/include/dahdi -I$(ZAPDIR)/drivers/dahdi
|
||||
ifneq (,$(wildcard $(ZAPDIR)/drivers/dahdi/Makefile))
|
||||
ZAP_OPTS= --zaptel-path=$(ZAPDIR)/drivers/dahdi/
|
||||
endif
|
||||
ZAP_PROT=TDM
|
||||
PROTS=DEF-TDM
|
||||
DAHDI_MAJOR := $(shell cat $(ZAPDIR)/include/dahdi/version.h | grep define | cut -d'"' -f2 | cut -d'.' -f1)
|
||||
DAHDI_MINOR := $(shell cat $(ZAPDIR)/include/dahdi/version.h | grep define | cut -d'"' -f2 | cut -d'.' -f2)
|
||||
DAHDI_VER=-DDAHDI_$(DAHDI_MAJOR)$(DAHDI_MINOR)
|
||||
DAHDI_CFLAGS+= $(DAHDI_VER)
|
||||
else
|
||||
ZAP_OPTS=
|
||||
ZAP_PROT=
|
||||
ZAPDIR_PRIV=
|
||||
ENABLE_WANPIPEMON_ZAP=NO
|
||||
PROTS=DEF
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
|
||||
EXTRA_CFLAGS += -I$(KDIR)/include/linux -I$(ZAPDIR)
|
||||
|
||||
RM = @rm -rf
|
||||
JUNK = *~ *.bak DEADJOE
|
||||
|
||||
#Check for PDE_DATA kernel feature
|
||||
ifneq (,$(wildcard $(KDIR)/include/linux/proc_fs.h))
|
||||
KERN_PROC_PDE_FEATURE=$(shell grep PDE_DATA $(KDIR)/include/linux/proc_fs.h -c)
|
||||
EXTRA_CFLAGS+=-DKERN_PROC_PDE_FEATURE=$(KERN_PROC_PDE_FEATURE)
|
||||
else
|
||||
KERN_PROC_PDE_FEATURE=$(shell grep PDE_DATA $(KSRC)/include/linux/proc_fs.h -c)
|
||||
EXTRA_CFLAGS+=-DKERN_PROC_PDE_FEATURE=$(KERN_PROC_PDE_FEATURE)
|
||||
endif
|
||||
|
||||
ifneq (,$(wildcard $(KDIR)/include/net/sock.h))
|
||||
KERN_SK_FOR_NODE_FEATURE=$(shell grep "sk_for_each.*node" $(KDIR)/include/net/sock.h -c)
|
||||
EXTRA_CFLAGS+=-DKERN_SK_FOR_NODE_FEATURE=$(KERN_SK_FOR_NODE_FEATURE)
|
||||
else
|
||||
KERN_SK_FOR_NODE_FEATURE=$(shell grep "sk_for_each.*node" $(KSRC)/include/net/sock.h -c)
|
||||
EXTRA_CFLAGS+=-DKERN_SK_FOR_NODE_FEATURE=$(KERN_SK_FOR_NODE_FEATURE)
|
||||
endif
|
||||
|
||||
|
||||
# First pass, kernel Makefile reads module objects
|
||||
ifneq ($(KERNELRELEASE),)
|
||||
obj-m := sdladrv.o wanrouter.o wanpipe.o wanpipe_syncppp.o wanec.o
|
||||
|
||||
# Second pass, the actual build.
|
||||
else
|
||||
|
||||
#This will check for zaptel, kenrel source and build utilites and kernel modules
|
||||
#within local directory structure
|
||||
|
||||
all: freetdm
|
||||
|
||||
all_wan: cleanup_local _checkzap _checksrc all_bin_kmod all_util all_lib
|
||||
|
||||
all_src_dahdi: cleanup_local _checkzap _checksrc all_kmod_dahdi all_util all_lib
|
||||
|
||||
all_src: cleanup_local _checksrc all_kmod all_util all_lib
|
||||
|
||||
all_src_ss7: cleanup_local _checkzap _checksrc all_kmod_ss7 all_util all_lib
|
||||
|
||||
dahdi: all_src_dahdi
|
||||
|
||||
zaptel: dahdi
|
||||
|
||||
freetdm: all_src
|
||||
@touch .no_legacy_smg
|
||||
|
||||
openzap:freetdm
|
||||
smg: freetdm
|
||||
fs: freetdm
|
||||
g3ti: freetdm
|
||||
|
||||
openzap_ss7: all_src_ss7 all_lib
|
||||
|
||||
tdmapi: all_src all_lib
|
||||
|
||||
cleanup_local:
|
||||
@rm -f .all* 2> /dev/null;
|
||||
@rm -f .no_legacy_smg 2> /dev/null;
|
||||
|
||||
|
||||
|
||||
#Build only kernel modules
|
||||
all_kmod_dahdi: _checkzap _checksrc _cleanoldwanpipe _check_kver
|
||||
$(MAKE) KBUILD_VERBOSE=$(KBUILD_VERBOSE) -C $(KDIR) SUBDIRS=$(WAN_DIR) EXTRA_FLAGS="$(EXTRA_CFLAGS) $(DAHDI_CFLAGS) $(shell cat .//kfeatures)" ZAPDIR=$(ZAPDIR_PRIV) ZAPHDLC=$(ZAPHDLC_PRIV) HOMEDIR=$(PWD) modules
|
||||
|
||||
all_kmod: _checksrc _cleanoldwanpipe _check_kver
|
||||
$(MAKE) KBUILD_VERBOSE=$(KBUILD_VERBOSE) -C $(KDIR) SUBDIRS=$(WAN_DIR) EXTRA_FLAGS="$(EXTRA_CFLAGS) $(shell cat .//kfeatures)" ZAPDIR= ZAPHDLC= HOMEDIR=$(PWD) modules
|
||||
|
||||
all_kmod_ss7: _checkzap _checksrc _cleanoldwanpipe _check_kver
|
||||
@if [ -e $(PWD)/ss7_build_dir ]; then \
|
||||
rm -rf $(PWD)/ss7_build_dir; \
|
||||
fi
|
||||
@mkdir -p $(PWD)/ss7_build_dir
|
||||
./Setup drivers --builddir=$(PWD)/ss7_build_dir --with-linux=$(KDIR) $(ZAP_OPTS) --usr-cc=$(CC) --protocol=AFT_TE1-XMTP2 --no-zaptel-compile --noautostart --arch=$(WARCH) --silent
|
||||
@eval ".//copy_modules.sh $(PWD)/ss7_build_dir $(WAN_DIR)"
|
||||
|
||||
all_bin_kmod: _checkzap _checksrc _cleanoldwanpipe _check_kver
|
||||
@if [ -e $(PWD)/ast_build_dir ]; then \
|
||||
rm -rf $(PWD)/ast_build_dir; \
|
||||
fi
|
||||
@mkdir -p $(PWD)/ast_build_dir
|
||||
./Setup drivers --builddir=$(PWD)/ast_build_dir --with-linux=$(KDIR) $(ZAP_OPTS) --usr-cc=$(CC) --protocol=$(PROTS) --no-zaptel-compile --noautostart --arch=$(WARCH) --silent
|
||||
@eval ".//copy_modules.sh $(PWD)/ast_build_dir $(WAN_DIR)"
|
||||
|
||||
|
||||
#Clean utilites and kernel modules
|
||||
.PHONY: clean
|
||||
clean: cleanup_local clean_util _cleanoldwanpipe
|
||||
$(MAKE) -C $(KDIR) SUBDIRS=$(WAN_DIR) clean
|
||||
$(MAKE) -C api SUBDIRS=$(WAN_DIR) clean
|
||||
@find kdrivers -name '.*.cmd' | xargs rm -f
|
||||
@find . -name 'Module.symver*' | xargs rm -f
|
||||
@if [ -e .no_legacy_smg ]; then \
|
||||
rm -f .no_legacy_smg; \
|
||||
fi
|
||||
|
||||
|
||||
|
||||
#Clean old wanpipe headers from linux include
|
||||
.PHONY: _cleanoldwanpipe
|
||||
_cleanoldwanpipe: _checksrc
|
||||
@eval ".//build_links.sh"
|
||||
@eval ".//clean_old_wanpipe.sh $(WINCLUDE) $(KDIR)/include/linux"
|
||||
|
||||
|
||||
#Check for linux headers
|
||||
.PHONY: _checksrc
|
||||
_checksrc:
|
||||
@if [ ! -e $(KDIR) ]; then \
|
||||
echo " Error linux headers/source not found: $(KDIR) !"; \
|
||||
echo ; \
|
||||
exit 1; \
|
||||
fi
|
||||
@if [ ! -e $(KDIR)/.config ]; then \
|
||||
echo " Error linux headers/source not configured: missing $(KDIR)/.config !"; \
|
||||
echo ; \
|
||||
exit 1; \
|
||||
fi
|
||||
@if [ ! -e $(KDIR)/include ]; then \
|
||||
echo " Error linux headers/source incomplete: missing $(KDIR)/include dir !"; \
|
||||
echo ; \
|
||||
exit 1; \
|
||||
fi
|
||||
|
||||
.PHONY: _check_kver
|
||||
_check_kver:
|
||||
@eval ".//kern_i_private_check.sh $(KDIR)"
|
||||
@echo > .//kfeatures;
|
||||
@if [ -e .//i_private_found ]; then \
|
||||
echo "-DWANPIPE_USE_I_PRIVATE " >> .//kfeatures; \
|
||||
fi
|
||||
|
||||
#Check for zaptel
|
||||
.PHONY: _checkzap
|
||||
_checkzap:
|
||||
@echo
|
||||
@echo " +--------- Wanpipe Build Info --------------+"
|
||||
@echo
|
||||
@if [ ! -e $(ZAPDIR)/zaptel.h ] && [ ! -e $(ZAPDIR)/kernel/zaptel.h ] && [ ! -e $(ZAPDIR)/include/dahdi/kernel.h ] ; then \
|
||||
echo " ZAPTEL/DAHDI Support: Disabled"; \
|
||||
ZAPDIR_PRIV=; \
|
||||
ENABLE_WANPIPEMON_ZAP=NO; \
|
||||
else \
|
||||
if [ -e $(ZAPDIR)/include/dahdi/kernel.h ]; then \
|
||||
echo " ZAPTEL/DAHDI Support: DAHDI Enabled"; \
|
||||
echo " DAHDI Dir : $(ZAPDIR)"; \
|
||||
echo; \
|
||||
ZAPDIR_PRIV=$(ZAPDIR); \
|
||||
ENABLE_WANPIPEMON_ZAP=YES; \
|
||||
if [ -f $(ZAPDIR)/drivers/dahdi/Module.symvers ]; then \
|
||||
cp -f $(ZAPDIR)/drivers/dahdi/Module.symvers $(WAN_DIR)/; \
|
||||
elif [ -f $(ZAPDIR)/src/dahdi-headers/drivers/dahdi/Module.symvers ]; then \
|
||||
cp -f $(ZAPDIR)/src/dahdi-headers/drivers/dahdi/Module.symvers $(WAN_DIR)/; \
|
||||
else \
|
||||
echo "Error: Dahdi source not compiled, missing Module.symvers file"; \
|
||||
echo " Please recompile Dahdi directory first"; \
|
||||
fi; \
|
||||
else \
|
||||
echo " ZAPTEL/DAHDI Support: ZAPTEL Enabled"; \
|
||||
echo " ZAPTEL Dir : $(ZAPDIR)"; \
|
||||
echo; \
|
||||
eval "$(PWD)//sangoma-zaptel-patch.sh $(ZAPDIR)"; \
|
||||
ZAPDIR_PRIV=$(ZAPDIR); \
|
||||
ENABLE_WANPIPEMON_ZAP=YES; \
|
||||
if [ -f $(ZAPDIR)/kernel/Module.symvers ]; then \
|
||||
cp -f $(ZAPDIR)/kernel/Module.symvers $(WAN_DIR)/; \
|
||||
elif [ -f $(ZAPDIR)/Module.symvers ]; then \
|
||||
cp -f $(ZAPDIR)/Module.symvers $(WAN_DIR)/; \
|
||||
else \
|
||||
echo "Error: Zaptel source not compiled, missing Module.symvers file"; \
|
||||
echo " Please recompile zaptel directory first"; \
|
||||
fi; \
|
||||
echo ; \
|
||||
fi \
|
||||
fi
|
||||
@echo
|
||||
@echo " +-------------------------------------------+"
|
||||
@echo
|
||||
@sleep 2;
|
||||
|
||||
#Install all utilities etc and modules
|
||||
.PHONY: install
|
||||
install: install_etc install_util install_kmod install_inc
|
||||
@if [ -e .all_lib ] ; then \
|
||||
$(MAKE) -C api/libsangoma install DESTDIR=$(INSTALLPREFIX); \
|
||||
$(MAKE) -C api/libstelephony install DESTDIR=$(INSTALLPREFIX); \
|
||||
if [ "$(shell id -u)" = "0" ]; then \
|
||||
$(LDCONFIG) ; \
|
||||
fi \
|
||||
fi
|
||||
|
||||
|
||||
#Install kernel modules only
|
||||
.PHONY: install_kmod
|
||||
install_kmod:
|
||||
install -m 644 -D $(WAN_DIR)/wanrouter.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/net/wanrouter/wanrouter.${MODTYPE}
|
||||
install -m 644 -D $(WAN_DIR)/af_wanpipe.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/net/wanrouter/af_wanpipe.${MODTYPE}
|
||||
install -m 644 -D $(WAN_DIR)/wanec.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/net/wanrouter/wanec.${MODTYPE}
|
||||
install -m 644 -D $(WAN_DIR)/wan_aften.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/net/wanrouter/wan_aften.${MODTYPE}
|
||||
install -m 644 -D $(WAN_DIR)/sdladrv.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/drivers/net/wan/sdladrv.${MODTYPE}
|
||||
install -m 644 -D $(WAN_DIR)/wanpipe.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/drivers/net/wan/wanpipe.${MODTYPE}
|
||||
@rm -f $(INSTALLPREFIX)/$(KINSTDIR)/drivers/net/wan/wanpipe_syncppp.${MODTYPE}
|
||||
@if [ -f $(WAN_DIR)/wanpipe_syncppp.${MODTYPE} ]; then \
|
||||
echo "install -m 644 -D $(WAN_DIR)/wanpipe_syncppp.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/drivers/net/wan/wanpipe_syncppp.${MODTYPE}"; \
|
||||
install -m 644 -D $(WAN_DIR)/wanpipe_syncppp.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/drivers/net/wan/wanpipe_syncppp.${MODTYPE}; \
|
||||
fi
|
||||
@rm -f $(INSTALLPREFIX)/$(KINSTDIR)/net/wanrouter/wanpipe_lip.${MODTYPE};
|
||||
@if [ -f $(WAN_DIR)/wanpipe_lip.${MODTYPE} ]; then \
|
||||
echo "install -m 644 -D $(WAN_DIR)/wanpipe_lip.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/net/wanrouter/wanpipe_lip.${MODTYPE}"; \
|
||||
install -m 644 -D $(WAN_DIR)/wanpipe_lip.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/net/wanrouter/wanpipe_lip.${MODTYPE}; \
|
||||
fi
|
||||
@rm -f $(INSTALLPREFIX)/$(KINSTDIR)/drivers/net/wan/xmtp2km.${MODTYPE}
|
||||
@if [ -f $(WAN_DIR)/xmtp2km.${MODTYPE} ]; then \
|
||||
echo "install -m 644 -D $(WAN_DIR)/xmtp2km.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/drivers/net/wan/xmtp2km.${MODTYPE}"; \
|
||||
install -m 644 -D $(WAN_DIR)/xmtp2km.${MODTYPE} $(INSTALLPREFIX)/$(KINSTDIR)/drivers/net/wan/xmtp2km.${MODTYPE}; \
|
||||
fi
|
||||
@eval ".//rundepmod.sh"
|
||||
|
||||
endif
|
||||
|
||||
#Compile utilities only
|
||||
all_util: all_lib
|
||||
$(MAKE) -C util all EXTRA_FLAGS="$(EXTRA_UTIL_FLAGS)" SYSINC="$(PWD)/$(WINCLUDE) -I $(PWD)/api/libsangoma/include" CC=$(CC) \
|
||||
PREFIX=$(INSTALLPREFIX) HOSTCFLAGS="$(EXTRA_UTIL_FLAGS)" ARCH=$(WARCH)
|
||||
$(MAKE) -C util all_wancfg EXTRA_FLAGS="$(EXTRA_UTIL_FLAGS)" SYSINC="$(PWD)/$(WINCLUDE) -I$(PWD)/api/libsangoma/include" CC=$(CC) \
|
||||
PREFIX=$(INSTALLPREFIX) HOSTCFLAGS="$(EXTRA_UTIL_FLAGS)" HOSTCFLAGS="$(EXTRA_UTIL_FLAGS)" ARCH=$(WARCH) 2> /dev/null
|
||||
|
||||
all_lib:
|
||||
@if [ ! -f api/libsangoma/Makefile ] ; then \
|
||||
$(shell echo "Bootstraping libsangoma ..."; cd api/libsangoma; ./init-automake.sh >> $(PWD)/.cfg_log; ./configure --prefix=$(LIBPREFIX) >> $(PWD)/.cfg_log;) ; \
|
||||
fi
|
||||
$(MAKE) -C api/libsangoma all
|
||||
@if [ ! -f api/libstelephony/Makefile ] ; then \
|
||||
$(shell echo "Bootstraping libstelephony"; cd api/libstelephony; ./init-automake.sh >> $(PWD)/.cfg_log; ./configure --prefix=$(LIBPREFIX) >> $(PWD)/.cfg_log;) ; \
|
||||
fi
|
||||
$(MAKE) -C api/libstelephony all
|
||||
@touch .all_lib
|
||||
|
||||
install_lib:
|
||||
$(MAKE) -C api/libsangoma install DESTDIR=$(INSTALLPREFIX)
|
||||
$(MAKE) -C api/libstelephony install DESTDIR=$(INSTALLPREFIX)
|
||||
|
||||
#Clean utilities only
|
||||
.PHONY: clean_util
|
||||
clean_util:
|
||||
$(MAKE) -C util clean SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) PREFIX=$(INSTALLPREFIX)
|
||||
|
||||
#Install utilities only
|
||||
.PHONY: install_util
|
||||
install_util:
|
||||
$(MAKE) -C util install SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) PREFIX=$(INSTALLPREFIX)
|
||||
$(MAKE) -C util install_wancfg SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) PREFIX=$(INSTALLPREFIX)
|
||||
|
||||
.PHONY: install_smgbri
|
||||
install_smgbri:
|
||||
$(MAKE) -C ssmg/sangoma_mgd.trunk/ install SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) BRI=YES PREFIX=$(INSTALLPREFIX)
|
||||
$(MAKE) -C ssmg/libsangoma.trunk/ install DESTDIR=$(INSTALLPREFIX)
|
||||
$(MAKE) -C ssmg/sangoma_mgd.trunk/lib/libteletone install DESTDIR=$(INSTALLPREFIX)
|
||||
|
||||
.PHONY: install_bri
|
||||
install_bri:
|
||||
$(MAKE) -C ssmg/sangoma_bri/ install SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) DESTDIR=$(INSTALLPREFIX)
|
||||
|
||||
.PHONY: install_smgpri
|
||||
install_smgpri:
|
||||
$(MAKE) -C ssmg/sangoma_pri/ install SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) DESTDIR=$(INSTALLPREFIX)
|
||||
@if [ ! -e .no_legacy_smg ]; then \
|
||||
@echo "Installing Sangoma MGD"; \
|
||||
$(MAKE) -C ssmg/sangoma_mgd.trunk/ install SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) PRI=YES DESTDIR=$(INSTALLPREFIX) ; \
|
||||
fi
|
||||
install_pri:
|
||||
@eval "cd ssmg; ./get_sangoma_prid.sh; cd .."
|
||||
$(MAKE) -C ssmg/sangoma_pri/ install SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) DESTDIR=$(INSTALLPREFIX)
|
||||
|
||||
install_pri_freetdm:
|
||||
@eval "cd ssmg; ./get_sangoma_prid.sh; cd .."
|
||||
$(MAKE) -C ssmg/sangoma_pri/ install_libs install_freetdm_lib SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) DESTDIR=$(INSTALLPREFIX)
|
||||
|
||||
install_pri_freetdm_update:
|
||||
@eval "cd ssmg; ./get_sangoma_prid.sh --update; cd .."
|
||||
$(MAKE) -C ssmg/sangoma_pri/ install_libs install_freetdm_lib SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) DESTDIR=$(INSTALLPREFIX)
|
||||
|
||||
|
||||
install_pri_update:
|
||||
@eval "cd ssmg; ./get_sangoma_prid.sh --update; cd .."
|
||||
$(MAKE) -C ssmg/sangoma_pri/ install SYSINC=$(PWD)/$(WINCLUDE) CC=$(CC) DESTDIR=$(INSTALLPREFIX)
|
||||
|
||||
#Install etc files
|
||||
install_etc:
|
||||
@if [ ! -e $(INSTALLPREFIX)/etc/wanpipe ]; then \
|
||||
mkdir -p $(INSTALLPREFIX)/etc/wanpipe; \
|
||||
mkdir -p $(INSTALLPREFIX)/etc/wanpipe/util; \
|
||||
fi
|
||||
@if [ ! -e $(INSTALLPREFIX)/etc/wanpipe/wanrouter.rc ]; then \
|
||||
install -D -m 644 samples/wanrouter.rc $(INSTALLPREFIX)/etc/wanpipe/wanrouter.rc; \
|
||||
fi
|
||||
@if [ ! -e $(INSTALLPREFIX)/etc/wanpipe/lib ]; then \
|
||||
mkdir -p $(INSTALLPREFIX)/etc/wanpipe/lib; \
|
||||
fi
|
||||
@\cp -f util/wancfg_legacy/lib/* $(INSTALLPREFIX)/etc/wanpipe/lib/
|
||||
@\cp -rf firmware $(INSTALLPREFIX)/etc/wanpipe/
|
||||
@if [ ! -f $(INSTALLPREFIX)/etc/wanpipe/interfaces ]; then \
|
||||
mkdir -p $(INSTALLPREFIX)/etc/wanpipe/interfaces; \
|
||||
fi
|
||||
@\cp -rf samples $(INSTALLPREFIX)/etc/wanpipe
|
||||
@if [ ! -d $(INSTALLPREFIX)/etc/wanpipe/scripts ]; then \
|
||||
mkdir -p $(INSTALLPREFIX)/etc/wanpipe/scripts; \
|
||||
fi
|
||||
@\cp -rf wan_ec $(INSTALLPREFIX)/etc/wanpipe/
|
||||
@\rm -f $(INSTALLPREFIX)/etc/wanpipe/api/Makefile*
|
||||
@\cp -rf api $(INSTALLPREFIX)/etc/wanpipe/
|
||||
@\cp -rf scripts $(INSTALLPREFIX)/etc/wanpipe/
|
||||
@\cp -rf util/wan_aftup $(INSTALLPREFIX)/etc/wanpipe/util/
|
||||
@install -D -m 755 samples/wanrouter $(INSTALLPREFIX)/usr/sbin/wanrouter
|
||||
@echo
|
||||
@echo "Wanpipe etc installed in $(INSTALLPREFIX)/etc/wanpipe";
|
||||
@echo
|
||||
|
||||
install_inc:
|
||||
@if [ -e $(INSTALLPREFIX)/usr/include/wanpipe ]; then \
|
||||
\rm -rf $(INSTALLPREFIX)/usr/include/wanpipe; \
|
||||
fi
|
||||
@\mkdir -p $(INSTALLPREFIX)/usr/include/wanpipe
|
||||
@\cp -f $(PWD)/kdrivers/include/*.h $(INSTALLPREFIX)/usr/include/wanpipe/
|
||||
@\cp -rf $(PWD)/kdrivers/wanec/oct6100_api/include/* $(INSTALLPREFIX)/usr/include/wanpipe/
|
||||
@\cp -rf $(PWD)/kdrivers/wanec/*.h $(INSTALLPREFIX)/usr/include/wanpipe/
|
||||
@( cd $(INSTALLPREFIX)/usr/include/wanpipe; ln -s . linux; )
|
||||
@( cd $(INSTALLPREFIX)/usr/include/wanpipe; ln -s . oct6100_api; )
|
||||
|
||||
smgbri:
|
||||
@cd ssmg/libsangoma.trunk; ./configure --prefix=$(LIBPREFIX) ; cd ../..;
|
||||
$(MAKE) -C ssmg/libsangoma.trunk/ CC=$(CC) PREFIX=$(INSTALLPREFIX) KDIR=$(KDIR)
|
||||
@cd ssmg/sangoma_mgd.trunk/lib/libteletone; ./configure --prefix=$(LIBPREFIX) ; cd ../../..;
|
||||
$(MAKE) -C ssmg/sangoma_mgd.trunk/lib/libteletone CC=$(CC) PREFIX=$(INSTALLPREFIX) KDIR=$(KDIR)
|
||||
$(MAKE) -C ssmg/sangoma_mgd.trunk/ CC=$(CC) PREFIX=$(INSTALLPREFIX) KDIR=$(KDIR) ASTDIR=$(ASTDIR)
|
||||
|
||||
|
||||
.PHONY: clean_smgbri
|
||||
clean_smgbri:
|
||||
$(MAKE) -C ssmg/libsangoma.trunk/ clean CC=$(CC) PREFIX=$(INSTALLPREFIX) KDIR=$(KDIR)
|
||||
$(MAKE) -C ssmg/sangoma_mgd.trunk/lib/libteletone clean CC=$(CC) PREFIX=$(INSTALLPREFIX) KDIR=$(KDIR)
|
||||
$(MAKE) -C ssmg/sangoma_mgd.trunk/ clean CC=$(CC) PREFIX=$(INSTALLPREFIX) KDIR=$(KDIR)
|
||||
|
||||
.PHONY: distclean
|
||||
distclean: clean
|
||||
rm -f .pbxdir
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
# wanpipe-kernel-sources
|
||||
|
||||
This repo contains the kernel sources of sangomas wanpipe release 7.0.20
|
||||
|
||||
The primary goal should be to reorganize the sources to a more stable situation for modern kernels.
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
/*****************************************************************************
|
||||
* aft_a104.h WANPIPE(tm) S51XX Xilinx Hardware Support
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2003 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Oct 18, 2005 Nenad Corbic Initial version.
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
#ifndef __AFT_A104_H_
|
||||
#define __AFT_A104_H_
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
|
||||
int a104_global_chip_config(sdla_t *card);
|
||||
int a104_global_chip_unconfig(sdla_t *card);
|
||||
int a104_chip_config(sdla_t *card, wandev_conf_t*);
|
||||
int a104_chip_unconfig(sdla_t *card);
|
||||
int a104_chan_dev_config(sdla_t *card, void *chan);
|
||||
int a104_chan_dev_unconfig(sdla_t *card, void *chan);
|
||||
int a104_led_ctrl(sdla_t *card, int color, int led_pos, int on);
|
||||
int a104_test_sync(sdla_t *card, int tx_only);
|
||||
int a104_check_ec_security(sdla_t *card);
|
||||
int a104_set_digital_fe_clock(sdla_t *card);
|
||||
|
||||
|
||||
//int a104_write_fe (sdla_t* card, unsigned short off, unsigned char value);
|
||||
//unsigned char a104_read_fe (sdla_t* card, unsigned short off);
|
||||
int a104_write_fe (void *pcard, ...);
|
||||
unsigned char __a104_read_fe (void *pcard, ...);
|
||||
unsigned char a104_read_fe (void *pcard, ...);
|
||||
|
||||
int a56k_write_fe (void *pcard, ...);
|
||||
unsigned char __a56k_read_fe (void *pcard, ...);
|
||||
unsigned char a56k_read_fe (void *pcard, ...);
|
||||
|
||||
int aft_te1_write_cpld(sdla_t *card, unsigned short off, u_int16_t data);
|
||||
unsigned char aft_te1_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
|
||||
int aft_56k_write_cpld(sdla_t *card, unsigned short off, u_int16_t data);
|
||||
unsigned char aft_56k_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
|
||||
int a108m_write_cpld(sdla_t *card, unsigned short off, u_int16_t data);
|
||||
unsigned char a108m_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
|
||||
void a104_fifo_adjust(sdla_t *card,u32 level);
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,46 @@
|
|||
/*****************************************************************************
|
||||
* aft_analog.h WANPIPE(tm) S51XX Xilinx Hardware Support
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2003 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Oct 18, 2005 Nenad Corbic Initial version.
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
#ifndef __AFT_A104_ANALOG_H_
|
||||
#define __AFT_A104_ANALOG_H_
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
int aft_analog_global_chip_config(sdla_t *card);
|
||||
int aft_analog_global_chip_unconfig(sdla_t *card);
|
||||
int aft_analog_chip_config(sdla_t *card, wandev_conf_t *);
|
||||
int aft_analog_chip_unconfig(sdla_t *card);
|
||||
int aft_analog_chan_dev_config(sdla_t *card, void *chan);
|
||||
int aft_analog_chan_dev_unconfig(sdla_t *card, void *chan);
|
||||
int aft_analog_led_ctrl(sdla_t *card, int color, int led_pos, int on);
|
||||
int aft_analog_test_sync(sdla_t *card, int tx_only);
|
||||
int a200_check_ec_security(sdla_t *card);
|
||||
|
||||
int __aft_analog_write_fe (void* card, ...);
|
||||
int aft_analog_write_fe (void* card, ...);
|
||||
unsigned char __aft_analog_read_fe (void* card, ...);
|
||||
unsigned char aft_analog_read_fe (void* card, ...);
|
||||
|
||||
int aft_analog_write_cpld(sdla_t *card, unsigned short off,u_int16_t data);
|
||||
unsigned char aft_analog_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
|
||||
void aft_analog_fifo_adjust(sdla_t *card,u32 level);
|
||||
|
||||
#define IS_A700_ANALOG_CARD(card) (card->adptr_type == AFT_ADPTR_FLEXBRI && card->comm_port == 1)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,76 @@
|
|||
/*****************************************************************************
|
||||
* aft_bri.h WANPIPE(tm) BRI Hardware Support
|
||||
*
|
||||
* Authors: David Rokhvarg <davidr@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1984-2007 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* March 15, 2007 David Rokhvarg Initial version.
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef _AFT_BRI_H
|
||||
#define _AFT_BRI_H
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
#if 0
|
||||
#define A200_SECURITY_16_ECCHAN 0x00
|
||||
#define A200_SECURITY_32_ECCHAN 0x01
|
||||
#define A200_SECURITY_0_ECCHAN 0x05
|
||||
#define A200_ECCHAN(val) \
|
||||
((val) == A200_SECURITY_16_ECCHAN) ? 16 : \
|
||||
((val) == A200_SECURITY_32_ECCHAN) ? 32 : 0
|
||||
#endif
|
||||
|
||||
int aft_bri_global_chip_config(sdla_t *card);
|
||||
int aft_bri_global_chip_unconfig(sdla_t *card);
|
||||
int aft_bri_chip_config(sdla_t *card, wandev_conf_t*);
|
||||
int aft_bri_chip_unconfig(sdla_t *card);
|
||||
int aft_bri_chan_dev_config(sdla_t *card, void *chan);
|
||||
int aft_bri_chan_dev_unconfig(sdla_t *card, void *chan);
|
||||
int aft_bri_led_ctrl(sdla_t *card, int color, int led_pos, int on);
|
||||
int aft_bri_test_sync(sdla_t *card, int tx_only);
|
||||
int bri_check_ec_security(sdla_t *card);
|
||||
|
||||
int __aft_bri_write_fe (void* card, ...);
|
||||
int aft_bri_write_fe (void* card, ...);
|
||||
unsigned char __aft_bri_read_fe (void* card, ...);
|
||||
unsigned char aft_bri_read_fe (void* card, ...);
|
||||
|
||||
int aft_bri_write_cpld(sdla_t *card, unsigned short off,unsigned short data);
|
||||
unsigned char aft_bri_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
|
||||
void aft_bri_fifo_adjust(sdla_t *card,u32 level);
|
||||
|
||||
int aft_bri_dchan_transmit(sdla_t *card, void *chan_ptr, void *src_data_buffer, unsigned int buffer_len);
|
||||
int aft_bri_dchan_receive( sdla_t *card, void *chan_ptr, void *dst_data_buffer, unsigned int buffer_len);
|
||||
|
||||
|
||||
static __inline int
|
||||
aft_is_bri_nt_card(sdla_t *card)
|
||||
{
|
||||
return IS_BRI_NT_MOD(&(card)->fe.bri_param, WAN_FE_LINENO(&card->fe));
|
||||
}
|
||||
|
||||
static __inline int
|
||||
aft_is_bri_te_card(sdla_t *card)
|
||||
{
|
||||
return IS_BRI_TE_MOD(&(card)->fe.bri_param, WAN_FE_LINENO(&card->fe));
|
||||
}
|
||||
|
||||
static __inline int
|
||||
aft_is_bri_512khz_card(sdla_t *card)
|
||||
{
|
||||
return card->fe.bri_param.use_512khz_recovery_clock;
|
||||
}
|
||||
|
||||
#define IS_A700_CARD(card) (card->adptr_type == AFT_ADPTR_FLEXBRI)
|
||||
|
||||
#endif/* WAN_KERNEL */
|
||||
|
||||
#endif/* _AFT_BRI_H */
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,175 @@
|
|||
/******************************************************************************//**
|
||||
* \file aft_core_bert.h
|
||||
* \brief Definitions and implementation of
|
||||
* Software BERT for Sangoma AFT cards.
|
||||
*
|
||||
* Authors: David Rokhvarg <davidr@sangoma.com>
|
||||
*
|
||||
* Copyright (c) 2007 - 2010, Sangoma Technologies
|
||||
* All rights reserved.
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of the Sangoma Technologies nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Sangoma Technologies ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Sangoma Technologies BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* ===============================================================================
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _AFT_CORE_BERT_H
|
||||
#define _AFT_CORE_BERT_H
|
||||
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
# include "aft_core_options.h"
|
||||
# include "if_wanpipe_common.h" /* wanpipe_common_t */
|
||||
|
||||
|
||||
typedef struct _wp_bert {
|
||||
|
||||
wp_bert_sequence_type_t m_eSequenceType;
|
||||
size_t m_uiNumberOfIdenticalValues;
|
||||
size_t m_uiErrors;
|
||||
size_t m_uiSynchronizedCount;
|
||||
u8 m_bSynchronized;
|
||||
size_t m_uiNumberOfIdenticalValuesRequireToSynchronize;
|
||||
|
||||
u8 *m_pNextExpectedValue;
|
||||
u8 *m_pNextValue;
|
||||
|
||||
u8 *m_pSequenceBegin;
|
||||
u8 *m_pSequenceEnd;
|
||||
|
||||
u8 *m_pContext; /* an optional context */
|
||||
}wp_bert_t;
|
||||
|
||||
#define WP_BERT_SEQUENCE_LENGTH 257
|
||||
|
||||
/* Sequences supported by BERT */
|
||||
static u8 const wp_bert_random_sequence[WP_BERT_SEQUENCE_LENGTH]
|
||||
= { 15, 164, 118, 194, 69, 52, 47, 152, 122, 117, 44, 99, 150,
|
||||
185, 197, 226, 235, 146, 250, 135, 18, 76, 207, 115, 81,
|
||||
130, 232, 98, 153, 151, 145, 53, 253, 154, 224, 27, 14, 26,
|
||||
212, 131, 85, 95, 160, 241, 68, 203, 114, 62, 138, 83, 71,
|
||||
105, 3, 240, 156, 208, 175, 205, 107, 30, 251, 198, 40, 159,
|
||||
63, 173, 149, 169, 227, 75, 57, 46, 254, 113, 191, 24, 129,
|
||||
245, 142, 174, 100, 190, 37, 147, 28, 246, 77, 8, 230, 165,
|
||||
223, 93, 244, 111, 215, 4, 195, 242, 163, 58, 96, 219, 157,
|
||||
202, 210, 143, 13, 88, 181, 158, 243, 16, 120, 11, 214, 31,
|
||||
166, 255, 228, 91, 204, 218, 36, 19, 42, 148, 67, 29, 201,
|
||||
66, 23, 128, 87, 167, 136, 7, 193, 222, 200, 92, 144, 176,
|
||||
82, 108, 65, 172, 141, 252, 10, 234, 233, 171, 101, 54, 132,
|
||||
103, 236, 73, 61, 192, 79, 211, 221, 74, 50, 64, 180, 220,
|
||||
196, 187, 12, 102, 70, 104, 206, 0, 116, 133, 225, 170, 125,
|
||||
127, 124, 22, 209, 137, 126, 106, 186, 112, 162, 183, 237,
|
||||
238, 199, 33, 121, 155, 168, 139, 34, 216, 48, 231, 38, 51,
|
||||
5, 239, 1, 229, 84, 178, 35, 94, 43, 189, 161, 179, 90, 97,
|
||||
32, 134, 217, 6, 49, 2, 17, 56, 248, 123, 213, 89, 188, 86,
|
||||
72, 184, 39, 21, 25, 247, 55, 182, 119, 249, 140, 109, 41,
|
||||
177, 80, 45, 59, 60, 78, 20, 110, 111 };
|
||||
|
||||
static u8 const wp_bert_ascendant_sequence[WP_BERT_SEQUENCE_LENGTH]
|
||||
= { 'a', 's', 'c', 'e', 'n', 'd', 'a', 'n', 't', 1, 2, 3, 4,
|
||||
5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
|
||||
17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
|
||||
30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42,
|
||||
43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55,
|
||||
56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
|
||||
69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
|
||||
82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94,
|
||||
95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107,
|
||||
108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120,
|
||||
121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133,
|
||||
134, 135, 136, 137, 138, 139, 140, 141, 142, 142, 144, 145, 146,
|
||||
147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
|
||||
160, 161, 162, 163, 165, 166, 167, 168, 169, 170, 171, 172, 173,
|
||||
174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185,
|
||||
186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198,
|
||||
199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212,
|
||||
213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226,
|
||||
227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239,
|
||||
240, 241, 242, 243, 244, 245, 246, 247, 248 };
|
||||
|
||||
static u8 const wp_bert_descendant_sequence[WP_BERT_SEQUENCE_LENGTH]
|
||||
= { 'd', 'e', 's', 'c', 'd', 'a', 'n', 't', 249,
|
||||
248, 247, 246, 245, 244, 243, 242, 241, 240, 239,
|
||||
238, 237, 236, 235, 234, 233, 232, 231, 230, 229,
|
||||
228, 227, 226, 225, 224, 223, 222, 221, 220, 219,
|
||||
218, 217, 216, 215, 214, 213, 212, 211, 210, 209,
|
||||
208, 207, 206, 205, 204, 203, 202, 201, 200, 199,
|
||||
198, 197, 196, 195, 194, 193, 192, 191, 190, 189,
|
||||
188, 187, 186, 185, 184, 183, 182, 181, 180, 179,
|
||||
178, 177, 176, 175, 174, 173, 172, 171, 170, 169,
|
||||
168, 167, 166, 165, 164, 163, 162, 161, 160, 159,
|
||||
158, 157, 156, 155, 154, 153, 152, 151, 150, 149,
|
||||
148, 147, 146, 145, 144, 143, 142, 141, 140, 139,
|
||||
138, 137, 136, 135, 134, 133, 132, 131, 130, 129,
|
||||
128, 127, 126, 125, 124, 123, 122, 121, 120, 119,
|
||||
118, 117, 116, 115, 114, 113, 112, 111, 110, 109,
|
||||
108, 107, 106, 105, 104, 103, 102, 101, 100, 99,
|
||||
98, 97, 96, 95, 94, 93, 92, 91, 90, 89,
|
||||
88, 87, 86, 85, 84, 83, 82, 81, 80, 79,
|
||||
78, 77, 76, 75, 74, 73, 72, 71, 70, 69,
|
||||
68, 67, 66, 65, 64, 63, 62, 61, 60, 59,
|
||||
58, 57, 56, 55, 54, 53, 52, 51, 50, 49,
|
||||
48, 47, 46, 45, 44, 43, 42, 41, 40, 39,
|
||||
38, 37, 36, 35, 34, 33, 32, 31, 30, 29,
|
||||
28, 27, 26, 25, 24, 23, 22, 21, 20, 19,
|
||||
18, 17, 16, 15, 14, 13, 12, 11, 10, 9,
|
||||
8, 7, 6, 5, 4, 3, 2, 1 };
|
||||
|
||||
|
||||
/******** BERT functions *********/
|
||||
/** @brief reset */
|
||||
int wp_bert_reset(wp_bert_t *bert);
|
||||
|
||||
/** @brief change the type sequence used by this bert */
|
||||
int wp_bert_set_sequence_type(wp_bert_t *bert, wp_bert_sequence_type_t sequence_type);
|
||||
|
||||
/** @bried Get the number of times when the BERT entered in the
|
||||
synchronized state */
|
||||
u32 wp_bert_get_synchonized_count(wp_bert_t *bert);
|
||||
|
||||
/** @brief Get the number errors */
|
||||
u32 wp_bert_get_errors(wp_bert_t *bert);
|
||||
|
||||
/** @brief Returns 1 when the BERT is synchronized */
|
||||
u8 wp_bert_is_synchronized(wp_bert_t *bert);
|
||||
|
||||
/** @brief Return the next value to stream toward the remote BERT
|
||||
entity */
|
||||
u8 wp_bert_pop_value(wp_bert_t *bert, u8 *value);
|
||||
|
||||
/** @brief Push value in the BERT. This method return 1 if the
|
||||
BERT is synchronized and 0 otherwise. The expected value is
|
||||
also set when the BERT is not synchronized. */
|
||||
u8 wp_bert_push_value(wp_bert_t *bert, u8 current_value, u8 *expected_value);
|
||||
|
||||
/** @brief print current state of BERT */
|
||||
void wp_bert_print_state(wp_bert_t *bert);
|
||||
|
||||
/****** end of BERT functions *******/
|
||||
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
|
||||
#endif /* _AFT_CORE_BERT_H */
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
/*****************************************************************************
|
||||
* sdla_aft_te1_iface.h WANPIPE(tm) AFT Hardware Support
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2003 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Sep 27, 2005 Nenad Corbic Initial version.
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
typedef struct {
|
||||
|
||||
u32 init;
|
||||
|
||||
int (*hw_global_cfg) (sdla_t *card, wandev_conf_t* conf);
|
||||
int (*hw_cfg) (sdla_t *card, wandev_conf_t* conf);
|
||||
int (*hw_chan_cfg) (sdla_t *card, wandev_conf_t* conf);
|
||||
|
||||
int (*hw_global_uncfg) (sdla_t *card);
|
||||
int (*hw_uncfg) (sdla_t *card);
|
||||
int (*hw_chan_uncfg) (sdla_t *card, private_area_t *chan);
|
||||
|
||||
} aft_hw_iface_t;
|
||||
|
|
@ -0,0 +1,121 @@
|
|||
/*****************************************************************************
|
||||
* aft_core_options.h - Compile options for Sangoma WANPIPE Driver.
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
* David Rokhvarg <davidr@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2008 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef _AFT_CORE_OPTIONS_H
|
||||
#define _AFT_CORE_OPTIONS_H
|
||||
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
/*=================================================================
|
||||
* Feature Defines
|
||||
*================================================================*/
|
||||
|
||||
#if defined(__LINUX__) || defined(__WINDOWS__)
|
||||
# ifndef AFT_API_SUPPORT
|
||||
# define AFT_API_SUPPORT 1
|
||||
# endif
|
||||
#else
|
||||
#undef AFT_API_SUPPORT
|
||||
#endif
|
||||
|
||||
#if defined(__LINUX__) || defined(__WINDOWS__)
|
||||
# ifndef AFT_TDM_API_SUPPORT
|
||||
# define AFT_TDM_API_SUPPORT 1
|
||||
# endif
|
||||
#else
|
||||
#undef AFT_TDM_API_SUPPORT
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(__LINUX__)
|
||||
#ifndef AFT_RTP_SUPPORT
|
||||
# define AFT_RTP_SUPPORT 1
|
||||
#endif
|
||||
#else
|
||||
# undef AFT_RTP_SUPPORT
|
||||
#endif
|
||||
|
||||
#if 1
|
||||
#undef WAN_NO_INTR
|
||||
#else
|
||||
#define WAN_NO_INTR 1
|
||||
#pragma message ("Warning: WAN_NO_INTR Defined!!")
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
/********** compilation flags ************/
|
||||
/* compile protocols in the LIP layer */
|
||||
# define CONFIG_PRODUCT_WANPIPE_FR
|
||||
# define CONFIG_PRODUCT_WANPIPE_CHDLC
|
||||
# define CONFIG_PRODUCT_WANPIPE_PPP
|
||||
|
||||
# define CONFIG_PRODUCT_WANPIPE_LIP_LAPD
|
||||
|
||||
/* compile AFT 56k code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT_56K
|
||||
/* compile "old" AFT T1/E1 code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT
|
||||
/* compile "new/shark" AFT T1/E1 code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT_TE1
|
||||
/* compile AFT A200 Analog code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT_RM
|
||||
# define CONFIG_WANPIPE_PRODUCT_AFT_RM
|
||||
|
||||
/* compile AFT B600 Analog - 4 FXO / 1 FXS code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT_A600
|
||||
|
||||
/* compile AFT B700 4 BRI and 2 Analog - FXO or FXS code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT_A700
|
||||
|
||||
/* compile HWEC code */
|
||||
# define CONFIG_WANPIPE_HWEC
|
||||
/* compile ADSL code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_ADSL
|
||||
/* compile ISDN BRI code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT_BRI
|
||||
# define CONFIG_WANPIPE_PRODUCT_AFT_BRI
|
||||
|
||||
/* compile AFT Serial code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT_SERIAL
|
||||
|
||||
/* compile AFT Analog (2/4 FXO or 2/4 FXS) code */
|
||||
# define CONFIG_PRODUCT_WANPIPE_AFT_B800
|
||||
|
||||
|
||||
# define WAN_IS_TASKQ_SCHEDULE 1
|
||||
|
||||
/* compile TDM Voice API in wanpipe_tdm_api.c */
|
||||
# define BUILD_TDMV_API
|
||||
|
||||
# define SDLADRV_HW_IFACE
|
||||
|
||||
#if 0
|
||||
# define AFT_DMA_TRANSACTION
|
||||
# define AFT_LIST_DMA_DESCRIPTORS
|
||||
#endif
|
||||
|
||||
|
||||
// #define WANPIPE_PERFORMANCE_DEBUG
|
||||
|
||||
//#define AFT_TASKQ_DEBUG
|
||||
|
||||
/********** end of compilation flags ************/
|
||||
#endif/* __WINDOWS__ */
|
||||
|
||||
#endif/* WAN_KERNEL */
|
||||
#endif/* _AFT_CORE_OPTIONS_H */
|
||||
|
|
@ -0,0 +1,663 @@
|
|||
|
||||
/* aft_core_private.h */
|
||||
|
||||
#ifndef _AFT_CORE_PRIVATE_H
|
||||
#define _AFT_CORE_PRIVATE_H
|
||||
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
# include "aft_core_options.h"
|
||||
# include "if_wanpipe_common.h" /* wanpipe_common_t */
|
||||
# include "aft_core_user.h" /* aft_op_stats_t */
|
||||
# include "wanpipe_tdm_api.h" /* wanpipe_tdm_api_dev_t */
|
||||
# include "aft_core_bert.h" /* wp_bert_t */
|
||||
# include "wanpipe_mtp1.h"
|
||||
# include "sdla_gsm.h"
|
||||
|
||||
|
||||
/*=================================================================
|
||||
* Defines
|
||||
*================================================================*/
|
||||
|
||||
#define AFT_MIN_FRMW_VER 0x11
|
||||
#define AFT_TDMV_FRM_VER 0x11
|
||||
#define AFT_TDMV_FRM_CLK_SYNC_VER 0x14
|
||||
#define AFT_TDMV_SHARK_FRM_CLK_SYNC_VER 0x17
|
||||
#define AFT_TDMV_SHARK_A108_FRM_CLK_SYNC_VER 0x25
|
||||
#define AFT_56K_MIN_FRMW_VER 0x00
|
||||
#define AFT_SERIAL_MIN_FRMW_VER 0x04
|
||||
|
||||
#define AFT_MIN_ANALOG_FRMW_VER 0x05
|
||||
#define AFT_MIN_A600_FRMW_VER 0x01
|
||||
#define AFT_MIN_B601_FRMW_VER 0x03
|
||||
|
||||
#define A500_MAX_EC_CHANS 64
|
||||
|
||||
#define WP_ZAPTEL_ENABLED 0
|
||||
#define WP_ZAPTEL_DCHAN_OPTIMIZATION 1
|
||||
|
||||
#define WP_TDM_CHAN_API_ENABLED 0
|
||||
#define WP_TDM_SPAN_API_ENABLED 1
|
||||
#define WP_TDM_API_DCHAN_OPTIMIZATION 2
|
||||
|
||||
|
||||
/* Trigger on Number of transactions
|
||||
* 1= 1x8 byte transactions
|
||||
* 2= 2x8 byte transactions
|
||||
* 3= 3x8 byte transactions
|
||||
* 4= 4x8 byte transactions
|
||||
*/
|
||||
#define AFT_TDMV_FIFO_LEVEL 1
|
||||
#define AFT_TDMV_CIRC_BUF 128
|
||||
#define AFT_TDMV_CIRC_BUF_LEN 4
|
||||
#define AFT_TDMV_BUF_MASK 0x1FF
|
||||
|
||||
#define AFT_SS7_CTRL_LEN_MASK 0x0F
|
||||
#define AFT_SS7_CTRL_TYPE_BIT 4
|
||||
#define AFT_SS7_CTRL_FORCE_BIT 5
|
||||
|
||||
#define AFT_MAX_CHIP_SECURITY_CNT 100
|
||||
|
||||
#define AFT_FE_FIX_FIRM_VER 100
|
||||
|
||||
|
||||
#define MAX_IP_ERRORS 10
|
||||
|
||||
#define PORT(x) (x == 0 ? "PRIMARY" : "SECONDARY" )
|
||||
|
||||
/* Route Status options */
|
||||
#define NO_ROUTE 0x00
|
||||
#define ADD_ROUTE 0x01
|
||||
#define ROUTE_ADDED 0x02
|
||||
#define REMOVE_ROUTE 0x03
|
||||
|
||||
#define WP_WAIT 0
|
||||
#define WP_NO_WAIT 1
|
||||
|
||||
|
||||
/*=================================================================
|
||||
* Enum Defines
|
||||
*================================================================*/
|
||||
|
||||
|
||||
enum {
|
||||
TDM_RUNNING,
|
||||
TDM_PENDING,
|
||||
};
|
||||
|
||||
/* Private critical flags */
|
||||
enum {
|
||||
POLL_CRIT = PRIV_CRIT,
|
||||
CARD_DOWN,
|
||||
TE_CFG,
|
||||
CARD_HW_EC,
|
||||
CARD_MASTER_CLOCK,
|
||||
CARD_PORT_TASK_DOWN,
|
||||
CARD_PORT_TASK_RUNNING,
|
||||
CARD_WDT_TDM_TIMING,
|
||||
CARD_REF_PAUSE,
|
||||
CARD_REF_PAUSED,
|
||||
CARD_REF_OSC
|
||||
};
|
||||
|
||||
enum {
|
||||
LINK_DOWN = 0,
|
||||
DEVICE_DOWN,
|
||||
CRITICAL_DOWN
|
||||
};
|
||||
|
||||
|
||||
enum {
|
||||
TX_DMA_BUSY = 0,
|
||||
TX_HANDLER_BUSY,
|
||||
TX_INTR_PENDING,
|
||||
|
||||
RX_HANDLER_BUSY,
|
||||
RX_DMA_BUSY,
|
||||
RX_INTR_PENDING
|
||||
};
|
||||
|
||||
enum {
|
||||
AFT_FE_CFG_ERR = 0,
|
||||
AFT_FE_CFG,
|
||||
AFT_FE_INTR,
|
||||
AFT_FE_POLL,
|
||||
AFT_FE_TDM_RBS,
|
||||
AFT_FE_LED,
|
||||
AFT_FE_EC_POLL,
|
||||
AFT_FE_RESTART,
|
||||
AFT_RTP_TAP_Q,
|
||||
AFT_SERIAL_STATUS,
|
||||
AFT_CRITICAL_DOWN,
|
||||
AFT_FE_SET_CLOCK
|
||||
};
|
||||
|
||||
#define DECODE_AFT_PORT_TASK_CMD(cmd) \
|
||||
(cmd == AFT_FE_CFG_ERR) ? "AFT_FE_CFG_ERR" : \
|
||||
(cmd == AFT_FE_CFG) ? "AFT_FE_CFG" : \
|
||||
(cmd == AFT_FE_INTR) ? "AFT_FE_INTR" : \
|
||||
(cmd == AFT_FE_POLL) ? "AFT_FE_POLL" : \
|
||||
(cmd == AFT_FE_TDM_RBS) ? "AFT_FE_TDM_RBS" : \
|
||||
(cmd == AFT_FE_LED) ? "AFT_FE_LED" : \
|
||||
(cmd == AFT_FE_EC_POLL) ? "AFT_FE_EC_POLL" : \
|
||||
(cmd == AFT_FE_RESTART) ? "AFT_FE_RESTART" : \
|
||||
(cmd == AFT_RTP_TAP_Q) ? "AFT_RTP_TAP_Q" : \
|
||||
(cmd == AFT_SERIAL_STATUS) ? "AFT_SERIAL_STATUS" : \
|
||||
(cmd == AFT_CRITICAL_DOWN) ? "AFT_CRITICAL_DOWN" : \
|
||||
"Invalid AFT Poll cmd"
|
||||
|
||||
enum {
|
||||
MASTER_CLOCK_CHECK = 0,
|
||||
MASTER_CLOCK_SET
|
||||
};
|
||||
|
||||
|
||||
|
||||
enum {
|
||||
TX_DMA_BUF_INIT =0,
|
||||
TX_DMA_BUF_USED
|
||||
};
|
||||
|
||||
enum {
|
||||
WP_DEV_CONFIG = 0,
|
||||
WP_DEV_UP,
|
||||
};
|
||||
|
||||
|
||||
enum {
|
||||
/* DMA chain mode where interrupt is activated once per
|
||||
chain 2 buffers before the end of the chain. */
|
||||
WAN_AFT_DMA_CHAIN = 1,
|
||||
|
||||
/* DMA chain mode where interrupt is activated after each
|
||||
buffer in the chain. Used for underrun prevention
|
||||
in case the interrupt handler is slow or system busy.
|
||||
Used in transparent mode. This mode may introduce delay. */
|
||||
WAN_AFT_DMA_CHAIN_IRQ_ALL,
|
||||
|
||||
/* DMA chain mode disabled. One DMA buffer per interrupt */
|
||||
WAN_AFT_DMA_CHAIN_SINGLE
|
||||
};
|
||||
|
||||
enum {
|
||||
AFT_BG_TIMER_RUNNING,
|
||||
AFT_BG_TIMER_KILL,
|
||||
|
||||
AFT_BG_TIMER_CMD_NONE
|
||||
};
|
||||
|
||||
/*=================================================================
|
||||
* Private structures
|
||||
*================================================================*/
|
||||
|
||||
|
||||
#if 0
|
||||
typedef struct aft_dma_chain
|
||||
{
|
||||
unsigned long init;
|
||||
sdla_dma_addr_t dma_addr;
|
||||
u32 dma_len;
|
||||
u32 dma_map_len;
|
||||
netskb_t *skb;
|
||||
u32 index;
|
||||
|
||||
u32 dma_descr;
|
||||
u32 len_align;
|
||||
u32 reg;
|
||||
|
||||
u8 pkt_error;
|
||||
void* dma_virt;
|
||||
u32 dma_offset;
|
||||
u32 dma_toggle;
|
||||
#if defined(__FreeBSD__)
|
||||
bus_dma_tag_t dma_tag;
|
||||
bus_dmamap_t dmamap;
|
||||
int dma_ready;
|
||||
#endif
|
||||
}aft_dma_chain_t;
|
||||
#endif
|
||||
|
||||
|
||||
typedef struct wp_rx_element
|
||||
{
|
||||
unsigned int dma_addr;
|
||||
unsigned int reg;
|
||||
unsigned int align;
|
||||
unsigned short len;
|
||||
wan_bitmap_t pkt_error;
|
||||
}wp_rx_element_t;
|
||||
|
||||
|
||||
typedef struct aft_config
|
||||
{
|
||||
unsigned int aft_chip_cfg_reg;
|
||||
unsigned int aft_dma_control_reg;
|
||||
}aft_config_t;
|
||||
|
||||
static __inline u32 AFT_PORT_REG(sdla_t *card, u32 reg)
|
||||
{
|
||||
if (AFT_NEEDS_DEFAULT_REG_OFFSET(card->adptr_type)) {
|
||||
char comm_port = card->wandev.comm_port;
|
||||
if (card->adptr_type == AFT_ADPTR_W400) {
|
||||
/* Force GSM comm port to 0, as we fake ports in the driver */
|
||||
comm_port = 0;
|
||||
}
|
||||
if (reg < 0x100) {
|
||||
return (reg+0x1000);
|
||||
} else {
|
||||
return (reg+0x2000)+(0x8000*comm_port);
|
||||
}
|
||||
} else {
|
||||
if (reg < 0x100) {
|
||||
return reg;
|
||||
}
|
||||
return (reg+(0x4000*card->wandev.comm_port));
|
||||
}
|
||||
}
|
||||
|
||||
typedef struct dma_history{
|
||||
u8 end;
|
||||
u8 cur;
|
||||
u8 begin;
|
||||
u8 status;
|
||||
u8 loc;
|
||||
}dma_history_t;
|
||||
|
||||
#define MAX_DMA_HIST_SIZE 10
|
||||
#define MAX_AFT_DMA_CHAINS 16
|
||||
#define MAX_TX_BUF MAX_AFT_DMA_CHAINS*2+1
|
||||
#define MAX_RX_BUF MAX_AFT_DMA_CHAINS*4+1
|
||||
#define AFT_DMA_INDEX_OFFSET 0x200
|
||||
#define AFT_MAX_HDLC_REPEAT_SZ 16
|
||||
|
||||
|
||||
typedef struct aft_dma_ring
|
||||
{
|
||||
unsigned char rxdata[128];
|
||||
unsigned char txdata[128];
|
||||
}aft_dma_ring_t;
|
||||
|
||||
#define AFT_DMA_RING_MAX 4
|
||||
|
||||
typedef struct aft_dma_swring {
|
||||
int tx_toggle;
|
||||
int rx_toggle;
|
||||
aft_dma_ring_t rbuf[AFT_DMA_RING_MAX];
|
||||
}aft_dma_swring_t;
|
||||
|
||||
|
||||
/* List of Maintenance modes for 'maintenance_mode_bitmap'
|
||||
* in 'private_area_t'.
|
||||
* Currently only BERT is implemented. */
|
||||
enum wp_maintenance_modes {
|
||||
WP_MAINTENANCE_MODE_BERT=0
|
||||
};
|
||||
|
||||
|
||||
|
||||
typedef struct private_area
|
||||
{
|
||||
wanpipe_common_t common;/* MUST be at the top */
|
||||
sdla_t *card;
|
||||
u32 busy;
|
||||
|
||||
/************************************//**
|
||||
High priority - DMA Stuff
|
||||
****************************************/
|
||||
aft_dma_swring_t swring;
|
||||
|
||||
#if defined(__LINUX__) || defined(__WINDOWS__)
|
||||
wanpipe_tdm_api_dev_t *wp_tdm_api_dev;
|
||||
#endif
|
||||
|
||||
u32 dma_status;
|
||||
unsigned char hdlc_eng; /*!< hardware hdlc engine enabled/disabled */
|
||||
unsigned char tx_chain_indx,tx_pending_chain_indx,tx_chain_data_sz,tx_chain_sz;
|
||||
wan_dma_descr_t tx_dma_chain_table[MAX_AFT_DMA_CHAINS];
|
||||
|
||||
unsigned char rx_chain_indx,rx_pending_chain_indx,rx_chain_sz;
|
||||
wan_dma_descr_t rx_dma_chain_table[MAX_AFT_DMA_CHAINS];
|
||||
|
||||
wan_skb_queue_t wp_tx_pending_list;
|
||||
wan_skb_queue_t wp_tx_complete_list;
|
||||
wan_skb_queue_t wp_tx_hdlc_rpt_list;
|
||||
netskb_t *tx_dma_skb;
|
||||
u8 tx_dma_cnt;
|
||||
|
||||
wan_skb_queue_t wp_rx_free_list;
|
||||
wan_skb_queue_t wp_rx_complete_list;
|
||||
|
||||
wan_skb_queue_t wp_rx_stack_complete_list;
|
||||
wan_skb_queue_t wp_rx_bri_dchan_complete_list;
|
||||
|
||||
wan_skb_queue_t wp_dealloc_list;
|
||||
|
||||
u32 time_slot_map;
|
||||
unsigned char num_of_time_slots;
|
||||
int logic_ch_num;
|
||||
|
||||
wan_bitmap_t interface_down;
|
||||
unsigned char channelized_cfg;
|
||||
unsigned char tdmv_zaptel_cfg;
|
||||
|
||||
#if defined(__FreeBSD__)
|
||||
// int dma_ready;
|
||||
bus_dma_tag_t dma_rx_mtag;
|
||||
bus_dma_tag_t dma_tx_mtag;
|
||||
#endif
|
||||
|
||||
unsigned char dma_chain_opmode;
|
||||
unsigned char dma_chain_opmode_tx;
|
||||
unsigned char dma_chain_opmode_rx;
|
||||
|
||||
|
||||
wp_tdm_chan_stats_t chan_stats;
|
||||
|
||||
/************************************//**
|
||||
Medium priority - Operational Stuff
|
||||
****************************************/
|
||||
|
||||
/* Polling task queue. Each interface
|
||||
* has its own task queue, which is used
|
||||
* to defer events from the interrupt */
|
||||
wan_taskq_t poll_task;
|
||||
wan_timer_info_t poll_delay_timer;
|
||||
|
||||
u8 gateway;
|
||||
u8 true_if_encoding;
|
||||
|
||||
u8 idle_flag;
|
||||
u16 max_idle_size;
|
||||
wan_bitmap_t idle_start;
|
||||
|
||||
wan_bitmap_t pkt_error;
|
||||
u8 rx_fifo_err_cnt;
|
||||
|
||||
int first_time_slot;
|
||||
int last_time_slot;
|
||||
|
||||
netskb_t *tx_idle_skb;
|
||||
netskb_t *tx_hdlc_rpt_skb;
|
||||
netskb_t *tx_hdlc_rpt_on_close_skb;
|
||||
|
||||
unsigned char rx_dma;
|
||||
unsigned char pci_retry;
|
||||
|
||||
unsigned char fifo_size_code;
|
||||
unsigned char fifo_base_addr;
|
||||
unsigned char fifo_size;
|
||||
|
||||
int dma_mru;
|
||||
int mru,mtu;
|
||||
|
||||
void *prot_ch;
|
||||
int prot_state;
|
||||
|
||||
wan_trace_t trace_info;
|
||||
|
||||
int rx_no_data_cnt;
|
||||
|
||||
u32 dma_chain_status;
|
||||
u32 up;
|
||||
int tx_attempts;
|
||||
|
||||
unsigned char *tx_realign_buf;
|
||||
|
||||
unsigned char tslot_sync;
|
||||
|
||||
|
||||
unsigned int dma_index;
|
||||
|
||||
/* Used by ss7 mangle code */
|
||||
wp_api_hdr_t tx_api_hdr;
|
||||
unsigned char *tx_ss7_realign_buf;
|
||||
|
||||
int tdmv_chan;
|
||||
unsigned int tdmv_irq_cfg;
|
||||
|
||||
unsigned int tdmv_rx_delay;
|
||||
unsigned char tdmv_rx_delay_cfg;
|
||||
unsigned short max_tx_bufs;
|
||||
unsigned short max_tx_bufs_orig;
|
||||
|
||||
unsigned int ss7_force_rx;
|
||||
|
||||
unsigned char lip_atm;
|
||||
|
||||
|
||||
|
||||
int dchan_time_slot;
|
||||
int xmtp2_api_index;
|
||||
|
||||
netdevice_t *annexg_dev;
|
||||
unsigned char label[WAN_IF_LABEL_SZ+1];
|
||||
|
||||
unsigned char *udp_pkt_data;
|
||||
atomic_t udp_pkt_len;
|
||||
|
||||
unsigned int rx_filter_cnt;
|
||||
unsigned int rx_hdlc_filter_len;
|
||||
unsigned char rx_hdlc_filter[AFT_MAX_HDLC_REPEAT_SZ];
|
||||
|
||||
|
||||
struct private_area *next;
|
||||
|
||||
/************************************//**
|
||||
Low priority - Config Stuff
|
||||
****************************************/
|
||||
|
||||
|
||||
int rx_api_crc_bytes;
|
||||
unsigned char wp_api_op_mode;
|
||||
unsigned char wp_api_iface_mode;
|
||||
|
||||
unsigned int tdm_api_period;
|
||||
unsigned int tdm_api_chunk;
|
||||
|
||||
unsigned char protocol;
|
||||
unsigned short dma_per_ch;
|
||||
|
||||
int tracing_enabled; /* For enabling Tracing */
|
||||
wan_time_t router_start_time; /*unsigned long router_start_time;*/
|
||||
wan_ticks_t trace_timeout;
|
||||
|
||||
unsigned long tick_counter; /* For 5s timeout counter */
|
||||
wan_time_t router_up_time; /*unsigned long router_up_time;*/
|
||||
unsigned char mc; /* Mulitcast support on/off */
|
||||
|
||||
int if_cnt;
|
||||
char if_name[WAN_IFNAME_SZ+1];
|
||||
aft_op_stats_t opstats;
|
||||
aft_comm_err_stats_t errstats;
|
||||
|
||||
wan_xilinx_conf_if_t cfg;
|
||||
unsigned char usedby_cfg;
|
||||
unsigned int cfg_active_ch;
|
||||
|
||||
unsigned char rx_seq_char;
|
||||
unsigned char tx_seq_char;
|
||||
|
||||
|
||||
#if defined(__LINUX__)
|
||||
struct timeval timing_tv;
|
||||
/* Entry in proc fs per each interface */
|
||||
struct proc_dir_entry *dent;
|
||||
#endif
|
||||
|
||||
#ifdef AFT_DMA_HISTORY_DEBUG
|
||||
#warning "DMA History Enabled"
|
||||
dma_history_t dma_history[MAX_DMA_HIST_SIZE];
|
||||
#endif
|
||||
|
||||
u32 maintenance_mode_bitmap;
|
||||
wp_bert_t wp_bert;
|
||||
netskb_t *tx_bert_skb;
|
||||
u32 bert_data_length;
|
||||
u8 sw_hdlc_mode;
|
||||
void *sw_hdlc_dev;
|
||||
|
||||
unsigned int uart_rx_status;
|
||||
char uart_rx_buffer[AFT_GSM_UART_RX_FIFO_SIZE];
|
||||
unsigned int uart_rx_sz;
|
||||
|
||||
|
||||
#ifdef AFT_DMA_TRANSACTION
|
||||
#warning "AFT DMA Transaction History Enabled"
|
||||
#define AFT_TRANSACTION_HISTORY 20
|
||||
char transaction_history[AFT_TRANSACTION_HISTORY][512];
|
||||
int th_idx;
|
||||
#endif
|
||||
|
||||
unsigned char rbsbits;
|
||||
|
||||
}private_area_t;
|
||||
|
||||
|
||||
#ifdef AFT_DMA_TRANSACTION
|
||||
#define aft_transaction(chan,...) snprintf(chan->transaction_history[chan->th_idx],sizeof(chan->transaction_history[chan->th_idx]),## __VA_ARGS__);chan->th_idx++;if (chan->th_idx>=AFT_TRANSACTION_HISTORY) chan->th_idx=0;
|
||||
|
||||
static __inline void aft_transaction_list(private_area_t *chan)
|
||||
{
|
||||
int i;
|
||||
int idx=chan->th_idx;
|
||||
for (i=0;i<AFT_TRANSACTION_HISTORY;i++) {
|
||||
DEBUG_EVENT("%d/%d. %s\n",i,idx,chan->transaction_history[idx]);
|
||||
idx++;
|
||||
if (idx>=AFT_TRANSACTION_HISTORY) {
|
||||
idx=0;
|
||||
}
|
||||
}
|
||||
}
|
||||
#else
|
||||
#define aft_transaction(chan,...)
|
||||
#define aft_transaction_list(chan)
|
||||
#endif
|
||||
|
||||
void aft_free_logical_channel_num (sdla_t *card, int logic_ch);
|
||||
void aft_dma_max_logic_ch(sdla_t *card);
|
||||
|
||||
#undef AFT_FE_INTR_DEBUG
|
||||
|
||||
#ifdef AFT_FE_INTR_DEBUG
|
||||
void ___aft_fe_intr_ctrl(sdla_t *card, int status, char *func, int line);
|
||||
static __inline int ___aft_fe_intr_ctrl_locked(sdla_t *card, int status, char* func, int line)
|
||||
{
|
||||
wan_smp_flag_t smp_flags;
|
||||
wan_spin_lock_irq(&card->wandev.lock,&smp_flags);
|
||||
___aft_fe_intr_ctrl(card,status,func,line);
|
||||
wan_spin_unlock_irq(&card->wandev.lock,&smp_flags);
|
||||
return 0;
|
||||
}
|
||||
#define __aft_fe_intr_ctrl(card, status) ___aft_fe_intr_ctrl(card, status, (char*)__FUNCTION__,__LINE__)
|
||||
#define aft_fe_intr_ctrl(card, status) ___aft_fe_intr_ctrl_locked(card, status,(char*)__FUNCTION__,__LINE__)
|
||||
#else
|
||||
void aft_fe_intr_ctrl(sdla_t *card, int status);
|
||||
void __aft_fe_intr_ctrl(sdla_t *card, int status);
|
||||
#endif
|
||||
|
||||
void aft_wdt_set(sdla_t *card, unsigned char val);
|
||||
void aft_wdt_reset(sdla_t *card);
|
||||
int aft_free_running_timer_set_enable(sdla_t *card, u32 ms);
|
||||
int aft_free_running_timer_disable(sdla_t *card);
|
||||
void wanpipe_wake_stack(private_area_t* chan);
|
||||
int aft_core_api_event_init(sdla_t *card);
|
||||
int aft_event_ctrl(void *chan_ptr, wan_event_ctrl_t *p_event);
|
||||
int aft_core_tdmapi_event_init(private_area_t *chan);
|
||||
int wan_aft_api_ioctl(sdla_t *card, private_area_t *chan, char *user_data);
|
||||
int aft_dma_tx (sdla_t *card,private_area_t *chan);
|
||||
int aft_tdm_chan_ring_rsyinc(sdla_t * card, private_area_t *chan, int log );
|
||||
|
||||
|
||||
static __inline void wan_aft_skb_defered_dealloc(private_area_t *chan, netskb_t *skb)
|
||||
{
|
||||
if(chan->tx_bert_skb == skb){
|
||||
return;
|
||||
}
|
||||
|
||||
wan_skb_queue_tail(&chan->wp_dealloc_list,skb);
|
||||
WAN_TASKLET_SCHEDULE((&chan->common.bh_task));
|
||||
}
|
||||
|
||||
static __inline void wan_chan_dev_stop(private_area_t *chan)
|
||||
{
|
||||
wan_set_bit(0,&chan->busy);
|
||||
}
|
||||
static __inline void wan_chan_dev_start(private_area_t *chan)
|
||||
{
|
||||
wan_clear_bit(0,&chan->busy);
|
||||
}
|
||||
static __inline int wan_chan_dev_stopped(private_area_t *chan)
|
||||
{
|
||||
return wan_test_bit(0,&chan->busy);
|
||||
}
|
||||
|
||||
#ifdef AFT_TASKQ_DEBUG
|
||||
# define aft_core_taskq_trigger(card, cmd) __aft_core_taskq_trigger(card, cmd, __FUNCTION__, __LINE__)
|
||||
static __inline int __aft_core_taskq_trigger(sdla_t *card, int cmd, const char *func, int line)
|
||||
#else
|
||||
static __inline int aft_core_taskq_trigger(sdla_t *card, int cmd)
|
||||
#endif
|
||||
{
|
||||
if (wan_test_and_set_bit(cmd, &card->u.aft.port_task_cmd)) {
|
||||
DEBUG_TEST("%s: %s() trigger failed cmd %i already pending !\n",
|
||||
card->devname,__FUNCTION__,cmd);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (wan_test_bit(CARD_PORT_TASK_DOWN,&card->wandev.critical)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (wan_test_bit(CARD_PORT_TASK_RUNNING,&card->wandev.critical)){
|
||||
DEBUG_TEST("%s: %s() trigger failed due to PORT TASK Running %i!\n",
|
||||
card->devname,__FUNCTION__,cmd);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
#ifdef AFT_TASKQ_DEBUG
|
||||
DEBUG_TASKQ("%s: caller: %s():%d triggering for: cmd %s(%d)!\n",
|
||||
card->devname, func, line, DECODE_AFT_PORT_TASK_CMD(cmd), cmd);
|
||||
#endif
|
||||
|
||||
WAN_TASKQ_SCHEDULE((&card->u.aft.port_task));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#define WP_GET_DMA_OPMODE_RX(chan) (chan->dma_chain_opmode_rx?chan->dma_chain_opmode_rx:chan->dma_chain_opmode)
|
||||
#define WP_GET_DMA_OPMODE_TX(chan) (chan->dma_chain_opmode_tx?chan->dma_chain_opmode_tx:chan->dma_chain_opmode)
|
||||
|
||||
int aft_background_timer_kill(sdla_t* card);
|
||||
int aft_background_timer_add(sdla_t* card, unsigned long delay);
|
||||
|
||||
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__)
|
||||
void aft_background_timer_expire(void* pcard);
|
||||
#elif defined(__WINDOWS__)
|
||||
void aft_background_timer_expire(IN PKDPC Dpc, void* pcard, void* arg2, void* arg3);
|
||||
#else
|
||||
void aft_background_timer_expire(unsigned long pcard);
|
||||
#endif
|
||||
|
||||
int aft_fe_loop_back_status(sdla_t *card);
|
||||
int aft_hdlc_repeat_mangle(sdla_t *card,private_area_t *chan, netskb_t *skb, wp_api_hdr_t *tx_hdr, netskb_t **rkb);
|
||||
int aft_bh_rx(private_area_t* chan, netskb_t *new_skb, u8 pkt_error, int len);
|
||||
int aft_ss7_tx_mangle(sdla_t *card,private_area_t *chan, netskb_t *skb, wp_api_hdr_t *tx_hdr);
|
||||
|
||||
#ifdef AFT_LIST_DMA_DESCRIPTORS
|
||||
void aft_list_descriptors(private_area_t *chan);
|
||||
void aft_list_tx_descriptors(private_area_t *chan);
|
||||
#endif
|
||||
|
||||
#define CHAN_GLOBAL_IRQ_CFG(chan) (chan->channelized_cfg && !chan->hdlc_eng && !chan->sw_hdlc_mode)
|
||||
|
||||
#define AFT_HAS_FAKE_PORTS(card) (IS_BRI_CARD(card) || IS_GSM_CARD(card))
|
||||
#define AFT_HAS_FAKE_DCHAN(card) (IS_BRI_CARD(card) || IS_GSM_CARD(card))
|
||||
#define AFT_MAX_PORTS(card) IS_BRI_CARD(card) ? MAX_BRI_LINES : IS_GSM_CARD(card) ? MAX_GSM_MODULES : 16
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
/*****************************************************************************
|
||||
* aft_core_prot.h
|
||||
*
|
||||
* WANPIPE(tm) AFT CORE Hardware Support - Protocol/API
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2003-2008 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================*/
|
||||
|
||||
#ifndef __AFT_CORE_XMTP2__
|
||||
#define __AFT_CORE_XMTP2__
|
||||
|
||||
#include "aft_core_private.h"
|
||||
#include "wanpipe_timer_iface.h"
|
||||
|
||||
#ifdef CONFIG_PRODUCT_WANPIPE_ANNEXG
|
||||
# include "wanpipe_lapb_kernel.h"
|
||||
#endif
|
||||
|
||||
#if defined(AFT_XMTP2_API_SUPPORT)
|
||||
#include "xmtp2km_kiface.h"
|
||||
int wp_xmtp2_callback (void *prot_ptr, unsigned char *data, int len);
|
||||
#endif
|
||||
|
||||
int protocol_init (sdla_t*card,netdevice_t *dev,
|
||||
private_area_t *chan, wanif_conf_t* conf);
|
||||
int protocol_stop (sdla_t *card, netdevice_t *dev);
|
||||
int protocol_shutdown (sdla_t *card, netdevice_t *dev);
|
||||
void protocol_recv(sdla_t *card, private_area_t *chan, netskb_t *skb);
|
||||
|
||||
|
||||
#if defined(AFT_RTP_SUPPORT)
|
||||
int aft_rtp_config(sdla_t *card);
|
||||
void aft_rtp_unconfig(sdla_t *card);
|
||||
void aft_rtp_tap(void *card_ptr, u8 chan, u8* rx, u8* tx, u32 len);
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_PRODUCT_WANPIPE_ANNEXG
|
||||
int bind_annexg(netdevice_t *dev, netdevice_t *annexg_dev);
|
||||
netdevice_t * un_bind_annexg(wan_device_t *wandev, netdevice_t* annexg_dev_name);
|
||||
int get_map(wan_device_t*, netdevice_t*, struct seq_file* m, int*);
|
||||
void get_active_inactive(wan_device_t *wandev, netdevice_t *dev,
|
||||
void *wp_stats);
|
||||
#endif
|
||||
|
||||
int aft_tdm_api_init(sdla_t *card, private_area_t *chan, wanif_conf_t *conf);
|
||||
int aft_tdm_api_free(sdla_t *card, private_area_t *chan);
|
||||
|
||||
int aft_sw_hdlc_rx_data (void *priv_ptr, u8 *rx_data, int rx_len, uint32_t err_code);
|
||||
int aft_sw_hdlc_rx_suerm (void *priv_ptr);
|
||||
int aft_sw_hdlc_wakup (void *priv_ptr);
|
||||
int aft_sw_hdlc_trace(void *priv_ptr, u8 *data, int len, int dir);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,742 @@
|
|||
/* aft_core_user.h */
|
||||
#ifndef __AFT_CORE_USER__
|
||||
#define __AFT_CORE_USER__
|
||||
|
||||
/*================================================================
|
||||
* Includes
|
||||
*================================================================*/
|
||||
|
||||
# include "wanpipe_includes.h"
|
||||
# include "wanpipe_debug.h"
|
||||
# include "wanpipe_defines.h"
|
||||
# include "wanpipe_common.h"
|
||||
# include "wanpipe_cfg.h"
|
||||
# include "wanpipe_wanrouter.h"
|
||||
# include "wanpipe_api_iface.h"
|
||||
# include "sdlasfm.h"
|
||||
# include "sdla_front_end.h"
|
||||
|
||||
#if defined(__LINUX__)
|
||||
# include "if_wanpipe.h" /* Linux SIOC_ IOCTL Calls */
|
||||
#endif
|
||||
|
||||
#if defined(__WINDOWS__) && !defined(WAN_KERNEL)
|
||||
# include <winioctl.h> /* CTL_CODE */
|
||||
#endif
|
||||
|
||||
|
||||
#define MAX_TRACE_BUFFER (MAX_LGTH_UDP_MGNT_PKT - \
|
||||
sizeof(iphdr_t) - \
|
||||
sizeof(udphdr_t) - \
|
||||
sizeof(wan_mgmt_t) - \
|
||||
sizeof(wan_trace_info_t) - \
|
||||
sizeof(wan_cmd_t))
|
||||
|
||||
|
||||
#define UDPMGMT_SIGNATURE "AFTPIPEA"
|
||||
|
||||
|
||||
/*================================================================
|
||||
* Global Sangoma Commands
|
||||
*================================================================*/
|
||||
|
||||
#define WAN_PROTOCOL_CMD_START 0x01
|
||||
#define WAN_PROTOCOL_CMD_END 0x4F
|
||||
|
||||
#define WAN_UDP_CMD_START WANPIPEMON_PROTOCOL_PRIVATE + 0x01
|
||||
#define WAN_GET_PROTOCOL (WAN_UDP_CMD_START+0)
|
||||
#define WAN_GET_PLATFORM (WAN_UDP_CMD_START+1)
|
||||
#define WAN_GET_MEDIA_TYPE (WAN_UDP_CMD_START+2)
|
||||
#define WAN_GET_MASTER_DEV_NAME (WAN_UDP_CMD_START+3)
|
||||
#define WAN_UDP_CMD_END WANPIPEMON_PROTOCOL_PRIVATE + 0x1F
|
||||
#define WANPIPEMON_DRIVER_PRIVATE WAN_UDP_CMD_END+1
|
||||
|
||||
#define WAN_FE_CMD_START 0x90
|
||||
#define WAN_FE_CMD_END 0x9F
|
||||
|
||||
#define WAN_INTERFACE_CMD_START 0xA0
|
||||
#define WAN_INTERFACE_CMD_END 0xAF
|
||||
|
||||
#define WAN_FE_UDP_CMD_START 0xB0
|
||||
#define WAN_FE_UDP_CMD_END 0xBF
|
||||
|
||||
#define TRACE_ALL 0x00
|
||||
#define TRACE_PROT 0x01
|
||||
#define TRACE_DATA 0x02
|
||||
|
||||
/* values for request/reply byte */
|
||||
#define UDPMGMT_REQUEST 0x01
|
||||
#define UDPMGMT_REPLY 0x02
|
||||
#define UDP_OFFSET 12
|
||||
|
||||
|
||||
#define AFT_SERIAL_MODEM_RTS 1
|
||||
#define AFT_SERIAL_MODEM_DTR 2
|
||||
#define AFT_SERIAL_MODEM_CTS 4
|
||||
#define AFT_SERIAL_MODEM_DCD 8
|
||||
|
||||
|
||||
#if defined(__LINUX__)
|
||||
enum {
|
||||
SIOC_AFT_CUSTOMER_ID = SIOC_WANPIPE_DEVPRIVATE,
|
||||
SIOC_AFT_SS7_FORCE_RX,
|
||||
SIOC_WANPIPE_API
|
||||
};
|
||||
#endif
|
||||
|
||||
/* Possible error_flagRX packet errors */
|
||||
enum {
|
||||
WP_FIFO_ERROR_BIT,
|
||||
WP_CRC_ERROR_BIT,
|
||||
WP_ABORT_ERROR_BIT,
|
||||
WP_FRAME_ERROR_BIT,
|
||||
WP_DMA_ERROR_BIT
|
||||
};
|
||||
|
||||
enum {
|
||||
AFT_CARD_TYPE_ALL,
|
||||
AFT_CARD_TYPE_GLOBAL_ISR,
|
||||
AFT_CARD_TYPE_TDM_API,
|
||||
AFT_CARD_TYPE_ZAP_DAHDI
|
||||
};
|
||||
|
||||
/*================================================================
|
||||
* Trace Structure
|
||||
*================================================================*/
|
||||
|
||||
/*================================================================
|
||||
* Global Sangoma Commands
|
||||
*================================================================*/
|
||||
|
||||
#define WAN_PROTOCOL_CMD_START 0x01
|
||||
#define WAN_PROTOCOL_CMD_END 0x4F
|
||||
|
||||
#define WAN_FE_CMD_START 0x90
|
||||
#define WAN_FE_CMD_END 0x9F
|
||||
|
||||
#define WAN_INTERFACE_CMD_START 0xA0
|
||||
#define WAN_INTERFACE_CMD_END 0xAF
|
||||
|
||||
#define WAN_FE_UDP_CMD_START 0xB0
|
||||
#define WAN_FE_UDP_CMD_END 0xBF
|
||||
|
||||
#define TRACE_ALL 0x00
|
||||
#define TRACE_PROT 0x01
|
||||
#define TRACE_DATA 0x02
|
||||
|
||||
/* values for request/reply byte */
|
||||
#define UDPMGMT_REQUEST 0x01
|
||||
#define UDPMGMT_REPLY 0x02
|
||||
#define UDP_OFFSET 12
|
||||
|
||||
|
||||
|
||||
/*================================================================
|
||||
* Trace Structure
|
||||
*================================================================*/
|
||||
|
||||
/* the line trace status element presented by the frame relay code */
|
||||
typedef struct {
|
||||
unsigned char flag ; /* ready flag */
|
||||
unsigned short length ; /* trace length */
|
||||
unsigned char rsrv0[2] ; /* reserved */
|
||||
unsigned char attr ; /* trace attributes */
|
||||
unsigned short tmstamp ; /* time stamp */
|
||||
unsigned char rsrv1[4] ; /* reserved */
|
||||
unsigned int offset ; /* buffer absolute address */
|
||||
}aft_trc_el_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned char num_frames;
|
||||
unsigned char ismoredata;
|
||||
} wan_trace_info_t;
|
||||
|
||||
|
||||
/*================================================================
|
||||
* Statistics Structures
|
||||
*================================================================*/
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* the operational statistics structure */
|
||||
typedef struct {
|
||||
|
||||
/* Data frame transmission statistics */
|
||||
unsigned int Data_frames_Tx_count ;
|
||||
/* # of frames transmitted */
|
||||
unsigned int Data_bytes_Tx_count ;
|
||||
/* # of bytes transmitted */
|
||||
unsigned int Data_Tx_throughput ;
|
||||
/* transmit throughput */
|
||||
unsigned int no_ms_for_Data_Tx_thruput_comp ;
|
||||
/* millisecond time used for the Tx throughput computation */
|
||||
unsigned int Tx_Data_discard_lgth_err_count ;
|
||||
|
||||
/* Data frame reception statistics */
|
||||
unsigned int Data_frames_Rx_count ;
|
||||
/* number of frames received */
|
||||
unsigned int Data_bytes_Rx_count ;
|
||||
/* number of bytes received */
|
||||
unsigned int Data_Rx_throughput ;
|
||||
/* receive throughput */
|
||||
unsigned int no_ms_for_Data_Rx_thruput_comp ;
|
||||
/* millisecond time used for the Rx throughput computation */
|
||||
unsigned int Rx_Data_discard_short_count ;
|
||||
/* received Data frames discarded (too short) */
|
||||
unsigned int Rx_Data_discard_long_count ;
|
||||
/* received Data frames discarded (too long) */
|
||||
unsigned int Rx_Data_discard_inactive_count ;
|
||||
/* received Data frames discarded (link inactive) */
|
||||
|
||||
/* Incomming frames with a format error statistics */
|
||||
unsigned short Rx_frm_incomp_CHDLC_hdr_count ;
|
||||
/* frames received of with incomplete Cisco HDLC header */
|
||||
unsigned short Rx_frms_too_long_count ;
|
||||
/* frames received of excessive length count */
|
||||
|
||||
/* CHDLC link active/inactive and loopback statistics */
|
||||
unsigned short link_active_count ;
|
||||
/* number of times that the link went active */
|
||||
unsigned short link_inactive_modem_count ;
|
||||
/* number of times that the link went inactive (modem failure) */
|
||||
unsigned short link_inactive_keepalive_count ;
|
||||
/* number of times that the link went inactive (keepalive failure) */
|
||||
unsigned short link_looped_count ;
|
||||
/* link looped count */
|
||||
|
||||
unsigned int Data_frames_Tx_realign_count;
|
||||
|
||||
} aft_op_stats_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count;
|
||||
unsigned short Rx_crc_err_count ; /* receiver CRC error count */
|
||||
unsigned short Rx_abort_count ; /* abort frames recvd count */
|
||||
unsigned short Rx_hdlc_corrupiton; /* receiver disabled */
|
||||
unsigned short Rx_pci_errors; /* missed tx underrun interrupt count */
|
||||
unsigned short Rx_dma_descr_err; /*secondary-abort frames tx count */
|
||||
unsigned short DCD_state_change_count ; /* DCD state change */
|
||||
unsigned short CTS_state_change_count ; /* CTS state change */
|
||||
|
||||
unsigned short Tx_pci_errors; /* missed tx underrun interrupt count */
|
||||
unsigned short Tx_dma_errors; /* missed tx underrun interrupt count */
|
||||
|
||||
unsigned int Tx_pci_latency; /* missed tx underrun interrupt count */
|
||||
unsigned int Tx_dma_len_nonzero; /* Tx dma descriptor len not zero */
|
||||
|
||||
} aft_comm_err_stats_t;
|
||||
|
||||
|
||||
|
||||
typedef struct wan_if_cfg{
|
||||
unsigned char usedby;
|
||||
unsigned int active_ch; /* Active channels/timslots configured */
|
||||
unsigned int ec_active_ch; /* Echo Canceller configured active channels/timeslots */
|
||||
unsigned int cfg_active_ch; /* User specified active channel configuration */
|
||||
unsigned char media;
|
||||
unsigned int interface_number;
|
||||
unsigned int sub_media;
|
||||
unsigned char hw_coding;
|
||||
unsigned int chunk_sz;
|
||||
sdla_fe_cfg_t fe_cfg;
|
||||
char line_mode[USED_BY_FIELD];/* HDLC, BitStream, BRI D-chan... */
|
||||
}wan_if_cfg_t;
|
||||
|
||||
#define if_cfg_t wan_if_cfg_t
|
||||
|
||||
#if 0
|
||||
#define IFNAMSIZ 256
|
||||
#define USED_BY_FIELD 128 /* max length of the used by field */
|
||||
typedef struct {
|
||||
char usedby[USED_BY_FIELD];
|
||||
unsigned long active_ch;
|
||||
unsigned char media;
|
||||
unsigned int interface_number;
|
||||
unsigned int sub_media;
|
||||
char line_mode[USED_BY_FIELD];/* HDLC, BitStream */
|
||||
}if_cfg_t;
|
||||
#endif
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
typedef struct global_stats
|
||||
{
|
||||
unsigned long isr_entry;
|
||||
unsigned long isr_already_critical;
|
||||
unsigned long isr_rx;
|
||||
unsigned long isr_tx;
|
||||
unsigned long isr_intr_test;
|
||||
unsigned long isr_spurious;
|
||||
unsigned long isr_enable_tx_int;
|
||||
unsigned long rx_intr_corrupt_rx_bfr;
|
||||
unsigned long rx_intr_on_orphaned_DLCI;
|
||||
unsigned long rx_intr_dev_not_started;
|
||||
unsigned long tx_intr_dev_not_started;
|
||||
unsigned long poll_entry;
|
||||
unsigned long poll_already_critical;
|
||||
unsigned long poll_processed;
|
||||
unsigned long poll_tbusy_bad_status;
|
||||
unsigned long poll_host_disable_irq;
|
||||
unsigned long poll_host_enable_irq;
|
||||
|
||||
} global_stats_t;
|
||||
|
||||
|
||||
typedef struct if_send_stat{
|
||||
unsigned long if_send_entry;
|
||||
unsigned long if_send_skb_null;
|
||||
unsigned long if_send_broadcast;
|
||||
unsigned long if_send_multicast;
|
||||
unsigned long if_send_critical_ISR;
|
||||
unsigned long if_send_critical_non_ISR;
|
||||
unsigned long if_send_tbusy;
|
||||
unsigned long if_send_tbusy_timeout;
|
||||
unsigned long if_send_PIPE_request;
|
||||
unsigned long if_send_wan_disconnected;
|
||||
unsigned long if_send_dlci_disconnected;
|
||||
unsigned long if_send_no_bfrs;
|
||||
unsigned long if_send_adptr_bfrs_full;
|
||||
unsigned long if_send_bfr_passed_to_adptr;
|
||||
unsigned long if_send_protocol_error;
|
||||
unsigned long if_send_bfr_not_passed_to_adptr;
|
||||
unsigned long if_send_tx_int_enabled;
|
||||
unsigned long if_send_consec_send_fail;
|
||||
} if_send_stat_t;
|
||||
|
||||
typedef struct rx_intr_stat{
|
||||
unsigned long rx_intr_no_socket;
|
||||
unsigned long rx_intr_dev_not_started;
|
||||
unsigned long rx_intr_PIPE_request;
|
||||
unsigned long rx_intr_bfr_not_passed_to_stack;
|
||||
unsigned long rx_intr_bfr_passed_to_stack;
|
||||
} rx_intr_stat_t;
|
||||
|
||||
typedef struct pipe_mgmt_stat{
|
||||
unsigned long UDP_PIPE_mgmt_kmalloc_err;
|
||||
unsigned long UDP_PIPE_mgmt_direction_err;
|
||||
unsigned long UDP_PIPE_mgmt_adptr_type_err;
|
||||
unsigned long UDP_PIPE_mgmt_adptr_cmnd_OK;
|
||||
unsigned long UDP_PIPE_mgmt_adptr_cmnd_timeout;
|
||||
unsigned long UDP_PIPE_mgmt_adptr_send_passed;
|
||||
unsigned long UDP_PIPE_mgmt_adptr_send_failed;
|
||||
unsigned long UDP_PIPE_mgmt_not_passed_to_stack;
|
||||
unsigned long UDP_PIPE_mgmt_passed_to_stack;
|
||||
unsigned long UDP_PIPE_mgmt_no_socket;
|
||||
unsigned long UDP_PIPE_mgmt_passed_to_adptr;
|
||||
} pipe_mgmt_stat_t;
|
||||
|
||||
typedef struct aft_driver_isr_stats {
|
||||
unsigned long all;
|
||||
unsigned long aft;
|
||||
unsigned long non_aft;
|
||||
unsigned long fe;
|
||||
unsigned long fe_run;
|
||||
unsigned long tdm;
|
||||
unsigned long tdm_run;
|
||||
unsigned long tdm_run_span;
|
||||
unsigned long dma;
|
||||
unsigned long dma_rx;
|
||||
unsigned long dma_tx;
|
||||
unsigned long fifo;
|
||||
unsigned long fifo_rx;
|
||||
unsigned long fifo_tx;
|
||||
unsigned long wdt;
|
||||
unsigned long wdt_software;
|
||||
unsigned long free_run;
|
||||
unsigned long serial;
|
||||
}aft_driver_isr_stats_t;
|
||||
|
||||
typedef struct aft_driver_bh_stats {
|
||||
unsigned long all;
|
||||
unsigned long rx;
|
||||
unsigned long rx_stack;
|
||||
unsigned long rx_bri_dchan;
|
||||
unsigned long tx_post;
|
||||
unsigned long rx_gsm_dchan;
|
||||
}aft_driver_bh_stats_t;
|
||||
|
||||
typedef struct aft_driver_port_task_stats {
|
||||
unsigned long all;
|
||||
unsigned long fe_isr;
|
||||
unsigned long fe_poll;
|
||||
unsigned long ec;
|
||||
unsigned long ec_poll;
|
||||
unsigned long led;
|
||||
unsigned long serial_status;
|
||||
unsigned long tap_q;
|
||||
unsigned long restart;
|
||||
unsigned long rbs;
|
||||
}aft_driver_port_task_stats_t;
|
||||
|
||||
#define MAX_SMA_IDX 3
|
||||
typedef struct aft_driver_timing {
|
||||
unsigned long max_latency;
|
||||
unsigned long min_latency;
|
||||
unsigned long latency;
|
||||
unsigned long above_avg;
|
||||
unsigned long below_avg;
|
||||
unsigned long limit;
|
||||
int sma_idx;
|
||||
unsigned long sma[MAX_SMA_IDX];
|
||||
unsigned long latency_avg;
|
||||
wan_ticks_t timeout;
|
||||
|
||||
wan_timeval_t timing_tv;
|
||||
|
||||
}aft_driver_timing_t;
|
||||
|
||||
typedef struct aft_driver_performance_stats {
|
||||
aft_driver_isr_stats_t isr;
|
||||
aft_driver_bh_stats_t bh;
|
||||
aft_driver_port_task_stats_t port_task;
|
||||
|
||||
aft_driver_timing_t aft_isr_latency;
|
||||
aft_driver_timing_t kernel_isr_latency;
|
||||
aft_driver_timing_t port_task_latency;
|
||||
aft_driver_timing_t bh_latency;
|
||||
} aft_driver_performance_stats_t;
|
||||
|
||||
#define AFT_PERF_STAT_INC(card,type,var) if (card->aft_perf_stats_enable) card->aft_perf_stats.type.var++
|
||||
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// Command to send data:
|
||||
// Input : ptr to TX_DATA_STRUCT structure
|
||||
// Output: ptr to TX_DATA_STRUCT structure (may be same as input)
|
||||
// Uses Direct I/O (Irp->MdlAddress). Blocking call on device handle
|
||||
// to avoid busy loops.
|
||||
// Note: Since this command blocks all further I/O requests, it must be done
|
||||
// on a separate device handle, in a dedicated execution thread.
|
||||
//
|
||||
// This command is thread safe.
|
||||
#define IoctlWriteCommand \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, IOCTL_WRITE, METHOD_OUT_DIRECT, FILE_ANY_ACCESS)
|
||||
|
||||
// The same as IoctlWriteCommand, but will NOT block.
|
||||
#define IoctlWriteCommandNonBlocking \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, WANPIPE_IOCTL_WRITE_NON_BLOCKING, METHOD_OUT_DIRECT, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// Command to receive data:
|
||||
// Input : NULL
|
||||
// Output: ptr to RX_DATA_STRUCT structure
|
||||
// Uses Direct I/O (Irp->MdlAddress). Blocking call on device handle
|
||||
// to avoid busy loops.
|
||||
// Note: Since this command blocks all further I/O requests, it must be done
|
||||
// on a separate device handle, in a dedicated execution thread.
|
||||
//
|
||||
// This command is thread safe.
|
||||
#define IoctlReadCommand \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, IOCTL_READ, METHOD_IN_DIRECT, FILE_ANY_ACCESS)
|
||||
|
||||
// The same as IoctlReadCommand, but will NOT block.
|
||||
#define IoctlReadCommandNonBlocking \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, WANPIPE_IOCTL_READ_NON_BLOCKING, METHOD_IN_DIRECT, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// Command to control TDM API:
|
||||
// Input : ptr to wanpipe_tdm_api_cmd_t structure.
|
||||
// Output: ptr to wanpipe_tdm_api_cmd_t structure (may be same as input)
|
||||
// Uses Buffered I/O, Synchronous call.
|
||||
// This command is thread safe.
|
||||
#define IoctlTdmApiCommand \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, WANPIPE_IOCTL_TDM_API, METHOD_BUFFERED, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// Command to get T1/E1/56K alarms, activate/deactivate line test modes...
|
||||
// Input : ptr to wan_udp_hdr_t structure.
|
||||
// Output: ptr to wan_udp_hdr_t structure (may be same as input)
|
||||
// Uses Buffered I/O, Synchronous call.
|
||||
// This command is thread safe.
|
||||
#define IoctlManagementCommand \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, IOCTL_MGMT, METHOD_BUFFERED, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// Command to poll API for Data/Events:
|
||||
// Input : API_POLL_STRUCT
|
||||
// Output: ptr to API_POLL_STRUCT structure
|
||||
// Uses Direct I/O (Irp->MdlAddress).
|
||||
// Call will block, until:
|
||||
// 1: Out-of-band (OOB) event: link state change (TE1 connected/disconnected)
|
||||
// 2: Rx data available
|
||||
// 3: Interface able to Tx (transmit buffer available)
|
||||
// 4: Telephony Event: DTMF, On/Off hook
|
||||
//
|
||||
// Command can be used for writing single-thread applications.
|
||||
//
|
||||
// Note: Since this command blocks all further I/O requests, it must be done
|
||||
// on a separate device handle, in a dedicated execution thread.
|
||||
//
|
||||
// This command is thread safe.
|
||||
#define IoctlApiPoll \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, IOCTL_API_POLL, METHOD_IN_DIRECT, FILE_ANY_ACCESS)
|
||||
|
||||
|
||||
//Definitions for 'poll_events_bitmap' and 'user_flags_bitmap' in API_POLL_STRUCT:
|
||||
#define POLL_EVENT_RX_DATA (1)
|
||||
#define POLL_EVENT_TX_READY (1 << 1)
|
||||
#define POLL_EVENT_OOB (1 << 2) /* Out-Of-Band events such as Line Connect/Disconnect,
|
||||
RBS change, Ring, On/Off Hook, DTMF... */
|
||||
|
||||
#if !defined(WP_PREVENT_WINSOCK_NAME_CONFLICT)
|
||||
/* Old definitions - conflicting with winsock2.h.
|
||||
* Kept for backward compatibility. */
|
||||
# define POLLIN POLL_EVENT_RX_DATA
|
||||
# define POLLOUT POLL_EVENT_TX_READY
|
||||
# define POLLPRI POLL_EVENT_OOB
|
||||
# define POLLHUP POLLPRI
|
||||
# define POLLERR POLLPRI
|
||||
# define POLLWRNORM 0
|
||||
# define POLLRDNORM 0
|
||||
#endif
|
||||
|
||||
/* New definitions. Should be used in all new code. */
|
||||
#define WP_POLLIN POLL_EVENT_RX_DATA
|
||||
#define WP_POLLOUT POLL_EVENT_TX_READY
|
||||
#define WP_POLLPRI POLL_EVENT_OOB
|
||||
#define WP_POLLHUP WP_POLLPRI
|
||||
#define WP_POLLERR WP_POLLPRI
|
||||
#define WP_POLLWRNORM 0
|
||||
#define WP_POLLRDNORM 0
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// Command to Set data in Idle Transmit buffer of the driver:
|
||||
// Input : ptr to TX_DATA_STRUCT structure
|
||||
// Output: ptr to TX_DATA_STRUCT structure (may be same as input)
|
||||
// Uses Direct I/O (Irp->MdlAddress). Synchronous call.
|
||||
//
|
||||
#define IoctlSetIdleTxBuffer \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, IOCTL_SET_IDLE_TX_BUFFER, METHOD_OUT_DIRECT, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// This IOCTL for use only by Sangoma Technical Support
|
||||
// Command to control cdev:
|
||||
// Input : ptr to wanpipe_tdm_api_cmd_t structure.
|
||||
// Output: ptr to wanpipe_tdm_api_cmd_t structure (may be same as input)
|
||||
// Uses Buffered I/O, Synchronous call.
|
||||
// This command is thread safe.
|
||||
#define IoctlCdevControlCommand \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, WANPIPE_IOCTL_CDEV_CTRL, METHOD_BUFFERED, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// Command to Set a "Shared Event" which can be used for
|
||||
// WaitForSingleObject() and WaitForMultipleObjects() functions before
|
||||
// calling the blocking IoctlReadCommand. Once the "Shared Object" is set
|
||||
// to signalled state by the API driver, call IoctlReadCommand.
|
||||
//
|
||||
// Input : ptr to REGISTER_EVENT structure
|
||||
// Output: ptr to REGISTER_EVENT structure (may be same as input)
|
||||
// Uses Direct I/O (Irp->MdlAddress). Synchronous call.
|
||||
//
|
||||
typedef struct _REGISTER_EVENT
|
||||
{
|
||||
u_int8_t operation_status; // operation completion status
|
||||
u_int32_t user_flags_bitmap; // bitmap of events API user is interested to
|
||||
// receive when hEvent is signalled
|
||||
HANDLE *WP_POINTER_64 hEvent;
|
||||
} REGISTER_EVENT , *PREGISTER_EVENT ;
|
||||
|
||||
#define SIZEOF_REGISTER_EVENT sizeof(REGISTER_EVENT)
|
||||
|
||||
#define IoctlSetSharedEvent \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, IOCTL_SET_SHARED_EVENT, METHOD_OUT_DIRECT, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
//this IOCTL is for 'Port', for example: WANPIPE1.
|
||||
#define IoctlPortConfigurationCommand \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, IOCTL_PORT_CONFIG, METHOD_BUFFERED, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
//this IOCTL is for 'Port', for example: WANPIPE1.
|
||||
#define IoctlPortManagementCommand \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, IOCTL_PORT_MGMT, METHOD_BUFFERED, FILE_ANY_ACCESS)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
#define WP_CMD_TIMEOUT 1000 //in milliseconds, or 1 second.
|
||||
#define MGMT_CMD_TIMEOUT WP_CMD_TIMEOUT
|
||||
#define WRITE_CMD_TIMEOUT WP_CMD_TIMEOUT
|
||||
#define READ_CMD_TIMEOUT WP_CMD_TIMEOUT
|
||||
|
||||
|
||||
#if defined(__KERNEL__)
|
||||
#define PRINT_BITMAP DEBUG_TDMAPI
|
||||
#else
|
||||
#define PRINT_BITMAP printf
|
||||
#endif
|
||||
|
||||
static void print_poll_event_bitmap(u_int32_t bitmap)
|
||||
{
|
||||
char known_event = 0;
|
||||
|
||||
if(bitmap & WP_POLLIN){
|
||||
known_event = 1;
|
||||
PRINT_BITMAP("WP_POLLIN\n");
|
||||
}
|
||||
if(bitmap & WP_POLLOUT){
|
||||
known_event = 1;
|
||||
PRINT_BITMAP("WP_POLLOUT\n");
|
||||
}
|
||||
if(bitmap & WP_POLLPRI){
|
||||
known_event = 1;
|
||||
PRINT_BITMAP("WP_POLLPRI\n");
|
||||
}
|
||||
if(known_event == 0){
|
||||
PRINT_BITMAP("Unknown event!\n");
|
||||
}
|
||||
}
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
// Command to control Logger API:
|
||||
// Input : ptr to wp_logger_cmd_t structure.
|
||||
// Output: ptr to wp_logger_cmd_t structure (same as input)
|
||||
// Uses Buffered I/O, Synchronous call.
|
||||
// This command is thread safe.
|
||||
#define IoctlLoggerApiCommand \
|
||||
CTL_CODE(FILE_DEVICE_UNKNOWN, WANPIPE_IOCTL_LOGGER_CMD, METHOD_BUFFERED, FILE_ANY_ACCESS)
|
||||
|
||||
#else /* __WINDOWS__ */
|
||||
# define WP_POLLIN POLLIN
|
||||
# define WP_POLLOUT POLLOUT
|
||||
# define WP_POLLPRI POLLPRI
|
||||
# define WP_POLLHUP POLLHUP
|
||||
# define WP_POLLERR POLLERR
|
||||
# define WP_POLLWRNORM POLLWRNORM
|
||||
# define WP_POLLRDNORM POLLRDNORM
|
||||
#endif
|
||||
|
||||
/*
|
||||
#define MEM_TEST_BUFFER_LEN 100
|
||||
typedef struct _user_buff{
|
||||
char *user_buff_ptr;
|
||||
int user_buff_length;
|
||||
}user_buff_t;
|
||||
*/
|
||||
typedef struct _rbs_management{
|
||||
int channel;
|
||||
unsigned char ABCD_bits;
|
||||
}rbs_management_t;
|
||||
|
||||
|
||||
// Command codes for IoctlPortManagementCommand():
|
||||
enum {
|
||||
GET_HARDWARE_INFO=1, //Fill in "hardware_info_t" structure.
|
||||
|
||||
STOP_PORT, //Stop Port. Prior to calling this command all 'handles'
|
||||
//to communication interfaces such as WANPIPE1_IF0 must
|
||||
//be closed using CloseHandle() system call.
|
||||
|
||||
START_PORT_VOLATILE_CONFIG, //Start Port. Use configuration stored in a Port's Driver memory buffer.
|
||||
//This command runs faster than START_PORT_REGISTRY_CFG.
|
||||
//Recommended for use if Port is restarted *a lot*.
|
||||
|
||||
START_PORT_REGISTRY_CONFIG, //Start Port. Use configuration stored in the Port's Registry key.
|
||||
//This command runs slower than START_PORT_VOLATILE_CFG.
|
||||
//Recommended for use if Port is *not* restarted often (most cases).
|
||||
|
||||
GET_DRIVER_VERSION, //Fill in "DRIVER_VERSION" structure.
|
||||
|
||||
GET_PORT_OPERATIONAL_STATS, //Fill in "port_stats_t" structure.
|
||||
|
||||
FLUSH_PORT_OPERATIONAL_STATS, //Reset port's statistics counters in API driver.
|
||||
|
||||
WANPIPE_HARDWARE_RESCAN /* Re scan the PCI & USB bus for sangoma hardware */
|
||||
|
||||
};
|
||||
|
||||
/* port statistics for low-level debugging and techsupport */
|
||||
typedef struct {
|
||||
unsigned int rx_fifo_interrupt_counter;/* receive fifo error interrupt counter (total for all channels groups) */
|
||||
unsigned int tx_fifo_interrupt_counter;/* transmit fifo error interrupt counter (total for all channels groups)*/
|
||||
unsigned int fifo_err_interrupt_counter;/* total number of fifo error interrupts */
|
||||
unsigned int chip_security_interrupt_counter;/* chip security 'bit set' counter */
|
||||
unsigned int front_end_interrupt_counter;
|
||||
unsigned int isr_entry_counter;/* Interrupt Service Routine entry counter */
|
||||
unsigned int recognized_interrupt_counter;/* interrupt was generated by this port */
|
||||
unsigned int unrecognized_interrupt_counter;/* caused by interrupt sharing with other ports and cards */
|
||||
unsigned int isr_critical_flag_set_counter;
|
||||
unsigned int isr_hwec_poll_counter;
|
||||
unsigned int wdt_interrupt_counter;
|
||||
unsigned int dma_interrupt_counter;/* DMA for data complete interrupt counter */
|
||||
unsigned int hwec_chip_security_interrupt_counter;/* hwec chip security 'bit set' counter */
|
||||
unsigned int synch_loss_with_fe_chip_interrupt_counter;
|
||||
}port_stats_t;
|
||||
|
||||
|
||||
#define CARD_SERIAL_NUMBER_LENGTH 64
|
||||
// data structure for GET_HARDWARE_INFO command
|
||||
typedef struct {
|
||||
int card_model; /* A101/102/104/108/200... */
|
||||
int firmware_version;
|
||||
int pci_bus_number;
|
||||
int pci_slot_number;
|
||||
/* Number of HW Echo Canceller channels.
|
||||
Zero means HW Echo Canceller not installed the card. */
|
||||
int max_hw_ec_chans;
|
||||
|
||||
/* Port's number on a card
|
||||
For T1/E1: Indicates FE_LINE number starting from 1
|
||||
For Analog: Always set to 1. (Not used) (use fxo/fxs map instead)
|
||||
For BRI: Indicats module number starting from 1
|
||||
For S514: Indicates Primary or Secondary Port
|
||||
*/
|
||||
int port_number;
|
||||
char serial_number[CARD_SERIAL_NUMBER_LENGTH]; /* Not implemented, for future use. */
|
||||
|
||||
unsigned int chans_map; /* bitmap of available TDM slots */
|
||||
unsigned int fxo_map; /* bitmap of available fxo TDM slots, if analog port */
|
||||
unsigned int fxs_map; /* bitmap of available fxs TDM slots, if analog port */
|
||||
int max_chans_num; /* max number of TDM slots */
|
||||
int bri_modtype; /* which BRI type (MOD_TYPE_NT, MOD_TYPE_TE), if BRI port */
|
||||
|
||||
}hardware_info_t;
|
||||
|
||||
typedef struct{
|
||||
int wanpipe_number; /* One based wanpipe number, corresponds to wanpipe name,
|
||||
* for example, WANPIPE1, WANPIPE2... */
|
||||
hardware_info_t hardware_info;
|
||||
}wanpipe_instance_info_t;
|
||||
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////////////
|
||||
//Structure used with IoctlPortManagementCommand
|
||||
#define PORT_MGMT_MAX_DATA_SIZE 8188
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned int command_code; /* Management Command Code */
|
||||
unsigned int operation_status; /* operation completion status */
|
||||
unsigned short port_no; /* port number */
|
||||
unsigned char data[PORT_MGMT_MAX_DATA_SIZE]; /* data buffer passed from/to caller */
|
||||
}port_management_struct_t;
|
||||
|
||||
|
||||
// Commands for IoctlPortConfigurationCommand().
|
||||
// Used together with 'port_cfg_t' from wanpipe_cfg.h
|
||||
enum {
|
||||
|
||||
GET_PORT_VOLATILE_CONFIG=1, //Get current Port configuration stored in a Port's Driver memory buffer.
|
||||
|
||||
SET_PORT_VOLATILE_CONFIG, //Set new Port configuration in a Port's Driver memory buffer.
|
||||
//Prior to using this command Port must be stopped with STOP_PORT command.
|
||||
//This command will not update Port's Property Pages in the Device Manager.
|
||||
//Recommended for use if Port is restarted *a lot*.
|
||||
};
|
||||
|
||||
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
static wan_driver_version_t drv_version = { WANPIPE_VERSION_MAJOR,
|
||||
WANPIPE_VERSION_MINOR,
|
||||
WANPIPE_VERSION_MINOR1,
|
||||
WANPIPE_VERSION_MINOR2
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,209 @@
|
|||
/*****************************************************************************
|
||||
* aft_core_utils.h
|
||||
*
|
||||
* WANPIPE(tm) AFT CORE Hardware Support - Utilities
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2003-2008 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================*/
|
||||
|
||||
|
||||
#ifndef __AFT_CORE_UTILS_H_
|
||||
#define __AFT_CORE_UTILS_H_
|
||||
|
||||
#include "aft_core_private.h"
|
||||
|
||||
int aft_read_security(sdla_t *card);
|
||||
int aft_front_end_mismatch_check(sdla_t * card);
|
||||
int aft_realign_skb_pkt(private_area_t *chan, netskb_t *skb);
|
||||
void aft_wdt_set(sdla_t *card, unsigned char val);
|
||||
void aft_wdt_reset(sdla_t *card);
|
||||
int process_udp_mgmt_pkt(sdla_t* card, netdevice_t* dev,
|
||||
private_area_t*,
|
||||
int local_dev);
|
||||
|
||||
void aft_channel_txdma_ctrl(sdla_t *card, private_area_t *chan, int on);
|
||||
void aft_channel_rxdma_ctrl(sdla_t *card, private_area_t *chan, int on);
|
||||
void aft_channel_txintr_ctrl(sdla_t *card, private_area_t *chan, int on);
|
||||
void aft_channel_rxintr_ctrl(sdla_t *card, private_area_t *chan, int on);
|
||||
|
||||
int aft_alloc_rx_dma_buff(sdla_t *card, private_area_t *chan, int num, int irq);
|
||||
int aft_init_requeue_free_skb(private_area_t *chan, netskb_t *skb);
|
||||
|
||||
void aft_tx_dma_skb_init(private_area_t *chan, netskb_t *skb);
|
||||
|
||||
int aft_tslot_sync_ctrl(sdla_t *card, private_area_t *chan, int mode);
|
||||
|
||||
int aft_tdmapi_mtu_check(sdla_t *card_ptr, unsigned int *mtu);
|
||||
|
||||
int aft_devel_ioctl(sdla_t *card, struct ifreq *ifr);
|
||||
|
||||
void aft_tx_fifo_under_recover (sdla_t *card, private_area_t *chan);
|
||||
|
||||
unsigned char aft_write_ec (void *pcard, unsigned short off, unsigned char value);
|
||||
unsigned char aft_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
unsigned char aft_read_ec (void *pcard, unsigned short off);
|
||||
unsigned char aft_read_customer_id(sdla_t *card);
|
||||
|
||||
int aft_read(sdla_t *card, wan_cmd_api_t *api_cmd);
|
||||
int aft_write_cpld(void *pcard, unsigned short off,unsigned char data);
|
||||
|
||||
#if defined(__LINUX__)
|
||||
int if_change_mtu(netdevice_t *dev, int new_mtu);
|
||||
#endif
|
||||
|
||||
int update_comms_stats(sdla_t* card);
|
||||
int aft_handle_clock_master (sdla_t *card_ptr);
|
||||
void wanpipe_wake_stack(private_area_t* chan);
|
||||
int aft_find_master_if_and_dchan(sdla_t *card, int *master_if, u32 active_ch);
|
||||
|
||||
void aft_set_ss7_force_rx(sdla_t *card, private_area_t *chan);
|
||||
void aft_clear_ss7_force_rx(sdla_t *card, private_area_t *chan);
|
||||
int update_comms_stats(sdla_t* card);
|
||||
int aft_find_master_if_and_dchan(sdla_t *card, int *master_if,u32 active_ch);
|
||||
int aft_hwec_config (sdla_t *card, private_area_t *chan, wanif_conf_t *conf, int ctrl);
|
||||
int aft_fifo_intr_ctrl(sdla_t *card, int ctrl);
|
||||
int aft_tdm_intr_ctrl(sdla_t *card, int ctrl);
|
||||
int aft_tdm_ring_rsync(sdla_t *card);
|
||||
|
||||
int aft_core_send_serial_oob_msg (sdla_t *card);
|
||||
int wan_user_process_udp_mgmt_pkt(void* card_ptr, void* chan_ptr, void *udata);
|
||||
int aft_check_and_disable_dchan_optimization(sdla_t *card, private_area_t *chan, char *usedby);
|
||||
|
||||
int aft_chip_set_clock(sdla_t *card);
|
||||
|
||||
/*=================================================================
|
||||
* Used for debugging only
|
||||
*================================================================*/
|
||||
|
||||
static __inline wan_time_t aft_calc_elapsed(struct timeval *started, struct timeval *ended)
|
||||
{
|
||||
wan_time_t ms;
|
||||
|
||||
#if 0
|
||||
if (started->tv_usec == 0) {
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (ended->tv_sec < started->tv_sec || ended->tv_usec < started->tv_usec) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
ms = ((ended->tv_sec - started->tv_sec)*1000) + ((ended->tv_usec-started->tv_usec)/1000);
|
||||
|
||||
return ms;
|
||||
|
||||
#if 0
|
||||
if (ended->tv_usec > started->tv_usec) {
|
||||
return ended->tv_usec - started->tv_usec;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#define AFT_PERFT_TIMING_START(card,var) if (card->aft_perf_stats_enable) aft_timing_start(&card->aft_perf_stats.var)
|
||||
|
||||
static int __inline aft_timing_start(aft_driver_timing_t *drv_timing)
|
||||
{
|
||||
do_gettimeofday(&drv_timing->timing_tv);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define AFT_PERFT_TIMING_STOP_AND_CALC(card,var) if (card->aft_perf_stats_enable) aft_timing_stop_calculate_elapsed(&card->aft_perf_stats.var)
|
||||
|
||||
static int __inline aft_timing_stop_calculate_elapsed(aft_driver_timing_t *drv_timing)
|
||||
{
|
||||
|
||||
unsigned long elapsed=0;
|
||||
unsigned long cum=0;
|
||||
int i;
|
||||
int div=0;
|
||||
int limit=0;
|
||||
|
||||
struct timeval current_tv;
|
||||
do_gettimeofday(¤t_tv);
|
||||
elapsed=aft_calc_elapsed(&drv_timing->timing_tv,¤t_tv);
|
||||
|
||||
if (elapsed > drv_timing->max_latency) {
|
||||
drv_timing->max_latency=elapsed;
|
||||
}
|
||||
if (drv_timing->min_latency == 0 || drv_timing->min_latency > elapsed) {
|
||||
drv_timing->min_latency=elapsed;
|
||||
}
|
||||
drv_timing->latency=elapsed;
|
||||
|
||||
drv_timing->sma[drv_timing->sma_idx] = elapsed;
|
||||
drv_timing->sma_idx++;
|
||||
if (drv_timing->sma_idx >= MAX_SMA_IDX) {
|
||||
drv_timing->sma_idx=0;
|
||||
}
|
||||
|
||||
for (i=0;i<MAX_SMA_IDX;i++) {
|
||||
if (drv_timing->sma[i] == 0) {
|
||||
continue;
|
||||
}
|
||||
cum+=drv_timing->sma[i];
|
||||
div++;
|
||||
}
|
||||
|
||||
if (div) {
|
||||
cum=cum/div;
|
||||
}
|
||||
|
||||
drv_timing->latency_avg = cum;
|
||||
|
||||
if (drv_timing->latency_avg > 19) {
|
||||
limit=20;
|
||||
} else if (drv_timing->latency_avg > 9) {
|
||||
limit=10;
|
||||
} else if (drv_timing->latency_avg < 1) {
|
||||
limit=5;
|
||||
}
|
||||
|
||||
drv_timing->limit=limit;
|
||||
|
||||
if (elapsed > drv_timing->latency_avg + limit) {
|
||||
drv_timing->above_avg++;
|
||||
}
|
||||
if (drv_timing->latency_avg > limit) {
|
||||
if (drv_timing->latency_avg - limit > elapsed) {
|
||||
drv_timing->below_avg++;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#if 0
|
||||
void wp_tdmv_api_chan_rx_tx(sdla_t *card,
|
||||
private_area_t *chan,
|
||||
unsigned char *rxdata, unsigned char *tx_data);
|
||||
void wp_tdmv_api_rx_tx (sdla_t *card, private_area_t *chan);
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
void aft_list_descriptors(private_area_t *chan);
|
||||
#endif
|
||||
#if 0
|
||||
void aft_list_dma_chain_regs(sdla_t *card);
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
void aft_list_tx_descriptors(private_area_t *chan);
|
||||
#endif
|
||||
#if 0
|
||||
void aft_display_chain_history(private_area_t *chan);
|
||||
void aft_chain_history(private_area_t *chan,u8 end, u8 cur, u8 begin, u8 loc);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/*****************************************************************************
|
||||
* aft_gsm.c
|
||||
*
|
||||
* WANPIPE(tm) AFT W400 Hardware Support
|
||||
*
|
||||
* Authors: Moises Silva <moy@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2011 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Oct 06, 2011 Moises Silva Initial Version
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
#ifndef __AFT_GSM_H_
|
||||
#define __AFT_GSM_H_
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
int aft_gsm_global_chip_config(sdla_t *card);
|
||||
int aft_gsm_global_chip_unconfig(sdla_t *card);
|
||||
int aft_gsm_chip_config(sdla_t *card, wandev_conf_t *);
|
||||
int aft_gsm_chip_unconfig(sdla_t *card);
|
||||
int aft_gsm_chan_dev_config(sdla_t *card, void *chan);
|
||||
int aft_gsm_chan_dev_unconfig(sdla_t *card, void *chan);
|
||||
int aft_gsm_led_ctrl(sdla_t *card, int color, int led_pos, int on);
|
||||
int aft_gsm_test_sync(sdla_t *card, int tx_only);
|
||||
unsigned char aft_gsm_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
int aft_gsm_write_cpld(sdla_t *card, unsigned short off,u_int16_t data);
|
||||
void aft_gsm_fifo_adjust(sdla_t *card,u32 level);
|
||||
int w400_check_ec_security(sdla_t *card);
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,95 @@
|
|||
/*****************************************************************************
|
||||
* aft_t116.h WANPIPE(tm) S51XX Xilinx Hardware Support
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2003 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Oct 18, 2005 Nenad Corbic Initial version.
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
#ifndef __AFT_T116_H_
|
||||
#define __AFT_T116_H_
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
|
||||
int t116_global_chip_config(sdla_t *card);
|
||||
int t116_global_chip_unconfig(sdla_t *card);
|
||||
int t116_chip_config(sdla_t *card, wandev_conf_t*);
|
||||
int t116_chip_unconfig(sdla_t *card);
|
||||
int t116_chan_dev_config(sdla_t *card, void *chan);
|
||||
int t116_chan_dev_unconfig(sdla_t *card, void *chan);
|
||||
int t116_led_ctrl(sdla_t *card, int color, int led_pos, int on);
|
||||
int t116_test_sync(sdla_t *card, int tx_only);
|
||||
int t116_check_ec_security(sdla_t *card);
|
||||
|
||||
|
||||
//int a104_write_fe (sdla_t* card, unsigned short off, unsigned char value);
|
||||
//unsigned char a104_read_fe (sdla_t* card, unsigned short off);
|
||||
int t116_write_fe (void *pcard, ...);
|
||||
unsigned char __t116_read_fe (void *pcard, ...);
|
||||
unsigned char t116_read_fe (void *pcard, ...);
|
||||
|
||||
int a56k_write_fe (void *pcard, ...);
|
||||
unsigned char __a56k_read_fe (void *pcard, ...);
|
||||
unsigned char a56k_read_fe (void *pcard, ...);
|
||||
|
||||
int aft_te1_write_cpld(sdla_t *card, unsigned short off, u_int16_t data);
|
||||
unsigned char aft_te1_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
|
||||
int aft_56k_write_cpld(sdla_t *card, unsigned short off, u_int16_t data);
|
||||
unsigned char aft_56k_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
|
||||
int a108m_write_cpld(sdla_t *card, unsigned short off, u_int16_t data);
|
||||
unsigned char a108m_read_cpld(sdla_t *card, unsigned short cpld_off);
|
||||
|
||||
void t116_fifo_adjust(sdla_t *card,u32 level);
|
||||
|
||||
#define SDLA_HW_T116_FE_ACCESS_BLOCK { u32 breg=0; card->hw_iface.bus_read_4(card->hw, 0x40, &breg); \
|
||||
if (breg == (u32)-1) { \
|
||||
if (WAN_NET_RATELIMIT()) { \
|
||||
DEBUG_ERROR("%s:%d: wanpipe PCI Error: Illegal Register read: 0x40 = 0xFFFFFFFF\n", \
|
||||
__FUNCTION__,__LINE__); \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Helper function for T116 TAP card */
|
||||
static __inline int read_reg_ds26519_fpga (sdla_t* card, u32 addr){
|
||||
int data= 0;
|
||||
/* Clearing Bits 31-14 */
|
||||
addr = addr & 0X3FFF;
|
||||
addr = addr | 0x8000;
|
||||
SDLA_HW_T116_FE_ACCESS_BLOCK;
|
||||
card->hw_iface.bus_write_2(card->hw,0x44,addr);
|
||||
SDLA_HW_T116_FE_ACCESS_BLOCK;
|
||||
card->hw_iface.bus_read_4(card->hw,0x44,&data);
|
||||
SDLA_HW_T116_FE_ACCESS_BLOCK;
|
||||
data = (data >> 16)& 0xFF;
|
||||
return data;
|
||||
}
|
||||
|
||||
static __inline int write_reg_ds26519_fpga (sdla_t* card, u32 addr, u32 data){
|
||||
u32 shifted_data = 0;
|
||||
/* Clearing Bits 31-14 */
|
||||
addr = addr & 0X3FFF;
|
||||
addr = addr | 0x8000;
|
||||
SDLA_HW_T116_FE_ACCESS_BLOCK;
|
||||
card->hw_iface.bus_write_2(card->hw,0x44,addr);
|
||||
SDLA_HW_T116_FE_ACCESS_BLOCK;
|
||||
shifted_data = (data << 16) & 0x00FF0000;
|
||||
card->hw_iface.bus_write_4(card->hw,0x44,shifted_data);
|
||||
SDLA_HW_T116_FE_ACCESS_BLOCK;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,438 @@
|
|||
/*****************************************************************************
|
||||
* if_wanpipe.h Header file for the Sangoma AF_WANPIPE Socket
|
||||
*
|
||||
* Author: Nenad Corbic
|
||||
*
|
||||
* Copyright: (c) 2000 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
*
|
||||
* Jan 28, 2000 Nenad Corbic Initial Version
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __LINUX_IF_WAN_PACKET_H
|
||||
#define __LINUX_IF_WAN_PACKET_H
|
||||
|
||||
#include <linux/sockios.h>
|
||||
|
||||
struct wan_sockaddr_ll
|
||||
{
|
||||
unsigned short sll_family;
|
||||
unsigned short sll_protocol;
|
||||
int sll_ifindex;
|
||||
unsigned short sll_hatype;
|
||||
unsigned char sll_pkttype;
|
||||
unsigned char sll_halen;
|
||||
unsigned char sll_addr[8];
|
||||
unsigned char sll_device[14];
|
||||
unsigned char sll_card[14];
|
||||
|
||||
unsigned int sll_active_ch;
|
||||
unsigned char sll_prot;
|
||||
unsigned char sll_prot_opt;
|
||||
unsigned short sll_mult_cnt;
|
||||
unsigned char sll_seven_bit_hdlc;
|
||||
};
|
||||
|
||||
typedef struct wan_debug_hdr{
|
||||
unsigned char free;
|
||||
unsigned char wp_sk_state;
|
||||
int rcvbuf;
|
||||
int sndbuf;
|
||||
int rmem;
|
||||
int wmem;
|
||||
int sk_count;
|
||||
unsigned char bound;
|
||||
char name[14];
|
||||
unsigned char d_state;
|
||||
unsigned char svc;
|
||||
unsigned short lcn;
|
||||
unsigned char mbox;
|
||||
unsigned char cmd_busy;
|
||||
unsigned char command;
|
||||
unsigned poll;
|
||||
unsigned poll_cnt;
|
||||
int rblock;
|
||||
} wan_debug_hdr_t;
|
||||
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned char error_flag;
|
||||
unsigned short time_stamp;
|
||||
unsigned char channel;
|
||||
unsigned char direction;
|
||||
unsigned char reserved[11];
|
||||
} wp_sock_rx_hdr_t;
|
||||
|
||||
typedef struct {
|
||||
wp_sock_rx_hdr_t api_rx_hdr;
|
||||
unsigned char data[1];
|
||||
} wp_sock_rx_element_t;
|
||||
#pragma pack()
|
||||
|
||||
#define MAX_NUM_DEBUG 10
|
||||
|
||||
#define LAPB_PROT 0x15
|
||||
#define WP_LAPB_PROT LAPB_PROT
|
||||
|
||||
#define X25_PROT 0x16
|
||||
#define WP_X25_PROT X25_PROT
|
||||
|
||||
#define PVC_PROT 0x17
|
||||
#define WP_PVC_PROT PVC_PROT
|
||||
|
||||
#define SS7_PROT 0x18
|
||||
#define WP_SS7_PROT SS7_PROT
|
||||
|
||||
#define SS7_MONITOR_PROT 0x19
|
||||
#define WP_SS7_MONITOR_PROT SS7_MONITOR_PROT
|
||||
|
||||
#define DSP_PROT 0x20
|
||||
#define WP_DSP_PROT DSP_PROT
|
||||
|
||||
#define SS7_FISU 0x01
|
||||
#define SS7_LSSU 0x02
|
||||
#define SS7_MSU 0x04
|
||||
#define RAW_HDLC 0x08
|
||||
#define SS7_ALL_PROT (SS7_MSU|SS7_LSSU|SS7_FISU)
|
||||
|
||||
#define SS7_FISU_BIT_MAP 0
|
||||
#define SS7_LSSU_BIT_MAP 1
|
||||
#define SS7_MSU_BIT_MAP 2
|
||||
#define HDLC_BIT_MAP 3
|
||||
|
||||
#define SS7_FISU_LEN 5
|
||||
#define SS7_MSU_LEN 8
|
||||
#define SS7_MSU_END_LEN 278
|
||||
|
||||
#define DECODE_SS7_PROT(a) ((a==SS7_MSU)?"SS7 MSU":\
|
||||
(a==SS7_LSSU)?"SS7 LSSU":\
|
||||
(a==SS7_FISU)?"SS7 FISU":\
|
||||
(a==RAW_HDLC)?"RAW HDLC":\
|
||||
(a==(SS7_MSU|SS7_LSSU))?"SS7 MSU LSSU":\
|
||||
(a==(SS7_MSU|SS7_FISU))?"SS7 MSU FISU":\
|
||||
(a==(SS7_LSSU|SS7_FISU))?"SS7 LSSU FISU":\
|
||||
(a==(SS7_LSSU|SS7_FISU|SS7_MSU))?"SS7 MSU LSSU FISU":\
|
||||
"Unknown SS7 Prot")
|
||||
#define DELTA_PROT_OPT 1
|
||||
#define MULTI_PROT_OPT 2
|
||||
|
||||
typedef struct
|
||||
{
|
||||
wan_debug_hdr_t debug[MAX_NUM_DEBUG];
|
||||
}wan_debug_t;
|
||||
|
||||
#if 0
|
||||
#define SIOC_WANPIPE_GET_CALL_DATA (SIOCPROTOPRIVATE + 0)
|
||||
#define SIOC_WANPIPE_SET_CALL_DATA (SIOCPROTOPRIVATE + 1)
|
||||
#define SIOC_WANPIPE_ACCEPT_CALL (SIOCPROTOPRIVATE + 2)
|
||||
#define SIOC_WANPIPE_CLEAR_CALL (SIOCPROTOPRIVATE + 3)
|
||||
#define SIOC_WANPIPE_RESET_CALL (SIOCPROTOPRIVATE + 4)
|
||||
#endif
|
||||
|
||||
enum {
|
||||
SIOC_WANPIPE_DEBUG = (SIOCPROTOPRIVATE),
|
||||
SIOC_WANPIPE_SET_NONBLOCK,
|
||||
SIOC_WANPIPE_CHECK_TX,
|
||||
SIOC_WANPIPE_SOCK_STATE,
|
||||
SIOC_WANPIPE_SOCK_FLUSH_BUFS
|
||||
};
|
||||
|
||||
#define SIOC_ANNEXG_SOCK_STATE SIOC_WANPIPE_SOCK_STATE
|
||||
|
||||
enum {
|
||||
SIOCC_IF_WANPIPE_RESERVED = (SIOCDEVPRIVATE),
|
||||
SIOC_WANPIPE_PIPEMON,
|
||||
SIOC_WANPIPE_SNMP,
|
||||
SIOC_WANPIPE_SNMP_IFSPEED,
|
||||
|
||||
#if 0
|
||||
SIOC_WANPIPE_DEVICE, /* GENERIC */
|
||||
SIOC_WANPIPE_DUMP, /* GENERIC */
|
||||
#endif
|
||||
|
||||
SIOC_WAN_DEVEL_IOCTL, /* uses wan_cmd_api_t */
|
||||
SIOC_WAN_EC_IOCTL,
|
||||
SIOC_WAN_FE_IOCTL,
|
||||
|
||||
SIOC_WANAPI_DEVPRIVATE = SIOCDEVPRIVATE + 20,
|
||||
|
||||
SIOC_ANNEXG_SET_NONBLOCK,
|
||||
SIOC_ANNEXG_CHECK_TX,
|
||||
SIOC_ANNEXG_DEV_STATE,
|
||||
|
||||
SIOC_ANNEXG_BIND_SK,
|
||||
SIOC_ANNEXG_UNBIND_SK,
|
||||
SIOC_ANNEXG_GET_SK,
|
||||
SIOC_ANNEXG_KICK,
|
||||
|
||||
SIOC_ANNEXG_PLACE_CALL,
|
||||
SIOC_ANNEXG_CLEAR_CALL,
|
||||
|
||||
SIOC_WANPIPE_GET_TIME_SLOTS,
|
||||
SIOC_WANPIPE_GET_MEDIA_TYPE,
|
||||
|
||||
SIOC_WANPIPE_GET_DEVICE_CONFIG_ID,
|
||||
|
||||
SIOC_WANPIPE_TDM_API,
|
||||
|
||||
SIOC_WANPIPE_DEVPRIVATE
|
||||
|
||||
};
|
||||
|
||||
#define WAN_DEVPRIV_SIOC(_val) (SIOC_WANPIPE_DEVPRIVATE+(_val))
|
||||
|
||||
#define SIOC_WANPIPE_BIND_SK SIOC_ANNEXG_BIND_SK
|
||||
#define SIOC_WANPIPE_UNBIND_SK SIOC_ANNEXG_UNBIND_SK
|
||||
#define SIOC_WANPIPE_GET_SK SIOC_ANNEXG_GET_SK
|
||||
#define SIOC_WANPIPE_KICK SIOC_ANNEXG_KICK
|
||||
#define SIOC_WANPIPE_DEV_STATE SIOC_ANNEXG_DEV_STATE
|
||||
|
||||
#define DECODE_API_CMD(cmd) ((cmd==SIOC_WANPIPE_PIPEMON)?"PIPEMON" : \
|
||||
(cmd==SIOC_WANPIPE_SNMP)?"SNMP": \
|
||||
(cmd==SIOC_ANNEXG_CHECK_TX)?"CHECK TX": \
|
||||
(cmd==SIOC_ANNEXG_SOCK_STATE)?"SOCK STATE": \
|
||||
(cmd==SIOC_ANNEXG_BIND_SK)?"BIND SK" : \
|
||||
(cmd==SIOC_ANNEXG_UNBIND_SK)?"UNBIND SK" : \
|
||||
(cmd==SIOC_ANNEXG_GET_SK)?"GET SK" : \
|
||||
(cmd==SIOC_ANNEXG_DEV_STATE)?"DEV STATE" : \
|
||||
(cmd==SIOC_ANNEXG_KICK)? "KICK" : "UNKNOWN")
|
||||
|
||||
|
||||
#define SIOC_WANPIPE_BSC_CMD SIOC_WANPIPE_EXEC_CMD
|
||||
#define SIOC_WANPIPE_POS_CMD SIOC_WANPIPE_EXEC_CMD
|
||||
|
||||
/* Packet types */
|
||||
|
||||
#define WAN_PACKET_HOST 0 /* To us */
|
||||
#define WAN_PACKET_BROADCAST 1 /* To all */
|
||||
#define WAN_PACKET_MULTICAST 2 /* To group */
|
||||
#define WAN_PACKET_OTHERHOST 3 /* To someone else */
|
||||
#define WAN_PACKET_OUTGOING 4 /* Outgoing of any type */
|
||||
/* These ones are invisible by user level */
|
||||
#define WAN_PACKET_LOOPBACK 5 /* MC/BRD frame looped back */
|
||||
#define WAN_PACKET_FASTROUTE 6 /* Fastrouted frame */
|
||||
|
||||
|
||||
/* AF Socket specific */
|
||||
#define WAN_PACKET_DATA 0
|
||||
#define WAN_PACKET_CMD 1
|
||||
#define WAN_PACKET_ERR 2
|
||||
|
||||
/* Packet socket options */
|
||||
|
||||
#define WAN_PACKET_ADD_MEMBERSHIP 1
|
||||
#define WAN_PACKET_DROP_MEMBERSHIP 2
|
||||
|
||||
#define WAN_PACKET_MR_MULTICAST 0
|
||||
#define WAN_PACKET_MR_PROMISC 1
|
||||
#define WAN_PACKET_MR_ALLMULTI 2
|
||||
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/wanpipe_kernel.h>
|
||||
|
||||
#define MAX_PARENT_PROT_NUM 10
|
||||
|
||||
/* Private wanpipe socket structures. */
|
||||
#if 0
|
||||
struct wanpipe_opt
|
||||
{
|
||||
void *mbox; /* Mail box */
|
||||
void *card; /* Card bouded to */
|
||||
netdevice_t *dev; /* Bounded device */
|
||||
unsigned short lcn; /* Binded LCN */
|
||||
unsigned char svc; /* 0=pvc, 1=svc */
|
||||
unsigned char timer; /* flag for delayed transmit*/
|
||||
struct timer_list tx_timer;
|
||||
unsigned poll_cnt;
|
||||
unsigned char force; /* Used to force sock release */
|
||||
atomic_t packet_sent;
|
||||
void *datascope;
|
||||
};
|
||||
#else
|
||||
struct wanpipe_opt
|
||||
{
|
||||
netdevice_t *dev; /* Bounded device */
|
||||
void *datascope;
|
||||
unsigned short num;
|
||||
};
|
||||
#endif
|
||||
|
||||
#define MAX_SOCK_CRC_QUEUE 3
|
||||
#define MAX_SOCK_HDLC_BUF 2000
|
||||
#define MAX_SOCK_HDLC_LIMIT MAX_SOCK_HDLC_BUF-500
|
||||
|
||||
typedef struct wanpipe_hdlc_decoder{
|
||||
unsigned char rx_decode_buf[MAX_SOCK_HDLC_BUF];
|
||||
unsigned int rx_decode_len;
|
||||
unsigned char rx_decode_bit_cnt;
|
||||
unsigned char rx_decode_onecnt;
|
||||
|
||||
unsigned long hdlc_flag;
|
||||
unsigned short rx_orig_crc;
|
||||
unsigned short rx_crc[MAX_SOCK_CRC_QUEUE];
|
||||
unsigned short crc_fin;
|
||||
|
||||
unsigned short rx_crc_tmp;
|
||||
int crc_cur;
|
||||
int crc_prv;
|
||||
}wanpipe_hdlc_decoder_t;
|
||||
|
||||
|
||||
typedef struct wanpipe_hdlc_engine
|
||||
{
|
||||
|
||||
wanpipe_hdlc_decoder_t tx_decoder;
|
||||
wanpipe_hdlc_decoder_t rx_decoder;
|
||||
|
||||
struct sk_buff *raw_rx_skb;
|
||||
struct sk_buff *raw_tx_skb;
|
||||
|
||||
struct sk_buff_head data_q;
|
||||
|
||||
atomic_t refcnt;
|
||||
|
||||
unsigned char bound;
|
||||
|
||||
unsigned long active_ch;
|
||||
unsigned short timeslots;
|
||||
struct wanpipe_hdlc_engine *next;
|
||||
|
||||
int skb_decode_size;
|
||||
unsigned char seven_bit_hdlc;
|
||||
|
||||
void *sk_to_prot_map[MAX_PARENT_PROT_NUM];
|
||||
|
||||
}wanpipe_hdlc_engine_t;
|
||||
|
||||
typedef struct hdlc_list
|
||||
{
|
||||
wanpipe_hdlc_engine_t *hdlc;
|
||||
struct hdlc_list *next;
|
||||
}wanpipe_hdlc_list_t;
|
||||
|
||||
#define MAX_SOCK_CHANNELS 33
|
||||
typedef struct wanpipe_parent
|
||||
{
|
||||
wanpipe_hdlc_list_t *time_slot_hdlc_map[MAX_SOCK_CHANNELS];
|
||||
wanpipe_hdlc_engine_t *hdlc_eng_list;
|
||||
unsigned char hdlc_enabled;
|
||||
|
||||
rwlock_t lock;
|
||||
signed char time_slots;
|
||||
char media;
|
||||
unsigned char seven_bit_hdlc;
|
||||
|
||||
struct tasklet_struct rx_task;
|
||||
struct sk_buff_head rx_queue;
|
||||
|
||||
void *sk_to_prot_map[MAX_PARENT_PROT_NUM];
|
||||
}wanpipe_parent_t;
|
||||
|
||||
typedef struct wanpipe_datascope
|
||||
{
|
||||
unsigned long prot_type;
|
||||
unsigned int active_ch;
|
||||
struct sock *parent_sk;
|
||||
unsigned char delta;
|
||||
unsigned short max_mult_cnt;
|
||||
union {
|
||||
struct {
|
||||
unsigned short tx_fisu_skb_csum;
|
||||
unsigned short tx_lssu_skb_csum;
|
||||
void *tx_fisu_skb;
|
||||
void *tx_lssu_skb;
|
||||
|
||||
unsigned short rx_fisu_skb_csum;
|
||||
unsigned short rx_lssu_skb_csum;
|
||||
void *rx_fisu_skb;
|
||||
void *rx_lssu_skb;
|
||||
}ss7;
|
||||
}u;
|
||||
|
||||
unsigned char parent;
|
||||
wanpipe_hdlc_engine_t *hdlc_eng;
|
||||
wanpipe_parent_t *parent_priv;
|
||||
|
||||
}wanpipe_datascope_t;
|
||||
|
||||
|
||||
|
||||
#define STACK_IF_REQ 0x04
|
||||
#define WANPIPE_HEADER_SZ 16
|
||||
|
||||
|
||||
#ifdef LINUX_2_6
|
||||
#define SK_PRIV(x) ((struct wanpipe_opt*)(x->sk_user_data))
|
||||
#define SK_PRIV_INIT(x,val) (x)->sk_user_data=(void*)(val)
|
||||
#else
|
||||
#define SK_PRIV(x) ((struct wanpipe_opt*)(x->user_data))
|
||||
#define SK_PRIV_INIT(x,val) (x)->user_data=(void*)(val)
|
||||
#endif
|
||||
|
||||
#define DATA_SC(x) ((wanpipe_datascope_t*)(SK_PRIV(x)->datascope))
|
||||
#define DATA_SC_INIT(x,val) (SK_PRIV(x)->datascope = (void*)(val))
|
||||
#define PPRIV(x) ((wanpipe_parent_t*)(DATA_SC(x)->parent_priv))
|
||||
#define PPRIV_INIT(x,val) (DATA_SC(x)->parent_priv = (void*)(val))
|
||||
|
||||
#define wp_dev_hold(dev) atomic_inc(&(dev)->refcnt)
|
||||
|
||||
#define wp_dev_put(dev) if (atomic_dec_and_test(&dev->refcnt)){ \
|
||||
DEBUG_TEST("%s: %d: Freeing ptr %p\n",__FUNCTION__,__LINE__,dev);\
|
||||
wan_free(dev); \
|
||||
}
|
||||
|
||||
#define wp_sock_hold(sk) atomic_inc(&(sk)->sk_refcnt)
|
||||
#define wp_sock_put(sk) atomic_dec_and_test(&(sk)->sk_refcnt)
|
||||
|
||||
|
||||
struct wanpipe_api_register_struct
|
||||
{
|
||||
unsigned char init;
|
||||
int (*wanpipe_api_sock_rcv)(struct sk_buff *skb, netdevice_t *dev, struct sock *sk);
|
||||
int (*wanpipe_api_connected)(struct net_device *dev, struct sock *sk);
|
||||
int (*wanpipe_api_disconnected)(struct sock *sk);
|
||||
int (*wanpipe_listen_rcv) (struct sk_buff *skb, struct sock *sk);
|
||||
int (*sk_buf_check) (struct sock *sk, int len);
|
||||
int (*sk_poll_wake) (struct sock *sk);
|
||||
int (*wanpipe_api_connecting)(struct net_device *dev, struct sock *sk);
|
||||
};
|
||||
|
||||
|
||||
extern int register_wanpipe_api_socket (struct wanpipe_api_register_struct *wan_api_reg);
|
||||
extern void unregister_wanpipe_api_socket (void);
|
||||
|
||||
extern int bind_api_to_protocol (netdevice_t *dev, char *, unsigned short protocol, void *sk);
|
||||
extern int bind_api_listen_to_protocol (netdevice_t *dev, char *,unsigned short protocol, void *sk_id);
|
||||
extern int unbind_api_listen_from_protocol (unsigned short protocol, void *sk_id);
|
||||
|
||||
extern int wanpipe_lip_rx(void *chan, void *sk_id);
|
||||
extern int wanpipe_lip_connect(void *chan, int );
|
||||
extern int wanpipe_lip_disconnect(void *chan, int);
|
||||
extern int wanpipe_lip_kick(void *chan,int);
|
||||
extern int wanpipe_lip_get_if_status(void *chan, void *m);
|
||||
|
||||
extern int protocol_connected (netdevice_t *dev, void *sk_id);
|
||||
extern int protocol_connecting (netdevice_t *dev, void *sk_id);
|
||||
extern int protocol_disconnected (void *sk_id);
|
||||
extern int wanpipe_api_sock_rx (struct sk_buff *skb, netdevice_t *dev, void *sk_id);
|
||||
extern int wanpipe_api_listen_rx (struct sk_buff *skb, void *sk_id);
|
||||
extern int wanpipe_api_buf_check (void *sk_id, int len);
|
||||
extern int wanpipe_api_poll_wake(void *sk_id);
|
||||
|
||||
extern void signal_user_state_change(void);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,484 @@
|
|||
/*****************************************************************************
|
||||
* if_wanpipe_common.h Sangoma Driver/Socket common area definitions.
|
||||
*
|
||||
* Author: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2000 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Jan 13, 2000 Nenad Corbic Initial version
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
#ifndef _WANPIPE_SOCK_DRIVER_COMMON_H
|
||||
#define _WANPIPE_SOCK_DRIVER_COMMON_H
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
#if defined(__LINUX__)
|
||||
# include <linux/version.h>
|
||||
#endif
|
||||
|
||||
# include "wanpipe_debug.h"
|
||||
# include "wanpipe_common.h"
|
||||
# include "wanpipe_kernel.h"
|
||||
|
||||
#if defined(__LINUX__)
|
||||
# include "if_wanpipe.h"
|
||||
#endif
|
||||
|
||||
|
||||
/*#define wan_next_dev(dev) *((netdevice_t**)dev->priv)*/
|
||||
#define wan_next_dev(dev) *((netdevice_t**)wan_netif_priv(dev))
|
||||
|
||||
typedef struct {
|
||||
int (*open) (netdevice_t*);
|
||||
int (*close) (netdevice_t*);
|
||||
#if defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__)
|
||||
int (*output) (netdevice_t*,netskb_t*,struct sockaddr*, struct rtentry*);
|
||||
#else
|
||||
int (*send) (netskb_t* skb, netdevice_t*);
|
||||
struct net_device_stats* (*get_stats) (netdevice_t*);
|
||||
#endif
|
||||
int (*ioctl) (netdevice_t*, struct ifreq*, wan_ioctl_cmd_t);
|
||||
void (*tx_timeout) (netdevice_t*);
|
||||
#if defined (__LINUX__)
|
||||
int (*change_mtu)(netdevice_t *dev, int new_mtu);
|
||||
#endif
|
||||
} wanpipe_common_iface_t;
|
||||
|
||||
typedef struct wanpipe_common {
|
||||
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__)
|
||||
/* !!! IMPORTANT !!! <- Do not move this parameter (GENERIC-PPP) */
|
||||
void *prot_ptr;
|
||||
/* netdevice_t *next; */ /* netdevice_t *slave; */
|
||||
void *card;
|
||||
netdevice_t *dev;
|
||||
struct mtx ifmtx;
|
||||
unsigned char state;
|
||||
unsigned char usedby;
|
||||
wan_tasklet_t bh_task;
|
||||
wan_timer_t dev_timer;
|
||||
struct socket *sk; /* Wanpipe Sock bind's here (Not used)*/
|
||||
unsigned int protocol;
|
||||
unsigned short lcn;
|
||||
void *lip;
|
||||
unsigned int lip_prot;
|
||||
int is_spppdev; /* special mode for ADSL PPP_VC/PPP_LLC */
|
||||
# if defined(NETGRAPH)
|
||||
char ng_nodename [NG_NODELEN+1];
|
||||
int ng_running;
|
||||
node_p ng_node;
|
||||
hook_p ng_upper_hook;
|
||||
hook_p ng_lower_hook;
|
||||
hook_p ng_debug_hook;
|
||||
int ng_lowerhooks;
|
||||
int ng_upperhooks;
|
||||
int ng_datahooks;
|
||||
struct ifqueue lo_queue;
|
||||
struct ifqueue hi_queue;
|
||||
short ng_timeout;
|
||||
struct callout ng_timeout_handle;
|
||||
u_long ng_out_deficit; /* output since last input */
|
||||
u_char ng_promisc; /* promiscuous mode enabled */
|
||||
u_char ng_autoSrcAddr; /* always overwrite source address */
|
||||
# endif
|
||||
#elif defined(__LINUX__)
|
||||
/* !!! IMPORTANT !!! <- Do not move this parameter (GENERIC-PPP) */
|
||||
void* *prot_ptr;
|
||||
netdevice_t *next; /*slave;*/
|
||||
void *card;
|
||||
struct net_device_stats if_stats;
|
||||
|
||||
atomic_t receive_block;
|
||||
atomic_t command;
|
||||
atomic_t disconnect;
|
||||
|
||||
struct sock *sk; /* Wanpipe Sock bind's here */
|
||||
|
||||
struct tq_struct wanpipe_task; /* Immediate BH handler task */
|
||||
|
||||
unsigned char rw_bind; /* Sock bind state */
|
||||
unsigned char usedby;
|
||||
unsigned char state;
|
||||
unsigned char svc;
|
||||
unsigned short lcn;
|
||||
unsigned int config_id;
|
||||
|
||||
unsigned long used;
|
||||
unsigned long api_state;
|
||||
netdevice_t *dev;
|
||||
wan_skb_queue_t rx_queue;
|
||||
wan_tasklet_t bh_task;
|
||||
wan_timer_t dev_timer;
|
||||
|
||||
unsigned int protocol;
|
||||
|
||||
void *lip;
|
||||
unsigned int lip_prot;
|
||||
#elif defined(__WINDOWS__)
|
||||
/* !!! IMPORTANT !!! <- Do not move this parameter (GENERIC-PPP) */
|
||||
void* *prot_ptr;
|
||||
netdevice_t *next; /*slave;*/
|
||||
void *card;
|
||||
struct net_device_stats if_stats;
|
||||
|
||||
atomic_t receive_block;
|
||||
atomic_t command;
|
||||
atomic_t disconnect;
|
||||
|
||||
struct sock *sk; /* Wanpipe Sock bind's here */
|
||||
|
||||
wan_tasklet_t wanpipe_task; /* Immediate BH handler task */
|
||||
|
||||
unsigned char rw_bind; /* Sock bind state */
|
||||
unsigned char usedby;
|
||||
unsigned char state;
|
||||
unsigned char svc;
|
||||
unsigned short lcn;
|
||||
unsigned int config_id;
|
||||
|
||||
unsigned long used;
|
||||
unsigned long api_state;
|
||||
netdevice_t *dev;
|
||||
wan_skb_queue_t rx_queue;
|
||||
wan_tasklet_t bh_task;
|
||||
wan_timer_t dev_timer;
|
||||
|
||||
unsigned int protocol;
|
||||
|
||||
void *lip;
|
||||
unsigned int lip_prot;
|
||||
|
||||
#endif
|
||||
int is_netdev;
|
||||
wanpipe_common_iface_t iface;
|
||||
} wanpipe_common_t;
|
||||
|
||||
/* Used flags: Resources */
|
||||
enum {
|
||||
LCN_USED,
|
||||
LCN_DEV,
|
||||
LCN_TX_DEV,
|
||||
LCN_X25_LINK,
|
||||
LCN_SK_ID,
|
||||
LCN_DSP_ID,
|
||||
WAN_API_INIT
|
||||
};
|
||||
|
||||
#define SK_ID LCN_SK_ID
|
||||
|
||||
|
||||
enum {
|
||||
WANSOCK_UNCONFIGURED, /* link/channel is not configured */
|
||||
WANSOCK_DISCONNECTED, /* link/channel is disconnected */
|
||||
WANSOCK_CONNECTING, /* connection is in progress */
|
||||
WANSOCK_CONNECTED, /* link/channel is operational */
|
||||
WANSOCK_LIMIT, /* for verification only */
|
||||
WANSOCK_DUALPORT, /* for Dual Port cards */
|
||||
WANSOCK_DISCONNECTING,
|
||||
WANSOCK_BINDED,
|
||||
WANSOCK_BIND_LISTEN,
|
||||
WANSOCK_LISTEN
|
||||
};
|
||||
|
||||
|
||||
static __inline void *wan_get_lip_ptr(netdevice_t *dev)
|
||||
{
|
||||
if (wan_netif_priv(dev)){
|
||||
return ((wanpipe_common_t*)wan_netif_priv(dev))->lip;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static __inline int wan_set_lip_ptr(netdevice_t *dev, void *lipreg)
|
||||
{
|
||||
if (wan_netif_priv(dev)){
|
||||
((wanpipe_common_t*)wan_netif_priv(dev))->lip = lipreg;
|
||||
return 0;
|
||||
}
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static __inline int wan_set_lip_prot(netdevice_t *dev, int protocol)
|
||||
{
|
||||
if (wan_netif_priv(dev)){
|
||||
((wanpipe_common_t*)wan_netif_priv(dev))->lip_prot = protocol;
|
||||
return 0;
|
||||
}
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
||||
static __inline int wan_api_rx(void *chan_ptr,netskb_t *skb)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *chan = (wanpipe_common_t*)chan_ptr;
|
||||
|
||||
if (test_bit(SK_ID,&chan->used) && chan->sk){
|
||||
return wanpipe_api_sock_rx(skb,chan->dev,chan->sk);
|
||||
}
|
||||
#endif
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static __inline int wan_api_rx_dtmf(void *chan_ptr,netskb_t *skb)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *chan = (wanpipe_common_t*)chan_ptr;
|
||||
|
||||
if (test_bit(SK_ID,&chan->used) && chan->sk){
|
||||
return wanpipe_api_sock_rx(skb,chan->dev,chan->sk);
|
||||
}
|
||||
#endif
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static __inline void wan_wakeup_api(void *chan_ptr)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *chan = (wanpipe_common_t*)chan_ptr;
|
||||
|
||||
if (test_bit(SK_ID,&chan->used) && chan->sk){
|
||||
wanpipe_api_poll_wake(chan->sk);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
static __inline int wan_reg_api(void *chan_ptr, void *dev, char *devname)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *common = (wanpipe_common_t*)chan_ptr;
|
||||
|
||||
if (wan_test_and_set_bit(WAN_API_INIT,&common->used)){
|
||||
DEBUG_EVENT("%s: Error: Failed to initialize API!\n",
|
||||
devname);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
DEBUG_TEST("%s: Initializing API\n",
|
||||
devname);
|
||||
|
||||
common->sk=NULL;
|
||||
common->state = WAN_CONNECTING;
|
||||
common->dev = dev;
|
||||
common->api_state=0;
|
||||
|
||||
WAN_IFQ_INIT(&common->rx_queue,10);
|
||||
|
||||
/*WAN_TASKLET_INIT((&common->task),0,func,(unsigned long)common);*/
|
||||
|
||||
wan_set_bit(WAN_API_INIT,&common->used);
|
||||
#else
|
||||
DEBUG_EVENT("%s: Initializing API\n",
|
||||
devname);
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
static __inline int wan_unreg_api(void *chan_ptr, char *devname)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *common = (wanpipe_common_t*)chan_ptr;
|
||||
|
||||
if (!wan_test_and_clear_bit(WAN_API_INIT,&common->used)){
|
||||
DEBUG_TEST("%s: Error: Failed to unregister API!\n",
|
||||
devname);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
DEBUG_EVENT("%s: Unregistering API\n",
|
||||
devname);
|
||||
|
||||
common->state = WAN_DISCONNECTED;
|
||||
// WAN_TASKLET_KILL((&common->task));
|
||||
wan_skb_queue_purge(&common->rx_queue);
|
||||
#else
|
||||
DEBUG_EVENT("%s: Unregistering API\n",
|
||||
devname);
|
||||
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
static __inline void wan_release_svc_dev(wanpipe_common_t *chan)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wan_clear_bit(0,(void *)&chan->rw_bind);
|
||||
#endif
|
||||
}
|
||||
|
||||
static __inline void wan_get_svc_dev(wanpipe_common_t *chan)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wan_set_bit(0,(void *)&chan->rw_bind);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static __inline int wan_bind_api_to_svc(void *chan_ptr, void *sk_id)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *chan = (wanpipe_common_t*)chan_ptr;
|
||||
|
||||
if (!sk_id){
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (test_bit(SK_ID,&chan->used) || chan->sk){
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
wan_get_svc_dev(chan);
|
||||
chan->sk = sk_id;
|
||||
sock_hold(chan->sk);
|
||||
wan_set_bit(SK_ID,&chan->used);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static __inline int wan_unbind_api_from_svc(void *chan_ptr, void *sk_id)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *chan=(wanpipe_common_t*)chan_ptr;
|
||||
|
||||
WAN_ASSERT_EINVAL((!chan));
|
||||
WAN_ASSERT_EINVAL((!chan->dev));
|
||||
|
||||
DEBUG_TEST("%s:%s: BEGIN\n",__FUNCTION__,chan->dev->name);
|
||||
|
||||
if (test_bit(SK_ID,&chan->used) && chan->sk){
|
||||
|
||||
if ((struct sock*)sk_id != chan->sk){
|
||||
DEBUG_TEST("%s: ERROR: API trying to unbind invalid sock api! New=%p Orig=%p\n",
|
||||
chan->dev->name,sk_id,chan->sk);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
wan_clear_bit(SK_ID,&chan->used);
|
||||
__sock_put(chan->sk);
|
||||
chan->sk=NULL;
|
||||
|
||||
DEBUG_TEST("%s SK UNBIND SUCCESS\n",
|
||||
__FUNCTION__);
|
||||
|
||||
wan_release_svc_dev(chan);
|
||||
return 0;
|
||||
}
|
||||
|
||||
DEBUG_TEST("%s: ERROR: API trying to unbind invalid sock api! New=%p Orig=%p\n",
|
||||
chan->dev->name,sk_id,chan->sk);
|
||||
return -ENODEV;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static __inline void wan_update_api_state(void *chan_ptr)
|
||||
{
|
||||
|
||||
#if defined(__LINUX__)
|
||||
|
||||
int err=0;
|
||||
wanpipe_common_t *chan = (wanpipe_common_t*)chan_ptr;
|
||||
|
||||
/* If the LCN state changes from Connected to Disconnected, and
|
||||
* we are in the API mode, then notify the socket that the
|
||||
* connection has been lost */
|
||||
|
||||
if (chan->usedby != API)
|
||||
return;
|
||||
|
||||
if (test_bit(SK_ID,&chan->used) && chan->sk){
|
||||
|
||||
if (chan->state != WAN_CONNECTED && test_bit(0,&chan->api_state)){
|
||||
wan_clear_bit(0,&chan->api_state);
|
||||
protocol_disconnected (chan->sk);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
if (chan->state == WAN_CONNECTED){
|
||||
wan_set_bit(0,&chan->api_state);
|
||||
err=protocol_connected (chan->dev,chan->sk);
|
||||
if (err == -EINVAL){
|
||||
printk(KERN_INFO "%s:Major Error in Socket Above: CONN!!!\n",
|
||||
chan->dev->name);
|
||||
wan_unbind_api_from_svc(chan,chan->sk);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if (chan->state == WAN_DISCONNECTED){
|
||||
err = protocol_disconnected (chan->sk);
|
||||
}
|
||||
}else{
|
||||
DEBUG_TEST("%s: Error: no sk device\n",__FUNCTION__);
|
||||
}
|
||||
|
||||
if (chan->state != WAN_CONNECTED){
|
||||
wan_clear_bit(0,&chan->api_state);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
#define MAX_API_RX_QUEUE 10
|
||||
static __inline int wan_api_enqueue_skb(void *chan_ptr,netskb_t *skb)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *chan = (wanpipe_common_t*)chan_ptr;
|
||||
|
||||
if (wan_skb_queue_len(&chan->rx_queue) > MAX_API_RX_QUEUE){
|
||||
return -EBUSY;
|
||||
}
|
||||
wan_skb_queue_tail(&chan->rx_queue,skb);
|
||||
|
||||
if (wan_skb_queue_len(&chan->rx_queue) >= MAX_API_RX_QUEUE){
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
static __inline netskb_t* wan_api_dequeue_skb(void *chan_ptr)
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
wanpipe_common_t *chan = (wanpipe_common_t*)chan_ptr;
|
||||
return wan_skb_dequeue(&chan->rx_queue);
|
||||
#else
|
||||
return NULL;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#if 0
|
||||
void wp_debug_func_init(void)
|
||||
{
|
||||
DBG_ARRAY_CNT=0;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
extern int wanpipe_lip_rx(void *chan, void *sk_id);
|
||||
extern int wanpipe_lip_connect(void *chan, int );
|
||||
extern int wanpipe_lip_disconnect(void *chan, int);
|
||||
extern int wanpipe_lip_kick(void *chan,int);
|
||||
extern int wanpipe_lip_get_if_status(void *chan, void *m);
|
||||
#endif
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
|
||||
#endif
|
|
@ -0,0 +1,68 @@
|
|||
#ifndef _IF_WANPIPE_KERNEL_
|
||||
#define _IF_WANPIPE_KERNEL_
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#ifdef LINUX_2_6
|
||||
|
||||
#define pkt_sk(__sk) ((struct packet_opt *)(__sk)->sk_protinfo)
|
||||
|
||||
# if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11)) || defined(AF_WANPIPE_2612_FORCE_UPDATE)
|
||||
#define AF_WANPIPE_2612_UPDATE
|
||||
#define wansk_set_zapped(__sk) sock_set_flag(__sk, SOCK_ZAPPED)
|
||||
#define wansk_reset_zapped(__sk) sock_reset_flag(__sk, SOCK_ZAPPED)
|
||||
#define wansk_is_zapped(__sk) sock_flag(__sk, SOCK_ZAPPED)
|
||||
#define sk_debug sk_type
|
||||
#else
|
||||
#define wansk_set_zapped(__sk) __sk->sk_zapped=1
|
||||
#define wansk_reset_zapped(__sk) __sk->sk_zapped=0
|
||||
#define wansk_is_zapped(__sk) __sk->sk_zapped
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
||||
#define pkt_sk(__sk) (__sk)
|
||||
|
||||
#define sk_zapped zapped
|
||||
#define sk_state state
|
||||
#define sk_num num
|
||||
#define sk_wmem_alloc wmem_alloc
|
||||
#define sk_family family
|
||||
#define sk_type type
|
||||
#define sk_socket socket
|
||||
#define sk_priority priority
|
||||
#define sk_protocol protocol
|
||||
#define sk_num num
|
||||
#define sk_rcvbuf rcvbuf
|
||||
#define sk_sndbuf sndbuf
|
||||
#define sk_sleep sleep
|
||||
#define sk_data_ready data_ready
|
||||
#define sk_rmem_alloc rmem_alloc
|
||||
#define sk_bound_dev_if bound_dev_if
|
||||
#define sk_ack_backlog ack_backlog
|
||||
#define sk_data_ready data_ready
|
||||
#define sk_receive_queue receive_queue
|
||||
#define sk_max_ack_backlog max_ack_backlog
|
||||
#define sk_debug debug
|
||||
#define sk_pair pair
|
||||
#define sk_error_queue error_queue
|
||||
#define sk_refcnt refcnt
|
||||
#define sk_state_change state_change
|
||||
#define sk_error_queue error_queue
|
||||
#define sk_reuse reuse
|
||||
#define sk_err err
|
||||
#define sk_shutdown shutdown
|
||||
#define sk_reuse reuse
|
||||
#define sk_write_queue write_queue
|
||||
#define sk_user_data user_data
|
||||
|
||||
#define wansk_set_zapped(__sk) __sk->sk_zapped=1
|
||||
#define wansk_reset_zapped(__sk) __sk->sk_zapped=0
|
||||
#define wansk_is_zapped(__sk) __sk->sk_zapped
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1 @@
|
|||
.
|
|
@ -0,0 +1,102 @@
|
|||
/*****************************************************************************
|
||||
* sdla_56k.h Sangoma 56K configuration definitions.
|
||||
*
|
||||
* Author: Nenad Corbic
|
||||
*
|
||||
* Copyright: (c) 1995-2001 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
|
||||
* ============================================================================
|
||||
* July 20, 2001 Nenad Corbic Initial version.
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _SDLA_56K_H_
|
||||
#define _SDLA_56K_H_
|
||||
|
||||
/*******************************************************************************
|
||||
DEFINES AND MACROS
|
||||
******************************************************************************/
|
||||
|
||||
#define IS_56K_CARD(card) IS_56K_FEMEDIA(&(card)->fe)
|
||||
|
||||
#define RRA(alarm) ((alarm>>8)&0xFF)
|
||||
#define RRC(alarm) ((alarm)&0xFF)
|
||||
|
||||
#define INS_ALARM_56K(alarm) ((RRA(alarm)&0x0F) > 8) ? "GREEN" : "RED"
|
||||
#define DMI_ALARM_56K(alarm) (RRC(alarm)&0x80) ? "RED" : "OFF"
|
||||
#define ZCS_ALARM_56K(alarm) (RRC(alarm)&0x40) ? "RED" : "OFF"
|
||||
#define CMI_ALARM_56K(alarm) (RRC(alarm)&0x20) ? "RED" : "OFF"
|
||||
#define OOS_ALARM_56K(alarm) (RRC(alarm)&0x10) ? "RED" : "OFF"
|
||||
#define OOF_ALARM_56K(alarm) (RRC(alarm)&0x08) ? "RED" : "OFF"
|
||||
#define DLP_ALARM_56K(alarm) (RRC(alarm)&0x04) ? "RED" : "OFF"
|
||||
#define UMC_ALARM_56K(alarm) (RRC(alarm)&0x02) ? "RED" : "OFF"
|
||||
#define RLOS_ALARM_56K(alarm) (RRA(alarm)&0x80) ? "RED" : "OFF"
|
||||
|
||||
|
||||
/* registers on 56K card */
|
||||
#define REG_DEV_CTRL 0x00
|
||||
#define REG_TX_CTRL 0x01
|
||||
#define REG_RX_CTRL 0x02
|
||||
#define REG_EIA_SEL 0x05
|
||||
#define REG_EIA_TX_DATA 0x07
|
||||
#define REG_INT_EN_STAT 0x08
|
||||
#define REG_EIA_CTRL 0x09
|
||||
#define REG_DEV_STAT 0x0A
|
||||
#define REG_RX_SLICER_LVL 0x0B
|
||||
#define REG_RX_CODES 0x0C
|
||||
#define REG_RX_INVALID_BPV 0x0D
|
||||
|
||||
/* setting for each register */
|
||||
#define BIT_DEV_CTRL_DDS_PRI 0x00
|
||||
#define BIT_DEV_CTRL_SCT_E_OUT 0x10
|
||||
#define BIT_DEV_CTRL_XTALI_INT 0x40
|
||||
|
||||
#define BIT_INT_EN_STAT_ACTIVE 0x01
|
||||
#define BIT_INT_EN_STAT_RX_CODE 0x20
|
||||
#define BIT_INT_EN_STAT_IDEL 0x40
|
||||
|
||||
#define BIT_EIA_CTRL_RTS_ACTIVE 0x01
|
||||
#define BIT_EIA_CTRL_DTR_ACTIVE 0x02
|
||||
#define BIT_EIA_CTRL_DTE_ENABLE 0x04
|
||||
#define BIT_DEV_STAT_IL_44_dB 0x08
|
||||
#define BIT_DEV_STAT_RLOS 0x80
|
||||
|
||||
#define BIT_RX_CTRL_DSU_LOOP 0x80
|
||||
#define BIT_RX_CTRL_CSU_LOOP 0x20
|
||||
|
||||
#define BIT_RX_CODES_UNMTCH 0x01
|
||||
#define BIT_RX_CODES_UMC 0x02
|
||||
#define BIT_RX_CODES_DLP 0x04
|
||||
#define BIT_RX_CODES_OOF 0x08
|
||||
#define BIT_RX_CODES_OOS 0x10
|
||||
#define BIT_RX_CODES_CMI 0x20
|
||||
#define BIT_RX_CODES_ZSC 0x40
|
||||
#define BIT_RX_CODES_DMI 0x80
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
FUNCTION PROTOTYPES
|
||||
******************************************************************************/
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
typedef struct {
|
||||
unsigned char RLOS_56k;
|
||||
unsigned char RR8_reg_56k;
|
||||
unsigned char RRA_reg_56k;
|
||||
unsigned char RRC_reg_56k;
|
||||
unsigned char prev_RRC_reg_56k;
|
||||
unsigned char delta_RRC_reg_56k;
|
||||
} sdla_56k_param_t;
|
||||
|
||||
extern int sdla_56k_default_cfg(void* arg1, void* p56k_cfg);
|
||||
extern int sdla_56k_iface_init(void* pfe, void *p_fe_iface);
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#endif
|
|
@ -0,0 +1,68 @@
|
|||
/*******************************************************************************
|
||||
* ** sdla_remora_a600.h
|
||||
* **
|
||||
* ** Author: David Yat Sin <dyatsin@sangoma.com>
|
||||
* **
|
||||
* ** Copyright: (c) 2005 Sangoma Technologies Inc.
|
||||
* **
|
||||
* ** This program is free software; you can redistribute it and/or
|
||||
* ** modify it under the terms of the GNU General Public License
|
||||
* ** as published by the Free Software Foundation; either version
|
||||
* ** 2 of the License, or (at your option) any later version.
|
||||
* ** ============================================================================
|
||||
* ** Nov , 2008 David Yat Sin Initial version
|
||||
* *******************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef __SDLA_A600_H
|
||||
#define __SDLA_A600_H
|
||||
|
||||
|
||||
#define AFT_A600_BASE_REG_OFF 0x1000
|
||||
#define A600_REG_OFF(reg) reg+AFT_A600_BASE_REG_OFF
|
||||
|
||||
#define A600_SERIALNUM_REG_HI 0x109C
|
||||
#define A600_SERIALNUM_REG_LO 0x1098
|
||||
|
||||
#define NUM_A600_ANALOG_PORTS 5
|
||||
#define NUM_A600_ANALOG_FXO_PORTS 4
|
||||
|
||||
|
||||
#define A600_SPI_REG_BROADCAST_MODE_BIT 26
|
||||
#define A600_SPI_REG_READ_ENABLE_BIT 27 /* 1 for read, 0 for write */
|
||||
#define A600_SPI_REG_CHAN_TYPE_FXS_BIT 28 /* 0 for FXO, 1 for FXS */
|
||||
#define A600_SPI_REG_FXS_RESET_BIT 29 /* reset FXS channel */
|
||||
#define A600_SPI_REG_FX0_RESET_BIT 30 /* reset FX0 channel */
|
||||
#define A600_SPI_REG_SPI_BUSY_BIT 31 /* 1 busy, 0 ready */
|
||||
#define A600_SPI_REG_START_BIT 31
|
||||
|
||||
|
||||
|
||||
|
||||
#define A600_SPI_REG_CTRL_BYTE_MASK 0xFF000000
|
||||
#define A600_SPI_REG_ADDR_BYTE_MASK 0x0000FF00
|
||||
#define A600_SPI_REG_DATA_BYTE_MASK 0x000000FF
|
||||
|
||||
extern int wp_a600_iface_init(void*, void*);
|
||||
|
||||
|
||||
#define IS_A600(fe) (((sdla_t*)(fe->card))->adptr_type == AFT_ADPTR_A600 || ((sdla_t*)(fe->card))->adptr_type == AFT_ADPTR_B610)
|
||||
#define IS_A600_CARD(card) (card->adptr_type == AFT_ADPTR_A600 || card->adptr_type == AFT_ADPTR_B610)
|
||||
|
||||
#define IS_B610(fe) (((sdla_t*)(fe->card))->adptr_type == AFT_ADPTR_B610)
|
||||
|
||||
#define IS_B601(fe) (((sdla_t*)(fe->card))->adptr_type == AFT_ADPTR_B601)
|
||||
#define IS_B601_CARD(card) (card->adptr_type == AFT_ADPTR_B601)
|
||||
#define IS_B601_TE1_CARD(card) (card->adptr_type == AFT_ADPTR_B601 && card->wandev.comm_port == 1)
|
||||
|
||||
#define A600_MAXIM_INTERFACE_REG_ADD_LO 0x1044
|
||||
#define A600_MAXIM_INTERFACE_REG_ADD_HI 0x1046
|
||||
|
||||
#define A600_FIRST_LINE_CFG_ADD 0x2100
|
||||
|
||||
#define A600_FIRST_LINE_CFG_RESET_BIT 0x01
|
||||
|
||||
#endif /* SDLA_A600_H */
|
||||
|
|
@ -0,0 +1,773 @@
|
|||
/*****************************************************************************
|
||||
* sdla_adccp.h Sangoma HDLC LAPB firmware API definitions.
|
||||
*
|
||||
* Author: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2003 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Apr 30, 2003 Nenad Corbic Initial Version
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef _SDLA_ADCCP_H
|
||||
#define _SDLA_ADCCP_H
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Notes:
|
||||
* ------
|
||||
* 1. All structures defined in this file are byte-alined.
|
||||
* Compiler Platform
|
||||
* -------- --------
|
||||
* GNU C Linux
|
||||
*
|
||||
*/
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/****** CONSTANTS DEFINITIONS ***********************************************/
|
||||
|
||||
#define X25_MAX_CHAN 255 /* max number of open X.25 circuits */
|
||||
#define X25_MAX_DATA 1024 /* max length of X.25 data buffer */
|
||||
/*
|
||||
* X.25 shared memory layout.
|
||||
*/
|
||||
#define X25_MBOX_OFFS 0x16B0 /* general mailbox block */
|
||||
#define X25_RXMBOX_OFFS 0x1AD0 /* receive mailbox */
|
||||
#define X25_STATUS_OFFS 0x1EF8 /* X.25 status structure */
|
||||
|
||||
#define X25_MB_VECTOR 0xE000 /* S514 mailbox window vecotr */
|
||||
#define X25_MISC_HDLC_BITS 0x1EFF /*X.25 miscallaneous HDLC bits */
|
||||
|
||||
/* code levels */
|
||||
#define HDLC_LEVEL 0x01
|
||||
#define X25_LEVEL 0x02
|
||||
#define X25_AND_HDLC_LEVEL 0x03
|
||||
#define DO_HDLC_LEVEL_ERROR_CHECKING 0x04
|
||||
|
||||
/****** DATA STRUCTURES *****************************************************/
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X.25 Command Block.
|
||||
*/
|
||||
typedef struct X25Cmd
|
||||
{
|
||||
unsigned char command ; /* command code */
|
||||
unsigned short length ; /* transfer data length */
|
||||
unsigned char result ; /* return code */
|
||||
unsigned char pf ; /* P/F bit */
|
||||
unsigned short lcn ; /* logical channel */
|
||||
unsigned char qdm ; /* Q/D/M bits */
|
||||
unsigned char cause ; /* cause field */
|
||||
unsigned char diagn ; /* diagnostics */
|
||||
unsigned char pktType ; /* packet type */
|
||||
unsigned char resrv[4] ; /* reserved */
|
||||
} TX25Cmd;
|
||||
|
||||
/*
|
||||
* Defines for the 'command' field.
|
||||
*/
|
||||
/*----- General commands --------------*/
|
||||
#define X25_SET_GLOBAL_VARS 0x0B /* set global variables */
|
||||
#define X25_READ_MODEM_STATUS 0x0C /* read modem status */
|
||||
#define X25_READ_CODE_VERSION 0x15 /* read firmware version number */
|
||||
#define X25_TRACE_CONFIGURE 0x14 /* configure trace facility */
|
||||
#define X25_READ_TRACE_DATA 0x16 /* read trace data */
|
||||
#define X25_SET_INTERRUPT_MODE 0x17 /* set interrupt generation mode */
|
||||
#define X25_READ_INTERRUPT_MODE 0x18 /* read interrupt generation mode */
|
||||
/*----- HDLC-level commands -----------*/
|
||||
#define X25_HDLC_LINK_CONFIGURE 0x01 /* configure HDLC link level */
|
||||
#define X25_HDLC_LINK_OPEN 0x02 /* open HDLC link */
|
||||
#define X25_HDLC_LINK_CLOSE 0x03 /* close HDLC link */
|
||||
#define X25_HDLC_LINK_SETUP 0x04 /* set up HDLC link */
|
||||
#define X25_HDLC_LINK_DISC 0x05 /* disconnect DHLC link */
|
||||
#define X25_HDLC_LINK_STATUS 0x06 /* read DHLC link status */
|
||||
#define X25_HDLC_READ_STATS 0x07 /* read operational statistics */
|
||||
#define X25_HDLC_FLUSH_STATS 0x08 /* flush operational statistics */
|
||||
#define X25_HDLC_READ_COMM_ERR 0x09 /* read error statistics */
|
||||
#define X25_HDLC_FLUSH_COMM_ERR 0x0A /* flush error statistics */
|
||||
#define X25_HDLC_FLUSH_BUFFERS 0x0D /* flush HDLC-level data buffers */
|
||||
#define X25_HDLC_SPRVS_CNT_STAT 0x0F /* read surervisory count status */
|
||||
#define X25_HDLC_SEND_UI_FRAME 0x10 /* send unnumbered information frame */
|
||||
#define X25_HDLC_WRITE 0x11 /* send HDLC information frame */
|
||||
#define X25_HDLC_READ 0x21 /* read HDLC information frame */
|
||||
#define X25_HDLC_READ_CONFIG 0x12 /* read HDLC configuration */
|
||||
#define X25_HDLC_SET_CONFIG 0x13 /* set HDLC configuration */
|
||||
#define SET_PROTOCOL_LEVEL 0x1F /* set protocol level */
|
||||
/*----- X.25-level commands -----------*/
|
||||
#define X25_READ 0x22 /* read X.25 packet */
|
||||
#define X25_WRITE 0x23 /* send X.25 packet */
|
||||
#define X25_PLACE_CALL 0x30 /* place a call on SVC */
|
||||
#define X25_ACCEPT_CALL 0x31 /* accept incomming call */
|
||||
#define X25_CLEAR_CALL 0x32 /* clear call */
|
||||
#define X25_CLEAR_CONFRM 0x33 /* send clear confirmation packet */
|
||||
#define X25_RESET 0x34 /* send reset request packet */
|
||||
#define X25_RESET_CONFRM 0x35 /* send reset confirmation packet */
|
||||
#define X25_RESTART 0x36 /* send restart request packet */
|
||||
#define X25_RESTART_CONFRM 0x37 /* send restart confirmation packet */
|
||||
#define X25_WP_INTERRUPT 0x38 /* send interrupt request packet */
|
||||
#define X25_INTERRUPT_CONFRM 0x39 /* send interrupt confirmation pkt */
|
||||
#define X25_REGISTRATION_RQST 0x3A /* send registration request packet */
|
||||
#define X25_REGISTRATION_CONFRM 0x3B /* send registration confirmation */
|
||||
#define X25_IS_DATA_AVAILABLE 0x40 /* querry receive queue */
|
||||
#define X25_INCOMMING_CALL_CTL 0x41 /* select incomming call options */
|
||||
#define X25_CONFIGURE_PVC 0x42 /* configure PVC */
|
||||
#define X25_GET_ACTIVE_CHANNELS 0x43 /* get a list of active circuits */
|
||||
#define X25_READ_CHANNEL_CONFIG 0x44 /* read virt. circuit configuration */
|
||||
#define X25_FLUSH_DATA_BUFFERS 0x45 /* flush X.25-level data buffers */
|
||||
#define X25_READ_HISTORY_TABLE 0x46 /* read asynchronous event log */
|
||||
#define X25_HISTORY_TABLE_CTL 0x47 /* control asynchronous event log */
|
||||
#define X25_GET_TX_D_BIT_STATUS 0x48 /* is packet with D-bit acknowleged */
|
||||
#define X25_READ_STATISTICS 0x49 /* read X.25-level statistics */
|
||||
#define X25_FLUSH_STATISTICS 0x4A /* flush X.25-level statistics */
|
||||
#define X25_READ_CONFIGURATION 0x50 /* read HDLC & X.25 configuration */
|
||||
#define X25_SET_CONFIGURATION 0x51 /* set HDLC & X.25 configuration */
|
||||
|
||||
/*
|
||||
* Defines for the 'result' field.
|
||||
*/
|
||||
/*----- General results ---------------*/
|
||||
#define X25RES_OK 0x00
|
||||
#define X25RES_ERROR 0x01
|
||||
#define X25RES_LINK_NOT_IN_ABM 0x02 /* link is not in ABM mode */
|
||||
#define X25RES_LINK_CLOSED 0x03
|
||||
#define X25RES_INVAL_LENGTH 0x04
|
||||
#define X25RES_INVAL_CMD 0x05
|
||||
#define X25RES_UNNUMBERED_FRAME 0x06 /* unnunbered frame received */
|
||||
#define X25RES_FRM_REJECT_MODE 0x07 /* link is in Frame Reject mode */
|
||||
#define X25RES_MODEM_FAILURE 0x08 /* DCD and/or CTS dropped */
|
||||
#define X25RES_N2_RETRY_LIMIT 0x09 /* N2 retry limit has been exceeded */
|
||||
#define X25RES_INVAL_LCN 0x30 /* invalid logical channel number */
|
||||
#define X25RES_INVAL_STATE 0x31 /* channel is not in data xfer mode */
|
||||
#define X25RES_INVAL_DATA_LEN 0x32 /* invalid data length */
|
||||
#define X25RES_NOT_READY 0x33 /* no data available / buffers full */
|
||||
#define X25RES_NETWORK_DOWN 0x34
|
||||
#define X25RES_CHANNEL_IN_USE 0x35 /* there is data queued on this LCN */
|
||||
#define X25RES_REGST_NOT_SUPPRT 0x36 /* registration not supported */
|
||||
#define X25RES_INVAL_FORMAT 0x37 /* invalid packet format */
|
||||
#define X25RES_D_BIT_NOT_SUPPRT 0x38 /* D-bit pragmatics not supported */
|
||||
#define X25RES_FACIL_NOT_SUPPRT 0x39 /* Call facility not supported */
|
||||
#define X25RES_INVAL_CALL_ARG 0x3A /* errorneous call arguments */
|
||||
#define X25RES_INVAL_CALL_DATA 0x3B /* errorneous call user data */
|
||||
#define X25RES_ASYNC_PACKET 0x40 /* asynchronous packet received */
|
||||
#define X25RES_PROTO_VIOLATION 0x41 /* protocol violation occured */
|
||||
#define X25RES_PKT_TIMEOUT 0x42 /* X.25 packet time out */
|
||||
#define X25RES_PKT_RETRY_LIMIT 0x43 /* X.25 packet retry limit exceeded */
|
||||
/*----- Command-dependant results -----*/
|
||||
#define X25RES_LINK_DISC 0x00 /* HDLC_LINK_STATUS */
|
||||
#define X25RES_LINK_IN_ABM 0x01 /* HDLC_LINK_STATUS */
|
||||
#define X25RES_NO_DATA 0x01 /* HDLC_READ/READ_TRACE_DATA*/
|
||||
#define X25RES_TRACE_INACTIVE 0x02 /* READ_TRACE_DATA */
|
||||
#define X25RES_LINK_IS_OPEN 0x01 /* HDLC_LINK_OPEN */
|
||||
#define X25RES_LINK_IS_DISC 0x02 /* HDLC_LINK_DISC */
|
||||
#define X25RES_LINK_IS_CLOSED 0x03 /* HDLC_LINK_CLOSE */
|
||||
#define X25RES_INVAL_PARAM 0x31 /* INCOMMING_CALL_CTL */
|
||||
#define X25RES_INVAL_CONFIG 0x35 /* REGISTR_RQST/CONFRM */
|
||||
|
||||
/*
|
||||
* Defines for the 'qdm_bits' field.
|
||||
*/
|
||||
#define X25CMD_Q_BIT_MASK 0x04
|
||||
#define X25CMD_D_BIT_MASK 0x02
|
||||
#define X25CMD_M_BIT_MASK 0x01
|
||||
|
||||
/*
|
||||
* Defines for the 'pkt_type' field.
|
||||
*/
|
||||
/*----- Asynchronous events ------*/
|
||||
#define ASE_CLEAR_RQST 0x02
|
||||
#define ASE_RESET_RQST 0x04
|
||||
#define ASE_RESTART_RQST 0x08
|
||||
#define ASE_INTERRUPT 0x10
|
||||
#define ASE_DTE_REGISTR_RQST 0x20
|
||||
#define ASE_CALL_RQST 0x30
|
||||
#define ASE_CALL_ACCEPTED 0x31
|
||||
#define ASE_CLEAR_CONFRM 0x32
|
||||
#define ASE_RESET_CONFRM 0x33
|
||||
#define ASE_RESTART_CONFRM 0x34
|
||||
#define ASE_INTERRUPT_CONFRM 0x35
|
||||
#define ASE_DCE_REGISTR_CONFRM 0x36
|
||||
#define ASE_DIAGNOSTIC 0x37
|
||||
#define ASE_CALL_AUTO_CLEAR 0x38
|
||||
#define AUTO_RESPONSE_FLAG 0x80
|
||||
/*----- Time-Out events ----------*/
|
||||
#define TOE_RESTART_RQST 0x03
|
||||
#define TOE_CALL_RQST 0x05
|
||||
#define TOE_CLEAR_RQST 0x08
|
||||
#define TOE_RESET_RQST 0x0A
|
||||
/*----- Protocol Violation events */
|
||||
#define PVE_CLEAR_RQST 0x32
|
||||
#define PVE_RESET_RQST 0x33
|
||||
#define PVE_RESTART_RQST 0x34
|
||||
#define PVE_DIAGNOSTIC 0x37
|
||||
|
||||
#define INTR_ON_RX_FRAME 0x01
|
||||
#define INTR_ON_TX_FRAME 0x02
|
||||
#define INTR_ON_MODEM_STATUS_CHANGE 0x04
|
||||
#define INTR_ON_COMMAND_COMPLETE 0x08
|
||||
#define INTR_ON_X25_ASY_TRANSACTION 0x10
|
||||
#define INTR_ON_TIMER 0x40
|
||||
#define DIRECT_RX_INTR_USAGE 0x80
|
||||
|
||||
#define NO_INTR_PENDING 0x00
|
||||
#define RX_INTR_PENDING 0x01
|
||||
#define TX_INTR_PENDING 0x02
|
||||
#define MODEM_INTR_PENDING 0x04
|
||||
#define COMMAND_COMPLETE_INTR_PENDING 0x08
|
||||
#define X25_ASY_TRANS_INTR_PENDING 0x10
|
||||
#define TIMER_INTR_PENDING 0x40
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X.25 Mailbox.
|
||||
* This structure is located at offsets X25_MBOX_OFFS and X25_RXMBOX_OFFS
|
||||
* into shared memory window.
|
||||
*/
|
||||
typedef struct X25Mbox
|
||||
{
|
||||
unsigned char opflag ; /* 00h: execution flag */
|
||||
TX25Cmd cmd ; /* 01h: command block */
|
||||
unsigned char data[1] ; /* 10h: data buffer */
|
||||
} TX25Mbox;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X.25 Time Stamp Structure.
|
||||
*/
|
||||
typedef struct X25TimeStamp
|
||||
{
|
||||
unsigned char month ;
|
||||
unsigned char date ;
|
||||
unsigned char sec ;
|
||||
unsigned char min ;
|
||||
unsigned char hour ;
|
||||
} TX25TimeStamp;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X.25 Status Block.
|
||||
* This structure is located at offset X25_STATUS_OFF into shared memory
|
||||
* window.
|
||||
*/
|
||||
typedef struct X25Status
|
||||
{
|
||||
TX25TimeStamp tstamp ; /* 08h: timestamp (BCD) */
|
||||
unsigned char iflags ; /* 0Dh: interrupt flags */
|
||||
unsigned char imask ; /* 0Eh: interrupt mask */
|
||||
unsigned char hdlc_status ; /* 10h: misc. HDLC/X25 flags */
|
||||
unsigned char ghdlc_status ; /* channel status bytes */
|
||||
} TX25Status;
|
||||
|
||||
/*
|
||||
* Bitmasks for the 'iflags' field.
|
||||
*/
|
||||
#define X25_RX_INTR 0x01 /* receive interrupt */
|
||||
#define X25_TX_INTR 0x02 /* transmit interrupt */
|
||||
#define X25_MODEM_INTR 0x04 /* modem status interrupt (CTS/DCD) */
|
||||
#define X25_EVENT_INTR 0x10 /* asyncronous event encountered */
|
||||
#define X25_CMD_INTR 0x08 /* interface command complete */
|
||||
|
||||
/*
|
||||
* Bitmasks for the 'gflags' field.
|
||||
*/
|
||||
#define X25_HDLC_ABM 0x01 /* HDLC is in ABM mode */
|
||||
#define X25_RX_READY 0x02 /* X.25 data available */
|
||||
#define X25_TRACE_READY 0x08 /* trace data available */
|
||||
#define X25_EVENT_IND 0x20 /* asynchronous event indicator */
|
||||
#define X25_TX_READY 0x40 /* space is available in Tx buf.*/
|
||||
|
||||
/*
|
||||
* Bitmasks for the 'cflags' field.
|
||||
*/
|
||||
#define X25_XFER_MODE 0x80 /* channel is in data transfer mode */
|
||||
#define X25_TXWIN_OPEN 0x40 /* transmit window open */
|
||||
#define X25_RXBUF_MASK 0x3F /* number of data buffers available */
|
||||
|
||||
/*****************************************************************************
|
||||
* Following definitions structurize contents of the TX25Mbox.data field for
|
||||
* different X.25 interface commands.
|
||||
****************************************************************************/
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_SET_GLOBAL_VARS Command.
|
||||
*/
|
||||
typedef struct X25GlobalVars
|
||||
{
|
||||
unsigned char resrv ; /* 00h: reserved */
|
||||
unsigned char dtrCtl ; /* 01h: DTR control code */
|
||||
unsigned char resErr ; /* 01h: '1' - reset modem error */
|
||||
} TX25GlobalVars;
|
||||
|
||||
/*
|
||||
* Defines for the 'dtrCtl' field.
|
||||
*/
|
||||
#define X25_RAISE_DTR 0x01
|
||||
#define X25_DROP_DTR 0x02
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_READ_MODEM_STATUS Command.
|
||||
*/
|
||||
typedef struct X25ModemStatus
|
||||
{
|
||||
unsigned char status ; /* 00h: modem status */
|
||||
} TX25ModemStatus;
|
||||
|
||||
/*
|
||||
* Defines for the 'status' field.
|
||||
*/
|
||||
#define X25_CTS_MASK 0x20
|
||||
#define X25_DCD_MASK 0x08
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_HDLC_LINK_STATUS Command.
|
||||
*/
|
||||
typedef struct X25LinkStatus
|
||||
{
|
||||
unsigned char txQueued ; /* 00h: queued Tx I-frames*/
|
||||
unsigned char rxQueued ; /* 01h: queued Rx I-frames*/
|
||||
unsigned char station ; /* 02h: DTE/DCE config. */
|
||||
unsigned char reserved ; /* 03h: reserved */
|
||||
unsigned char sfTally ; /* 04h: supervisory frame tally */
|
||||
} TX25LinkStatus;
|
||||
|
||||
/*
|
||||
* Defines for the 'station' field.
|
||||
*/
|
||||
#define X25_STATION_DTE 0x01 /* station configured as DTE */
|
||||
#define X25_STATION_DCE 0x02 /* station configured as DCE */
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_HDLC_READ_STATS Command.
|
||||
*/
|
||||
typedef struct HdlcStats
|
||||
{ /* a number of ... */
|
||||
unsigned short rxIFrames ; /* 00h: ready Rx I-frames */
|
||||
unsigned short rxNoseq ; /* 02h: frms out-of-sequence */
|
||||
unsigned short rxNodata ; /* 04h: I-frms without data */
|
||||
unsigned short rxDiscarded ; /* 06h: discarded frames */
|
||||
unsigned short rxTooLong ; /* 08h: frames too long */
|
||||
unsigned short rxBadAddr ; /* 0Ah: frms with inval.addr*/
|
||||
unsigned short txAcked ; /* 0Ch: acknowledged I-frms */
|
||||
unsigned short txRetransm ; /* 0Eh: re-transmit. I-frms */
|
||||
unsigned short t1Timeout ; /* 10h: T1 timeouts */
|
||||
unsigned short rxSABM ; /* 12h: received SABM frames */
|
||||
unsigned short rxDISC ; /* 14h: received DISC frames */
|
||||
unsigned short rxDM ; /* 16h: received DM frames */
|
||||
unsigned short rxFRMR ; /* 18h: FRMR frames received */
|
||||
unsigned short txSABM ; /* 1Ah: transm. SABM frames*/
|
||||
unsigned short txDISC ; /* 1Ch: transm. DISC frames*/
|
||||
unsigned short txDM ; /* 1Eh: transm. DM frames */
|
||||
unsigned short txFRMR ; /* 20h: transm. FRMR frames*/
|
||||
} THdlcStats;
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_HDLC_READ_COMM_ERR Command.
|
||||
*/
|
||||
typedef struct HdlcCommErr
|
||||
{ /* a number of ... */
|
||||
unsigned char rxOverrun ; /* 00h: Rx overrun errors */
|
||||
unsigned char rxBadCrc ; /* 01h: Rx CRC errors */
|
||||
unsigned char rxAborted ; /* 02h: Rx aborted frames */
|
||||
unsigned char rxDropped ; /* 03h: frames lost */
|
||||
unsigned char txAborted ; /* 04h: Tx aborted frames */
|
||||
unsigned char txUnderrun ; /* 05h: Tx underrun errors */
|
||||
unsigned char txMissIntr ; /* 06h: missed underrun ints */
|
||||
unsigned char reserved ; /* 07h: reserved */
|
||||
unsigned char droppedDCD ; /* 08h: times DCD dropped */
|
||||
unsigned char droppedCTS ; /* 09h: times CTS dropped */
|
||||
} THdlcCommErr;
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_SET_CONFIGURATION & X25_READ_CONFIGURATION Commands.
|
||||
*/
|
||||
typedef struct X25Config
|
||||
{
|
||||
unsigned char baudRate ; /* 00h: */
|
||||
unsigned char t1 ; /* 01h: */
|
||||
unsigned char t2 ; /* 02h: */
|
||||
unsigned char n2 ; /* 03h: */
|
||||
unsigned short hdlcMTU ; /* 04h: */
|
||||
unsigned char hdlcWindow ; /* 06h: */
|
||||
unsigned char t4 ; /* 07h: */
|
||||
unsigned char autoModem ; /* 08h: */
|
||||
unsigned char autoHdlc ; /* 09h: */
|
||||
unsigned char hdlcOptions ; /* 0Ah: */
|
||||
unsigned char station ; /* 0Bh: */
|
||||
unsigned char local_station_address ;
|
||||
|
||||
#if 0
|
||||
unsigned char pktWindow ; /* 0Ch: */
|
||||
unsigned short defPktSize ; /* 0Dh: */
|
||||
unsigned short pktMTU ; /* 0Fh: */
|
||||
unsigned short loPVC ; /* 11h: */
|
||||
unsigned short hiPVC ; /* 13h: */
|
||||
unsigned short loIncommingSVC ; /* 15h: */
|
||||
unsigned short hiIncommingSVC ; /* 17h: */
|
||||
unsigned short loTwoWaySVC ; /* 19h: */
|
||||
unsigned short hiTwoWaySVC ; /* 1Bh: */
|
||||
unsigned short loOutgoingSVC ; /* 1Dh: */
|
||||
unsigned short hiOutgoingSVC ; /* 1Fh: */
|
||||
unsigned short options ; /* 21h: */
|
||||
unsigned char responseOpt ; /* 23h: */
|
||||
unsigned short facil1 ; /* 24h: */
|
||||
unsigned short facil2 ; /* 26h: */
|
||||
unsigned short ccittFacil ; /* 28h: */
|
||||
unsigned short otherFacil ; /* 2Ah: */
|
||||
unsigned short ccittCompat ; /* 2Ch: */
|
||||
unsigned char t10t20 ; /* 2Eh: */
|
||||
unsigned char t11t21 ; /* 2Fh: */
|
||||
unsigned char t12t22 ; /* 30h: */
|
||||
unsigned char t13t23 ; /* 31h: */
|
||||
unsigned char t16t26 ; /* 32H: */
|
||||
unsigned char t28 ; /* 33h: */
|
||||
unsigned char r10r20 ; /* 34h: */
|
||||
unsigned char r12r22 ; /* 35h: */
|
||||
unsigned char r13r23 ; /* 36h: */
|
||||
#endif
|
||||
} TX25Config;
|
||||
|
||||
#define X25_PACKET_WINDOW 0x02 /* Default value for Window Size */
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_READ_CHANNEL_CONFIG Command.
|
||||
*/
|
||||
typedef struct X25ChanAlloc /*----- Channel allocation -*/
|
||||
{
|
||||
unsigned short loPVC ; /* 00h: lowest PVC number */
|
||||
unsigned short hiPVC ; /* 02h: highest PVC number */
|
||||
unsigned short loIncommingSVC ; /* 04h: lowest incoming SVC */
|
||||
unsigned short hiIncommingSVC ; /* 06h: highest incoming SVC */
|
||||
unsigned short loTwoWaySVC ; /* 08h: lowest two-way SVC */
|
||||
unsigned short hiTwoWaySVC ; /* 0Ah: highest two-way SVC */
|
||||
unsigned short loOutgoingSVC ; /* 0Ch: lowest outgoing SVC */
|
||||
unsigned short hiOutgoingSVC ; /* 0Eh: highest outgoing SVC */
|
||||
} TX25ChanAlloc;
|
||||
|
||||
typedef struct X25ChanCfg /*------ Channel configuration -----*/
|
||||
{
|
||||
unsigned char type ; /* 00h: channel type */
|
||||
unsigned char txConf ; /* 01h: Tx packet and window sizes */
|
||||
unsigned char rxConf ; /* 01h: Rx packet and window sizes */
|
||||
} TX25ChanCfg;
|
||||
|
||||
/*
|
||||
* Defines for the 'type' field.
|
||||
*/
|
||||
#define X25_PVC 0x01 /* PVC */
|
||||
#define X25_SVC_IN 0x03 /* Incoming SVC */
|
||||
#define X25_SVC_TWOWAY 0x07 /* Two-way SVC */
|
||||
#define X25_SVC_OUT 0x0B /* Outgoing SVC */
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X25_READ_STATISTICS Command.
|
||||
*/
|
||||
typedef struct X25Stats
|
||||
{ /* number of packets Tx/Rx'ed */
|
||||
unsigned short txRestartRqst ; /* 00h: Restart Request */
|
||||
unsigned short rxRestartRqst ; /* 02h: Restart Request */
|
||||
unsigned short txRestartConf ; /* 04h: Restart Confirmation */
|
||||
unsigned short rxRestartConf ; /* 06h: Restart Confirmation */
|
||||
unsigned short txResetRqst ; /* 08h: Reset Request */
|
||||
unsigned short rxResetRqst ; /* 0Ah: Reset Request */
|
||||
unsigned short txResetConf ; /* 0Ch: Reset Confirmation */
|
||||
unsigned short rxResetConf ; /* 0Eh: Reset Confirmation */
|
||||
unsigned short txCallRequest ; /* 10h: Call Request */
|
||||
unsigned short rxCallRequest ; /* 12h: Call Request */
|
||||
unsigned short txCallAccept ; /* 14h: Call Accept */
|
||||
unsigned short rxCallAccept ; /* 16h: Call Accept */
|
||||
unsigned short txClearRqst ; /* 18h: Clear Request */
|
||||
unsigned short rxClearRqst ; /* 1Ah: Clear Request */
|
||||
unsigned short txClearConf ; /* 1Ch: Clear Confirmation */
|
||||
unsigned short rxClearConf ; /* 1Eh: Clear Confirmation */
|
||||
unsigned short txDiagnostic ; /* 20h: Diagnostic */
|
||||
unsigned short rxDiagnostic ; /* 22h: Diagnostic */
|
||||
unsigned short txRegRqst ; /* 24h: Registration Request */
|
||||
unsigned short rxRegRqst ; /* 26h: Registration Request */
|
||||
unsigned short txRegConf ; /* 28h: Registration Confirm.*/
|
||||
unsigned short rxRegConf ; /* 2Ah: Registration Confirm.*/
|
||||
unsigned short txInterrupt ; /* 2Ch: Interrupt */
|
||||
unsigned short rxInterrupt ; /* 2Eh: Interrupt */
|
||||
unsigned short txIntrConf ; /* 30h: Interrupt Confirm. */
|
||||
unsigned short rxIntrConf ; /* 32h: Interrupt Confirm. */
|
||||
unsigned short txData ; /* 34h: Data */
|
||||
unsigned short rxData ; /* 36h: Data */
|
||||
unsigned short txRR ; /* 38h: RR */
|
||||
unsigned short rxRR ; /* 3Ah: RR */
|
||||
unsigned short txRNR ; /* 3Ch: RNR */
|
||||
unsigned short rxRNR ; /* 3Eh: RNR */
|
||||
} TX25Stats;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X25_READ_HISTORY_TABLE Command.
|
||||
*/
|
||||
typedef struct X25EventLog
|
||||
{
|
||||
unsigned char type ; /* 00h: transaction type */
|
||||
unsigned short lcn ; /* 01h: logical channel num */
|
||||
unsigned char packet ; /* 03h: async packet type */
|
||||
unsigned char cause ; /* 04h: X.25 cause field */
|
||||
unsigned char diag ; /* 05h: X.25 diag field */
|
||||
TX25TimeStamp ts ; /* 06h: time stamp */
|
||||
} TX25EventLog;
|
||||
|
||||
/*
|
||||
* Defines for the 'type' field.
|
||||
*/
|
||||
#define X25LOG_INCOMMING 0x00
|
||||
#define X25LOG_APPLICATION 0x01
|
||||
#define X25LOG_AUTOMATIC 0x02
|
||||
#define X25LOG_ERROR 0x04
|
||||
#define X25LOG_TIMEOUT 0x08
|
||||
#define X25LOG_RECOVERY 0x10
|
||||
|
||||
/*
|
||||
* Defines for the 'packet' field.
|
||||
*/
|
||||
#define X25LOG_CALL_RQST 0x0B
|
||||
#define X25LOG_CALL_ACCEPTED 0x0F
|
||||
#define X25LOG_CLEAR_RQST 0x13
|
||||
#define X25LOG_CLEAR_CONFRM 0x17
|
||||
#define X25LOG_RESET_RQST 0x1B
|
||||
#define X25LOG_RESET_CONFRM 0x1F
|
||||
#define X25LOG_RESTART_RQST 0xFB
|
||||
#define X25LOG_RESTART_COMFRM 0xFF
|
||||
#define X25LOG_DIAGNOSTIC 0xF1
|
||||
#define X25LOG_DTE_REG_RQST 0xF3
|
||||
#define X25LOG_DTE_REG_COMFRM 0xF7
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_TRACE_CONFIGURE Command.
|
||||
*/
|
||||
typedef struct X25TraceCfg
|
||||
{
|
||||
unsigned char flags ; /* 00h: trace configuration flags */
|
||||
unsigned char timeout ; /* 01h: timeout for trace delay mode*/
|
||||
} TX25TraceCfg;
|
||||
|
||||
/*
|
||||
* Defines for the 'flags' field.
|
||||
*/
|
||||
#define X25_TRC_ENABLE 0x01 /* bit0: '1' - trace enabled */
|
||||
#define X25_TRC_TIMESTAMP 0x02 /* bit1: '1' - time stamping enabled*/
|
||||
#define X25_TRC_DELAY 0x04 /* bit2: '1' - trace delay enabled */
|
||||
#define X25_TRC_DATA 0x08 /* bit3: '1' - trace data packets */
|
||||
#define X25_TRC_SUPERVISORY 0x10 /* bit4: '1' - trace suprvisory pkts*/
|
||||
#define X25_TRC_ASYNCHRONOUS 0x20 /* bit5: '1' - trace asynch. packets*/
|
||||
#define X25_TRC_HDLC 0x40 /* bit6: '1' - trace all packets */
|
||||
#define X25_TRC_READ 0x80 /* bit7: '1' - get current config. */
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_READ_TRACE_DATA Command.
|
||||
*/
|
||||
typedef struct X25Trace /*----- Trace data structure -------*/
|
||||
{
|
||||
unsigned short length ; /* 00h: trace data length */
|
||||
unsigned char type ; /* 02h: trace type */
|
||||
unsigned char lost_cnt ; /* 03h: N of traces lost */
|
||||
TX25TimeStamp tstamp ; /* 04h: mon/date/sec/min/hour */
|
||||
unsigned short millisec ; /* 09h: ms time stamp */
|
||||
unsigned char data[0] ; /* 0Bh: traced frame */
|
||||
} TX25Trace;
|
||||
|
||||
/*
|
||||
* Defines for the 'type' field.
|
||||
*/
|
||||
#define X25_TRC_TYPE_MASK 0x0F /* bits 0..3: trace type */
|
||||
#define X25_TRC_TYPE_RX_FRAME 0x00 /* received frame trace */
|
||||
#define X25_TRC_TYPE_TX_FRAME 0x01 /* transmitted frame */
|
||||
#define X25_TRC_TYPE_ERR_FRAME 0x02 /* error frame */
|
||||
|
||||
#define X25_TRC_ERROR_MASK 0xF0 /* bits 4..7: error code */
|
||||
#define X25_TRCERR_RX_ABORT 0x10 /* receive abort error */
|
||||
#define X25_TRCERR_RX_BADCRC 0x20 /* receive CRC error */
|
||||
#define X25_TRCERR_RX_OVERRUN 0x30 /* receiver overrun error */
|
||||
#define X25_TRCERR_RX_TOO_LONG 0x40 /* excessive frame length error */
|
||||
#define X25_TRCERR_TX_ABORT 0x70 /* aborted frame transmittion error */
|
||||
#define X25_TRCERR_TX_UNDERRUN 0x80 /* transmit underrun error */
|
||||
|
||||
/*****************************************************************************
|
||||
* Following definitions describe HDLC frame and X.25 packet formats.
|
||||
****************************************************************************/
|
||||
|
||||
typedef struct HDLCFrame /*----- DHLC Frame Format ----------*/
|
||||
{
|
||||
unsigned char addr ; /* address field */
|
||||
unsigned char cntl ; /* control field */
|
||||
unsigned char data[0] ;
|
||||
} THDLCFrame;
|
||||
|
||||
typedef struct X25Pkt /*----- X.25 Paket Format ----------*/
|
||||
{
|
||||
unsigned char lcn_hi ; /* 4 MSB of Logical Channel Number */
|
||||
unsigned char lcn_lo ; /* 8 LSB of Logical Channel Number */
|
||||
unsigned char type ;
|
||||
unsigned char data[0] ;
|
||||
} TX25Pkt;
|
||||
|
||||
/*
|
||||
* Defines for the 'lcn_hi' field.
|
||||
*/
|
||||
#define X25_Q_BIT_MASK 0x80 /* Data Qualifier Bit mask */
|
||||
#define X25_D_BIT_MASK 0x40 /* Delivery Confirmation Bit mask */
|
||||
#define X25_M_BITS_MASK 0x30 /* Modulo Bits mask */
|
||||
#define X25_LCN_MSB_MASK 0x0F /* LCN most significant bits mask */
|
||||
|
||||
/*
|
||||
* Defines for the 'type' field.
|
||||
*/
|
||||
#define X25PKT_DATA 0x01 /* Data packet mask */
|
||||
#define X25PKT_SUPERVISORY 0x02 /* Supervisory packet mask */
|
||||
#define X25PKT_CALL_RQST 0x0B /* Call Request/Incoming */
|
||||
#define X25PKT_CALL_ACCEPTED 0x0F /* Call Accepted/Connected */
|
||||
#define X25PKT_CLEAR_RQST 0x13 /* Clear Request/Indication */
|
||||
#define X25PKT_CLEAR_CONFRM 0x17 /* Clear Confirmation */
|
||||
#define X25PKT_RESET_RQST 0x1B /* Reset Request/Indication */
|
||||
#define X25PKT_RESET_CONFRM 0x1F /* Reset Confirmation */
|
||||
#define X25PKT_RESTART_RQST 0xFB /* Restart Request/Indication */
|
||||
#define X25PKT_RESTART_CONFRM 0xFF /* Restart Confirmation */
|
||||
#define X25PKT_INTERRUPT 0x23 /* Interrupt */
|
||||
#define X25PKT_INTERRUPT_CONFRM 0x27 /* Interrupt Confirmation */
|
||||
#define X25PKT_DIAGNOSTIC 0xF1 /* Diagnostic */
|
||||
#define X25PKT_REGISTR_RQST 0xF3 /* Registration Request */
|
||||
#define X25PKT_REGISTR_CONFRM 0xF7 /* Registration Confirmation */
|
||||
#define X25PKT_RR_MASKED 0x01 /* Receive Ready packet after masking */
|
||||
#define X25PKT_RNR_MASKED 0x05 /* Receive Not Ready after masking */
|
||||
|
||||
|
||||
typedef struct {
|
||||
TX25Cmd cmd ;
|
||||
char data[X25_MAX_DATA] ;
|
||||
} mbox_cmd_t;
|
||||
|
||||
|
||||
#if 0
|
||||
typedef struct {
|
||||
unsigned char qdm ; /* Q/D/M bits */
|
||||
unsigned char cause ; /* cause field */
|
||||
unsigned char diagn ; /* diagnostics */
|
||||
unsigned char pktType ;
|
||||
unsigned short length ;
|
||||
unsigned char result ;
|
||||
unsigned short lcn ;
|
||||
char reserved[7] ;
|
||||
}x25api_hdr_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
x25api_hdr_t hdr ;
|
||||
char data[X25_MAX_DATA] ;
|
||||
}x25api_t;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* XPIPEMON Definitions
|
||||
*/
|
||||
|
||||
/* valid ip_protocol for UDP management */
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
#define UDPMGMT_XPIPE_SIGNATURE "XLINK8ND"
|
||||
#define UDPMGMT_DRVRSTATS_SIGNATURE "DRVSTATS"
|
||||
|
||||
/* values for request/reply byte */
|
||||
#define UDPMGMT_REQUEST 0x01
|
||||
#define UDPMGMT_REPLY 0x02
|
||||
#define UDP_OFFSET 12
|
||||
|
||||
#if 0
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* the opp flag */
|
||||
unsigned char command ; /* command code */
|
||||
unsigned short length ; /* transfer data length */
|
||||
unsigned char result ; /* return code */
|
||||
unsigned char pf ; /* P/F bit */
|
||||
unsigned short lcn ; /* logical channel */
|
||||
unsigned char qdm ; /* Q/D/M bits */
|
||||
unsigned char cause ; /* cause field */
|
||||
unsigned char diagn ; /* diagnostics */
|
||||
unsigned char pktType ; /* packet type */
|
||||
unsigned char resrv[4] ; /* reserved */
|
||||
} cblock_t;
|
||||
|
||||
typedef struct {
|
||||
ip_pkt_t ip_pkt ;
|
||||
udp_pkt_t udp_pkt ;
|
||||
wp_mgmt_t wp_mgmt ;
|
||||
cblock_t cblock ;
|
||||
unsigned char data[4080] ;
|
||||
} x25_udp_pkt_t;
|
||||
#endif
|
||||
|
||||
typedef struct read_hdlc_stat {
|
||||
unsigned short inf_frames_rx_ok ;
|
||||
unsigned short inf_frames_rx_out_of_seq ;
|
||||
unsigned short inf_frames_rx_no_data ;
|
||||
unsigned short inf_frames_rx_dropped ;
|
||||
unsigned short inf_frames_rx_data_too_long ;
|
||||
unsigned short inf_frames_rx_invalid_addr ;
|
||||
unsigned short inf_frames_tx_ok ;
|
||||
unsigned short inf_frames_tx_retransmit ;
|
||||
unsigned short T1_timeouts ;
|
||||
unsigned short SABM_frames_rx ;
|
||||
unsigned short DISC_frames_rx ;
|
||||
unsigned short DM_frames_rx ;
|
||||
unsigned short FRMR_frames_rx ;
|
||||
unsigned short SABM_frames_tx ;
|
||||
unsigned short DISC_frames_tx ;
|
||||
unsigned short DM_frames_tx ;
|
||||
unsigned short FRMR_frames_tx ;
|
||||
} read_hdlc_stat_t;
|
||||
|
||||
typedef struct read_comms_err_stats{
|
||||
unsigned char overrun_err_rx ;
|
||||
unsigned char CRC_err ;
|
||||
unsigned char abort_frames_rx ;
|
||||
unsigned char frames_dropped_buf_full ;
|
||||
unsigned char abort_frames_tx ;
|
||||
unsigned char transmit_underruns ;
|
||||
unsigned char missed_tx_underruns_intr ;
|
||||
unsigned char reserved ;
|
||||
unsigned char DCD_drop ;
|
||||
unsigned char CTS_drop ;
|
||||
} read_comms_err_stats_t;
|
||||
|
||||
typedef struct trace_data {
|
||||
unsigned short length ;
|
||||
unsigned char type ;
|
||||
unsigned char trace_dropped ;
|
||||
unsigned char reserved[5] ;
|
||||
unsigned short timestamp ;
|
||||
unsigned char data ;
|
||||
} trace_data_t;
|
||||
|
||||
enum {UDP_XPIPE_TYPE};
|
||||
|
||||
#define XPIPE_ENABLE_TRACING 0x14
|
||||
#define XPIPE_DISABLE_TRACING 0x14
|
||||
#define XPIPE_GET_TRACE_INFO 0x16
|
||||
#define XPIPE_FT1_READ_STATUS 0x74
|
||||
#define XPIPE_DRIVER_STAT_IFSEND 0x75
|
||||
#define XPIPE_DRIVER_STAT_INTR 0x76
|
||||
#define XPIPE_DRIVER_STAT_GEN 0x77
|
||||
#define XPIPE_FLUSH_DRIVER_STATS 0x78
|
||||
#define XPIPE_ROUTER_UP_TIME 0x79
|
||||
#define XPIPE_SET_FT1_MODE 0x81
|
||||
#define XPIPE_FT1_STATUS_CTRL 0x80
|
||||
|
||||
|
||||
/* error messages */
|
||||
#define NO_BUFFS_OR_CLOSED_WIN 0x33
|
||||
#define DATA_LENGTH_TOO_BIG 0x32
|
||||
#define NO_DATA_AVAILABLE 0x33
|
||||
#define Z80_TIMEOUT_ERROR 0x0a
|
||||
#define NO_BUFFS 0x08
|
||||
|
||||
|
||||
/* Trace options */
|
||||
#define TRACE_DEFAULT 0x03
|
||||
#define TRACE_SUPERVISOR_FRMS 0x10
|
||||
#define TRACE_ASYNC_FRMS 0x20
|
||||
#define TRACE_ALL_HDLC_FRMS 0x40
|
||||
#define TRACE_DATA_FRMS 0x08
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* _SDLA_X25_H */
|
|
@ -0,0 +1,138 @@
|
|||
/*
|
||||
* Copyright (c) 2002
|
||||
* Alex Feldman <al.feldman@sangoma.com>. All rights reserved.
|
||||
*
|
||||
* $Id: sdla_adsl.h,v 1.10 2008-02-04 18:03:54 sangoma Exp $
|
||||
*/
|
||||
|
||||
/*************************************************************************
|
||||
* sdla_adsl.h WANPIPE(tm)
|
||||
*
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com>
|
||||
*
|
||||
*
|
||||
* ========================================================================
|
||||
* Jun 17, 2002 Alex Feldman Initial version.
|
||||
* ========================================================================
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __SDLA_ADSL_H
|
||||
# define __SDLA_ADSL_H
|
||||
|
||||
|
||||
#include "sdla_adsl_iface.h"
|
||||
|
||||
#define ADSL_TEST_DRIVER_RESPONSE 0x01
|
||||
#define ADSL_READ_DRIVER_VERSION 0x02
|
||||
#define ADSL_ROUTER_UP_TIME 0x03
|
||||
|
||||
#define ADSL_ENABLE_TRACING 0x06
|
||||
#define ADSL_DISABLE_TRACING 0x07
|
||||
#define ADSL_GET_TRACE_INFO 0x08
|
||||
|
||||
#define MAX_TRACE_TIMEOUT (HZ*10)
|
||||
|
||||
|
||||
typedef struct adsl_cfg {
|
||||
unsigned char adsl_framing;
|
||||
unsigned char adsl_trellis;
|
||||
unsigned char adsl_as0;
|
||||
unsigned char adsl_as0_latency;
|
||||
unsigned char adsl_as1;
|
||||
unsigned char adsl_as1_latency;
|
||||
unsigned char adsl_ls0;
|
||||
unsigned char adsl_ls0_latency;
|
||||
unsigned char adsl_ls1;
|
||||
unsigned char adsl_ls1_latency;
|
||||
unsigned char adsl_redundant_bytes;
|
||||
unsigned char adsl_interleave_s_up;
|
||||
unsigned char adsl_interleave_d_up;
|
||||
unsigned char adsl_interleave_r_up;
|
||||
unsigned char adsl_fast_r_up;
|
||||
unsigned char adsl_interleave_s_down;
|
||||
unsigned char adsl_interleave_d_down;
|
||||
unsigned char adsl_interleave_r_down;
|
||||
unsigned char adsl_selected_standard;
|
||||
} adsl_cfg_t;
|
||||
|
||||
#if !defined(__WINDOWS__)
|
||||
#undef wan_udphdr_data
|
||||
#define wan_udphdr_data wan_udphdr_adsl_data
|
||||
#undef wan_udp_data
|
||||
#define wan_udp_data wan_udp_hdr.wan_udphdr_adsl_data
|
||||
#endif
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
typedef struct adsl_private_area
|
||||
{
|
||||
wanpipe_common_t common;/* MUST be at the top */
|
||||
void* pAdapter;
|
||||
char if_name[WAN_IFNAME_SZ];
|
||||
u_char macAddr[6];
|
||||
atomic_t udp_pkt_len;
|
||||
unsigned char udp_pkt_data[sizeof(wan_udp_pkt_t)];
|
||||
unsigned char udp_pkt_src;
|
||||
unsigned char remote_eth_addr[6];
|
||||
wan_time_t router_start_time; /*unsigned long router_start_time;*/
|
||||
wan_time_t router_up_time; /*unsigned long router_up_time;*/
|
||||
unsigned long trace_timeout;
|
||||
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__)
|
||||
struct ifmedia media; /* media information */
|
||||
#endif
|
||||
#if defined(__WINDOWS__)
|
||||
void *card;
|
||||
struct net_device_stats if_stats;
|
||||
wan_trace_t trace_info;
|
||||
#endif
|
||||
} adsl_private_area_t;
|
||||
|
||||
|
||||
typedef struct adsl_trace_info
|
||||
{
|
||||
unsigned long tracing_enabled;
|
||||
wan_skb_queue_t trace_queue;
|
||||
unsigned long trace_timeout;
|
||||
unsigned int max_trace_queue;
|
||||
} adsl_trace_info_t;
|
||||
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
/*extern void* adsl_create(void* dsl_cfg, void* card, void* virt_addr, char* devname);
|
||||
extern void* adsl_new_if(void*, u_char*, void*);
|
||||
extern int adsl_del_if(void*);
|
||||
extern int adsl_can_tx(void*);
|
||||
extern int adsl_send(void*, void* tx_skb,unsigned int);
|
||||
extern void adsl_timeout(void*);
|
||||
extern void adsl_isr(void*);
|
||||
extern void adsl_udp_cmd(void*, unsigned char, unsigned char*, unsigned short*);
|
||||
extern void adsl_disable_comm(void*);
|
||||
*/
|
||||
extern void adsl_lan_multicast(void*, short,char*,int);
|
||||
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__)
|
||||
extern void adsl_atm_tasklet(void*, int);
|
||||
#else
|
||||
extern void adsl_atm_tasklet(unsigned long);
|
||||
#endif
|
||||
/*
|
||||
extern void adsl_task_schedule(void*);
|
||||
extern void adsl_task_kill(void*);
|
||||
extern void adsl_lan_rx(void*,void*,u_int32_t,unsigned char*, int);
|
||||
extern int adsl_tracing_enabled(void*);
|
||||
extern void adsl_tx_complete(void*, int, int);
|
||||
extern void adsl_rx_complete(void*);
|
||||
extern int GpWanWriteRoom(void *pChan_ptr);
|
||||
extern int GpWanOpen(void *pAdapter_ptr, unsigned char line, void *tty, void **data);
|
||||
extern void GpWanClose(void *pAdapter_ptr, void *pChan_ptr);
|
||||
extern int GpWanTx(void *pChan_ptr, int fromUser, const unsigned char *buffer, int bufferLen);
|
||||
|
||||
extern void* adsl_get_trace_ptr(void *pAdapter_ptr);
|
||||
extern int adsl_wan_interface_type(void *);
|
||||
*/
|
||||
extern int adsl_queue_trace(void*, void*);
|
||||
|
||||
#endif /* __SDLA_ADSL_H_ */
|
||||
|
|
@ -0,0 +1,99 @@
|
|||
#ifndef _ADSL_OS_ABSTR_H_
|
||||
#define _ADSL_OS_ABSTR_H_
|
||||
|
||||
/*
|
||||
** DEFINED/MACROS
|
||||
*/
|
||||
#ifdef __ADSL_IFACE
|
||||
# define EXTERN_ADSL extern
|
||||
# define EXTERN_WAN
|
||||
#else
|
||||
# define EXTERN_ADSL
|
||||
# define EXTERN_WAN extern
|
||||
#endif
|
||||
|
||||
#define TRC_INCOMING_FRM 0x00
|
||||
#define TRC_OUTGOING_FRM 0x01
|
||||
|
||||
#define ADSL_BAUD_RATE 0x04
|
||||
#define ADSL_ATM_CONF 0x05
|
||||
#define ADSL_OP_STATE 0x09
|
||||
#define ADSL_COUNTERS 0x0A
|
||||
#define ADSL_LAST_FAILED_STATUS 0x0B
|
||||
#define ADSL_LCL_SNR_MARGIN 0x0C
|
||||
#define ADSL_UPSTREAM_MARGIN_STATUS 0x0D
|
||||
#define ADSL_FAILURES 0x0E
|
||||
#define ADSL_ATTENUATION_STATUS 0x0F
|
||||
#define ADSL_RMT_VENDOR_ID_STATUS 0x10
|
||||
#define ADSL_GET_MODULATION 0x11
|
||||
#define ADSL_START_PROGRESS 0x12
|
||||
#define ADSL_LCL_XMIT_POWER_STATUS 0x13
|
||||
#define ADSL_RMT_TX_POWER_STATUS 0x14
|
||||
#define ADSL_ACTUAL_CONFIGURATION 0x15
|
||||
#define ADSL_ACTUAL_INTERLEAVE_STATUS 0x16
|
||||
#define ADSL_ATM_CELL_COUNTER 0x17
|
||||
#define ADSL_EEPROM_WRITE 0x18
|
||||
#define ADSL_EEPROM_READ 0x19
|
||||
|
||||
|
||||
typedef struct adsl_failures
|
||||
{
|
||||
unsigned long CrcErrorsPerMin;
|
||||
unsigned long ExcessiveConsecutiveCrcErrorsPerTickCount;
|
||||
unsigned long ExcessiveConsecutiveCrcErrorsPerMinCount;
|
||||
unsigned long ExcessiveConsecutiveOverallFailureCount;
|
||||
}adsl_failures_t;
|
||||
|
||||
/*
|
||||
** FUNCTION PROTOTYPES
|
||||
*/
|
||||
|
||||
EXTERN_WAN int adsl_can_tx(void*);
|
||||
EXTERN_WAN int adsl_send(void* adapter_id, void* tx_skb, unsigned int Flag);
|
||||
EXTERN_ADSL void adsl_lan_rx(void*,void*,unsigned long,unsigned char*, int);
|
||||
|
||||
EXTERN_ADSL void adsl_tx_complete(void*, int, int);
|
||||
EXTERN_WAN void adsl_rx_complete(void*);
|
||||
|
||||
EXTERN_ADSL void adsl_tty_receive(void *, unsigned char *,
|
||||
unsigned char *,unsigned int);
|
||||
|
||||
EXTERN_ADSL void adsl_wan_soft_intr(void *, unsigned int, unsigned long*);
|
||||
EXTERN_ADSL void* adsl_ttydriver_alloc(void);
|
||||
EXTERN_ADSL void adsl_ttydriver_free(void*);
|
||||
EXTERN_ADSL void* adsl_termios_alloc(void);
|
||||
|
||||
EXTERN_ADSL int adsl_wan_register(void *,
|
||||
char *,
|
||||
unsigned char);
|
||||
|
||||
EXTERN_ADSL void adsl_wan_unregister(unsigned char);
|
||||
|
||||
|
||||
EXTERN_ADSL int adsl_tracing_enabled(void*);
|
||||
EXTERN_ADSL int adsl_trace_enqueue(void*, void*);
|
||||
EXTERN_ADSL int adsl_trace_purge(void*);
|
||||
EXTERN_ADSL void* adsl_trace_info_alloc(void);
|
||||
EXTERN_ADSL void adsl_trace_info_init(void *trace_ptr);
|
||||
|
||||
|
||||
EXTERN_WAN void* adsl_create(void*, void*, char*);
|
||||
EXTERN_WAN void* adsl_new_if(void*, unsigned char*, void*);
|
||||
EXTERN_WAN int adsl_wan_init(void*);
|
||||
EXTERN_WAN int adsl_del_if(void*);
|
||||
EXTERN_WAN void adsl_timeout(void*);
|
||||
EXTERN_WAN void adsl_disable_comm(void*);
|
||||
EXTERN_WAN int adsl_isr(void*);
|
||||
EXTERN_WAN void adsl_udp_cmd(void*, unsigned char, unsigned char*, unsigned short*);
|
||||
EXTERN_WAN void* adsl_get_trace_ptr(void *pAdapter_ptr);
|
||||
EXTERN_WAN int adsl_wan_interface_type(void *);
|
||||
|
||||
EXTERN_WAN int GpWanOpen(void *pAdapter_ptr, unsigned char line, void *tty, void **data);
|
||||
EXTERN_WAN int GpWanClose(void *pAdapter_ptr, void *pChan_ptr);
|
||||
EXTERN_WAN int GpWanTx(void *pChan_ptr, int fromUser, const unsigned char *buffer, int bufferLen);
|
||||
EXTERN_WAN int GpWanWriteRoom(void *pChan_ptr);
|
||||
|
||||
EXTERN_ADSL int adsl_detect_prot_header(unsigned char*,int,char*);
|
||||
EXTERN_ADSL void adsl_tty_hangup(void*);
|
||||
|
||||
#endif
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,230 @@
|
|||
/*****************************************************************************
|
||||
* sdla_asy.h Header file for the Sangoma S508/S514 asynchronous code API
|
||||
*
|
||||
* Author: Gideon Hack
|
||||
*
|
||||
* Copyright: (c) 2000 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
*
|
||||
* Jan 28, 2000 Gideon Hack Initial Version
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
#ifndef _WANPIPE_ASYNC_H
|
||||
#define _WANPIPE_ASYNC_H
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define SET_ASY_CONFIGURATION 0xE2 /* set the asychronous operational configuration */
|
||||
#define READ_ASY_CONFIGURATION 0xE3 /* read the current asychronous operational configuration */
|
||||
#define ENABLE_ASY_COMMUNICATIONS 0xE4 /* enable asychronous communications */
|
||||
#define DISABLE_ASY_COMMUNICATIONS 0xE5 /* disable asychronous communications */
|
||||
#define READ_ASY_OPERATIONAL_STATS 0xE7 /* retrieve the asychronous operational statistics */
|
||||
#define FLUSH_ASY_OPERATIONAL_STATS 0xE8 /* flush the asychronous operational statistics */
|
||||
#define TRANSMIT_ASY_BREAK_SIGNAL 0xEC /* transmit an asychronous break signal */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Return codes from interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define COMMAND_INVALID_FOR_PORT 0x50 /* the command is invalid for the selected port */
|
||||
#define DISABLE_ASY_COMMS_BEFORE_CFG 0xE1 /* communications must be disabled before setting the configuration */
|
||||
#define ASY_COMMS_ENABLED 0xE1 /* communications are currently enabled */
|
||||
#define ASY_COMMS_DISABLED 0xE1 /* communications are currently disabled */
|
||||
#define ASY_CFG_BEFORE_COMMS_ENABLED 0xE2 /* perform a SET_ASY_CONFIGURATION before enabling comms */
|
||||
#define LGTH_ASY_CFG_DATA_INVALID 0xE2 /* the length of the passed configuration data is invalid */
|
||||
#define INVALID_ASY_CFG_DATA 0xE3 /* the passed configuration data is invalid */
|
||||
#define ASY_BREAK_SIGNAL_BUSY 0xEC /* a break signal is being transmitted */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_ASY_CONFIGURATION/READ_ASY_CONFIGURATION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the asynchronous configuration structure */
|
||||
typedef struct {
|
||||
unsigned long baud_rate ; /* the baud rate */
|
||||
unsigned short line_config_options ; /* line configuration options */
|
||||
unsigned short modem_config_options ; /* modem configuration options */
|
||||
unsigned short asy_API_options ; /* asynchronous API options */
|
||||
unsigned short asy_protocol_options ; /* asynchronous protocol options */
|
||||
unsigned short Tx_bits_per_char ; /* number of bits per tx character */
|
||||
unsigned short Rx_bits_per_char ; /* number of bits per received character */
|
||||
unsigned short stop_bits ; /* number of stop bits per character */
|
||||
unsigned short parity ; /* parity definition */
|
||||
unsigned short break_timer ; /* the break signal timer */
|
||||
unsigned short asy_Rx_inter_char_timer ; /* the receive inter-character timer */
|
||||
unsigned short asy_Rx_complete_length ; /* the receive 'buffer complete' length */
|
||||
unsigned short XON_char ; /* the XON character */
|
||||
unsigned short XOFF_char ; /* the XOFF character */
|
||||
unsigned short asy_statistics_options ; /* async operational stat options */
|
||||
unsigned long ptr_shared_mem_info_struct ;/* ptr to the shared memory area information structure */
|
||||
unsigned long ptr_asy_Tx_stat_el_cfg_struct ;/* ptr to the transmit status element configuration structure */
|
||||
unsigned long ptr_asy_Rx_stat_el_cfg_struct ;/* ptr to the receive status element configuration structure */
|
||||
} ASY_CONFIGURATION_STRUCT;
|
||||
|
||||
/* permitted minimum and maximum values for setting the asynchronous configuration */
|
||||
#define MIN_ASY_BAUD_RATE 50 /* maximum baud rate */
|
||||
#define MAX_ASY_BAUD_RATE 250000 /* minimum baud rate */
|
||||
#define MIN_ASY_BITS_PER_CHAR 5 /* minimum number of bits per character */
|
||||
#define MAX_ASY_BITS_PER_CHAR 8 /* maximum number of bits per character */
|
||||
#define MIN_BREAK_TMR_VAL 0 /* minimum break signal timer */
|
||||
#define MAX_BREAK_TMR_VAL 5000 /* maximum break signal timer */
|
||||
#define MIN_ASY_RX_INTER_CHAR_TMR 0 /* minimum receive inter-character timer */
|
||||
#define MAX_ASY_RX_INTER_CHAR_TMR 30000 /* maximum receive inter-character timer */
|
||||
#define MIN_ASY_RX_CPLT_LENGTH 0 /* minimum receive 'length complete' value */
|
||||
#define MAX_ASY_RX_CPLT_LENGTH 2000 /* maximum receive 'length complete' value */
|
||||
|
||||
/* bit settings for the 'asy_API_options' */
|
||||
#define ASY_RX_DATA_TRANSPARENT 0x0001 /* do not strip parity and unused bits from received characters */
|
||||
|
||||
/* bit settings for the 'asy_protocol_options' */
|
||||
#define ASY_RTS_HS_FOR_RX 0x0001 /* RTS handshaking is used for reception control */
|
||||
#define ASY_XON_XOFF_HS_FOR_RX 0x0002 /* XON/XOFF handshaking is used for reception control */
|
||||
#define ASY_XON_XOFF_HS_FOR_TX 0x0004 /* XON/XOFF handshaking is used for transmission control */
|
||||
#define ASY_DCD_HS_FOR_TX 0x0008 /* DCD handshaking is used for transmission control */
|
||||
#define ASY_CTS_HS_FOR_TX 0x0020 /* CTS handshaking is used for transmission control */
|
||||
|
||||
/* bit settings for the 'stop_bits' definition */
|
||||
#define ONE_STOP_BIT 1 /* representation for 1 stop bit */
|
||||
#define TWO_STOP_BITS 2 /* representation for 2 stop bits */
|
||||
#define ONE_AND_A_HALF_STOP_BITS 3 /* representation for 1.5 stop bits */
|
||||
|
||||
/* bit settings for the 'parity' definition */
|
||||
#define NO_PARITY 0 /* representation for no parity */
|
||||
#define ODD_PARITY 1 /* representation for odd parity */
|
||||
#define EVEN_PARITY 2 /* representation for even parity */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_COMMS_ERROR_STATS command (asynchronous mode)
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the communications error statistics structure */
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count ; /* receiver overrun error count */
|
||||
unsigned short Rx_parity_err_count ; /* parity errors received count */
|
||||
unsigned short Rx_framing_err_count ; /* framing errors received count */
|
||||
unsigned short comms_err_stat_reserved_1 ;/* reserved for later use */
|
||||
unsigned short comms_err_stat_reserved_2 ;/* reserved for later use */
|
||||
unsigned short comms_err_stat_reserved_3 ;/* reserved for later use */
|
||||
unsigned short comms_err_stat_reserved_4 ;/* reserved for later use */
|
||||
unsigned short comms_err_stat_reserved_5 ;/* reserved for later use */
|
||||
unsigned short DCD_state_change_count ; /* DCD state change count */
|
||||
unsigned short CTS_state_change_count ; /* CTS state change count */
|
||||
} ASY_COMMS_ERROR_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_ASY_OPERATIONAL_STATS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the asynchronous operational statistics structure */
|
||||
typedef struct {
|
||||
|
||||
/* Data transmission statistics */
|
||||
unsigned long Data_blocks_Tx_count ;/* number of blocks transmitted */
|
||||
unsigned long Data_bytes_Tx_count ;/* number of bytes transmitted */
|
||||
unsigned long Data_Tx_throughput ;/* transmit throughput */
|
||||
unsigned long no_ms_for_Data_Tx_thruput_comp ;/* millisecond time used for the Tx throughput computation */
|
||||
unsigned long Tx_Data_discard_lgth_err_count ;/* number of Data blocks discarded (length error) */
|
||||
unsigned long reserved_Data_frm_Tx_stat1 ;/* reserved for later use */
|
||||
unsigned long reserved_Data_frm_Tx_stat2 ;/* reserved for later use */
|
||||
unsigned long reserved_Data_frm_Tx_stat3 ;/* reserved for later use */
|
||||
|
||||
/* Data reception statistics */
|
||||
unsigned long Data_blocks_Rx_count ;/* number of blocks received */
|
||||
unsigned long Data_bytes_Rx_count ;/* number of bytes received */
|
||||
unsigned long Data_Rx_throughput ;/* receive throughput */
|
||||
unsigned long no_ms_for_Data_Rx_thruput_comp ;/* millisecond time used for the Rx throughput computation */
|
||||
unsigned long Rx_Data_bytes_discard_count ;/* received Data bytes discarded */
|
||||
unsigned long reserved_Data_frm_Rx_stat1 ;/* reserved for later use */
|
||||
|
||||
/* handshaking protocol statistics */
|
||||
unsigned short XON_chars_Tx_count ; /* number of XON characters transmitted */
|
||||
unsigned short XOFF_chars_Tx_count ; /* number of XOFF characters transmitted */
|
||||
unsigned short XON_chars_Rx_count ; /* number of XON characters received */
|
||||
unsigned short XOFF_chars_Rx_count ; /* number of XOFF characters received */
|
||||
unsigned short Tx_halt_modem_low_count ; /* number of times Tx halted (modem line low) */
|
||||
unsigned short Rx_halt_RTS_low_count ; /* number of times Rx halted by setting RTS low */
|
||||
unsigned long reserved_handshaking_stat1 ;/* reserved for later use */
|
||||
|
||||
/* break statistics */
|
||||
unsigned short break_Tx_count ; /* number of break sequences transmitted */
|
||||
unsigned short break_Rx_count ; /* number of break sequences received */
|
||||
unsigned long reserved_break_stat1 ;/* reserved for later use */
|
||||
|
||||
/* miscellaneous statistics */
|
||||
unsigned long reserved_misc_stat1 ; /* reserved for later use */
|
||||
unsigned long reserved_misc_stat2 ; /* reserved for later use */
|
||||
|
||||
} ASY_OPERATIONAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for Data transmission
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the Data block transmit status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Tx_status_elements ; /* number of transmit status elements */
|
||||
unsigned long base_addr_Tx_status_elements ; /* base address of the transmit element list */
|
||||
unsigned long next_Tx_status_element_to_use ; /* pointer to the next transmit element to be used */
|
||||
} ASY_TX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
|
||||
/* the Data block transmit status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* opp flag */
|
||||
unsigned short data_length ; /* length of the block to be transmitted */
|
||||
unsigned char reserved_1 ; /* reserved for internal use */
|
||||
unsigned long reserved_2 ; /* reserved for internal use */
|
||||
unsigned long reserved_3 ; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr ; /* pointer to the data area */
|
||||
} ASY_DATA_TX_STATUS_EL_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for Data reception
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the Data block receive status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Rx_status_elements ;/* number of receive status elements */
|
||||
unsigned long base_addr_Rx_status_elements ;/* base address of the receive element list */
|
||||
unsigned long next_Rx_status_element_to_use ;/* pointer to the next receive element to be used */
|
||||
unsigned long base_addr_Rx_buffer ;/* base address of the receive data buffer */
|
||||
unsigned long end_addr_Rx_buffer ;/* end address of the receive data buffer */
|
||||
} ASY_RX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the Data block receive status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* opp flag */
|
||||
unsigned short data_length ; /* length of the received data block */
|
||||
unsigned char reserved_1 ; /* reserved for internal use */
|
||||
unsigned short time_stamp ; /* receive time stamp (HDLC_STREAMING_MODE) */
|
||||
unsigned short data_buffered ; /* the number of data bytes still buffered */
|
||||
unsigned long reserved_2 ; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr ; /* pointer to the data area */
|
||||
} ASY_DATA_RX_STATUS_EL_STRUCT;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
|
@ -0,0 +1,560 @@
|
|||
/*
|
||||
***********************************************************************************
|
||||
* *
|
||||
* ASYAPI.H - the 'C' header file for the Sangoma S508/S514 asynchronous code API. *
|
||||
* *
|
||||
***********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _SDLA_ASYHDLC_H_
|
||||
#define _SDLA_ASYHDLC_H_
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants defining the shared memory control block (mailbox)
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define PRI_BASE_ADDR_MB_STRUCT 0xE000 /* the base address of the mailbox structure (primary port) */
|
||||
#define SEC_BASE_ADDR_MB_STRUCT 0xE800 /* the base address of the mailbox structure (secondary port) */
|
||||
#define NUMBER_MB_RESERVED_BYTES 0x0B /* the number of reserved bytes in the mailbox header area */
|
||||
#define SIZEOF_MB_DATA_BFR 2032 /* the size of the actual mailbox data area */
|
||||
|
||||
/* the control block mailbox structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* the opp flag */
|
||||
unsigned char command; /* the user command */
|
||||
unsigned short buffer_length; /* the data length */
|
||||
unsigned char return_code; /* the return code */
|
||||
char MB_reserved[NUMBER_MB_RESERVED_BYTES]; /* reserved for later use */
|
||||
char data[SIZEOF_MB_DATA_BFR]; /* the data area */
|
||||
} ASY_MAILBOX_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* interface commands */
|
||||
#define READ_GLOBAL_EXCEPTION_CONDITION 0x01 /* read a global exception condition from the adapter */
|
||||
#define SET_GLOBAL_CONFIGURATION 0x02 /* set the global operational configuration */
|
||||
#define READ_GLOBAL_CONFIGURATION 0x03 /* read the global configuration */
|
||||
#define READ_GLOBAL_STATISTICS 0x04 /* retrieve the global statistics */
|
||||
#define FLUSH_GLOBAL_STATISTICS 0x05 /* flush the global statistics */
|
||||
#define SET_MODEM_STATUS 0x06 /* set the status of DTR and/or RTS */
|
||||
#define READ_MODEM_STATUS 0x07 /* read the current status of CTS and DCD */
|
||||
#undef READ_COMMS_ERROR_STATS
|
||||
#define READ_COMMS_ERROR_STATS 0x08 /* read the communication error statistics */
|
||||
#undef FLUSH_COMMS_ERROR_STATS
|
||||
#define FLUSH_COMMS_ERROR_STATS 0x09 /* flush the communication error statistics */
|
||||
#define READ_ASY_CODE_VERSION 0x20 /* read the code version */
|
||||
#define SET_ASY_INTERRUPT_TRIGGERS 0x30 /* set the application interrupt triggers */
|
||||
#define READ_ASY_INTERRUPT_TRIGGERS 0x31 /* read the application interrupt trigger configuration */
|
||||
#define SET_ASY_CONFIGURATION 0xE2 /* set the asychronous operational configuration */
|
||||
#define READ_ASY_CONFIGURATION 0xE3 /* read the current asychronous operational configuration */
|
||||
#define ENABLE_ASY_COMMUNICATIONS 0xE4 /* enable asychronous communications */
|
||||
#define DISABLE_ASY_COMMUNICATIONS 0xE5 /* disable asychronous communications */
|
||||
#define READ_ASY_OPERATIONAL_STATS 0xE7 /* retrieve the asychronous operational statistics */
|
||||
#define FLUSH_ASY_OPERATIONAL_STATS 0xE8 /* flush the asychronous operational statistics */
|
||||
#define TRANSMIT_ASY_BREAK_SIGNAL 0xEC /* transmit an asychronous break signal */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Return codes from interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define OK 0x00 /* the interface command was successful */
|
||||
#define COMMAND_OK 0x00 /* the interface command was successful */
|
||||
|
||||
/* return codes from global interface commands */
|
||||
#define NO_GLOBAL_EXCEP_COND_TO_REPORT 0x01 /* there is no global exception condition to report */
|
||||
#define LGTH_GLOBAL_CFG_DATA_INVALID 0x01 /* the length of the passed global configuration data is invalid */
|
||||
#define IRQ_TIMEOUT_VALUE_INVALID 0x02 /* an invalid application IRQ timeout value was selected */
|
||||
#define ADAPTER_OPERATING_FREQ_INVALID 0x03 /* an invalid adapter operating frequency was selected */
|
||||
#define TRANSMIT_TIMEOUT_INVALID 0x04 /* the frame transmit timeout is invalid */
|
||||
|
||||
|
||||
/* return codes from command READ_GLOBAL_EXCEPTION_CONDITION */
|
||||
#define EXCEP_MODEM_STATUS_CHANGE 0x10 /* a modem status change occurred */
|
||||
#define EXCEP_APP_IRQ_TIMEOUT 0x12 /* an application IRQ timeout has occurred */
|
||||
#define EXCEP_ASY_BREAK_RECEIVED 0x17 /* a break sequence has been received (asynchronous mode only) */
|
||||
|
||||
/* return codes from interface commands */
|
||||
#define xxxCOMMS_DISABLED 0x21 /* communications are not currently enabled */
|
||||
#define xxxCOMMS_ENABLED 0x21 /* communications are currently enabled */
|
||||
#define LGTH_INT_TRIGGERS_DATA_INVALID 0x22 /* the length of the passed interrupt trigger data is invalid */
|
||||
#define INVALID_IRQ_SELECTED 0x23 /* an invalid IRQ was selected in the SET_ASY_INTERRUPT_TRIGGERS */
|
||||
#define IRQ_TMR_VALUE_INVALID 0x24 /* an invalid application IRQ timer value was selected */
|
||||
#define DISABLE_ASY_COMMS_BEFORE_CFG 0xE1 /* communications must be disabled before setting the configuration */
|
||||
#define ASY_COMMS_ENABLED 0xE1 /* communications are currently enabled */
|
||||
#define ASY_COMMS_DISABLED 0xE1 /* communications are currently disabled */
|
||||
#define ASY_CFG_BEFORE_COMMS_ENABLED 0xE2 /* perform a SET_ASY_CONFIGURATION before enabling comms */
|
||||
#define LGTH_ASY_CFG_DATA_INVALID 0xE2 /* the length of the passed configuration data is invalid */
|
||||
#define INVALID_ASY_CFG_DATA 0xE3 /* the passed configuration data is invalid */
|
||||
#define ASY_BREAK_SIGNAL_BUSY 0xEC /* a break signal is being transmitted */
|
||||
#define INVALID_COMMAND 0xFF /* the defined interface command is invalid */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_GLOBAL_EXCEPTION_CONDITION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global exception condition structure for handling a modem status change */
|
||||
typedef struct {
|
||||
unsigned char modem_status_change; /* the modem status change */
|
||||
} GLOBAL_EX_MODEM_STRUCT;
|
||||
|
||||
/* settings for the 'modem_status_change' */
|
||||
#define CHANGE_IN_DCD 0x04 /* a change in DCD occured */
|
||||
#define CHANGE_IN_CTS 0x10 /* a change in CTS occured */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_GLOBAL_CONFIGURATION/READ_GLOBAL_CONFIGURATION commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global configuration structure */
|
||||
typedef struct {
|
||||
unsigned short adapter_config_options; /* adapter configuration options */
|
||||
unsigned short app_IRQ_timeout; /* application IRQ timeout */
|
||||
unsigned long adapter_operating_frequency; /* adapter operating frequency */
|
||||
unsigned short frame_transmit_timeout; /* frame transmission timeout */
|
||||
} GLOBAL_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'adapter_config_options' */
|
||||
#define ADPTR_CFG_S514 0x0001 /* S514 adapter */
|
||||
|
||||
/* settings for the 'app_IRQ_timeout' */
|
||||
#define MAX_APP_IRQ_TIMEOUT_VALUE 5000 /* the maximum permitted IRQ timeout */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_GLOBAL_STATISTICS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global statistics structure */
|
||||
typedef struct {
|
||||
unsigned short app_IRQ_timeout_count; /* application IRQ timeout count */
|
||||
unsigned short FT1_INS_alarm_count; /* FT1 in-service/alarm condition count */
|
||||
} GLOBAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_MODEM_STATUS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the set modem status structure */
|
||||
typedef struct {
|
||||
unsigned char output_modem_status; /* the output modem status */
|
||||
} SET_MODEM_STATUS_STRUCT;
|
||||
|
||||
/* settings for the 'output_modem_status' */
|
||||
#define SET_DTR_HIGH 0x01 /* set DTR high */
|
||||
#define SET_RTS_HIGH 0x02 /* set RTS high */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_MODEM_STATUS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the read modem status structure */
|
||||
typedef struct {
|
||||
unsigned char input_modem_status; /* the input modem status */
|
||||
} READ_MODEM_STATUS_STRUCT;
|
||||
|
||||
/* settings for the 'input_modem_status' */
|
||||
#define DCD_HIGH 0x08 /* DCD is high */
|
||||
#define CTS_HIGH 0x20 /* CTS is high */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_COMMS_ERROR_STATS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the communications error statistics structure */
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count; /* receiver overrun error count */
|
||||
unsigned short Rx_parity_err_count; /* receiver parity error count */
|
||||
unsigned short Rx_framing_err_count; /* framing errors received count */
|
||||
unsigned short DCD_state_change_count; /* DCD state change count */
|
||||
unsigned short CTS_state_change_count; /* CTS state change count */
|
||||
} COMMS_ERROR_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for using application interrupts
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the structure used for the SET_ASY_INTERRUPT_TRIGGERS/READ_ASY_INTERRUPT_TRIGGERS command */
|
||||
typedef struct {
|
||||
unsigned char interrupt_triggers; /* interrupt trigger configuration */
|
||||
unsigned char IRQ; /* IRQ to be used */
|
||||
unsigned short interrupt_timer; /* interrupt timer */
|
||||
unsigned short misc_interrupt_bits; /* miscellaneous interrupt bits */
|
||||
} ASY_INT_TRIGGERS_STRUCT;
|
||||
|
||||
/* 'interrupt_triggers' bit settings */
|
||||
#define APP_INT_ON_RX 0x01 /* interrupt on reception */
|
||||
#define APP_INT_ON_RX_FRAME APP_INT_ON_RX
|
||||
#define APP_INT_ON_TX 0x02 /* interrupt when data may be transmitted */
|
||||
#define APP_INT_ON_COMMAND_COMPLETE 0x04 /* interrupt when an interface command is complete */
|
||||
#define APP_INT_ON_TIMER 0x08 /* interrupt on a defined millisecond timeout */
|
||||
#define APP_INT_ON_GLOBAL_EXCEP_COND 0x10 /* interrupt on a global exception condition */
|
||||
|
||||
/* 'interrupt_timer' limitation */
|
||||
#define MAX_INTERRUPT_TIMER_VALUE 60000 /* the maximum permitted timer interrupt value */
|
||||
|
||||
/* interrupt types indicated at 'interrupt_type' byte of the INTERRUPT_INFORMATION_STRUCT */
|
||||
#define NO_APP_INTS_PEND 0x00 /* no interrups are pending */
|
||||
#define RX_APP_INT_PEND 0x01 /* a receive interrupt is pending */
|
||||
#define TX_APP_INT_PEND 0x02 /* a transmit interrupt is pending */
|
||||
#define COMMAND_COMPLETE_APP_INT_PEND 0x04 /* a 'command complete' interrupt is pending */
|
||||
#define TIMER_APP_INT_PEND 0x08 /* a timer interrupt is pending */
|
||||
#define GLOBAL_EXCEP_COND_APP_INT_PEND 0x10 /* a global exception condition interrupt is pending */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_ASY_CONFIGURATION/READ_ASY_CONFIGURATION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the asynchronous configuration structure */
|
||||
typedef struct {
|
||||
unsigned long baud_rate; /* the baud rate */
|
||||
unsigned short line_config_options; /* line configuration options */
|
||||
unsigned short modem_config_options; /* modem configuration options */
|
||||
unsigned short API_options; /* asynchronous API options */
|
||||
unsigned short protocol_options; /* asynchronous protocol options */
|
||||
unsigned short Tx_bits_per_char; /* number of bits per transmitted character */
|
||||
unsigned short Rx_bits_per_char; /* number of bits per received character */
|
||||
unsigned short stop_bits; /* number of stop bits per character */
|
||||
unsigned short parity; /* parity definition */
|
||||
unsigned short break_timer; /* the break signal timer */
|
||||
unsigned short Rx_inter_char_timer; /* the receive inter-character timer */
|
||||
unsigned short Rx_complete_length; /* the receive 'buffer complete' length */
|
||||
unsigned short XON_char; /* the XON character */
|
||||
unsigned short XOFF_char; /* the XOFF character */
|
||||
unsigned short statistics_options; /* operational statistics options */
|
||||
unsigned long ptr_shared_mem_info_struct; /* a pointer to the shared memory area information structure */
|
||||
unsigned long ptr_asy_Tx_stat_el_cfg_struct; /* a pointer to the transmit status element configuration structure */
|
||||
unsigned long ptr_asy_Rx_stat_el_cfg_struct; /* a pointer to the receive status element configuration structure */
|
||||
} ASY_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'line_config_options' */
|
||||
#define INTERFACE_LEVEL_V35 0x0000 /* V.35 interface level */
|
||||
#define INTERFACE_LEVEL_RS232 0x0001 /* RS-232 interface level */
|
||||
|
||||
/* settings for the 'modem_config_options' */
|
||||
#define DONT_RAISE_DTR_RTS_ON_EN_COMMS 0x0001 /* don't automatically raise DTR and RTS when performing an */
|
||||
/* ENABLE_ASY_COMMUNICATIONS command */
|
||||
#define DONT_REPORT_CHG_IN_MODEM_STAT 0x0002 /* don't report changes in modem status to the application */
|
||||
|
||||
/* settings for the 'asy_statistics_options' */
|
||||
#define ASY_TX_THROUGHPUT_STAT 0x0004 /* compute the transmit throughput */
|
||||
#define ASY_RX_THROUGHPUT_STAT 0x0008 /* compute the receive throughput */
|
||||
|
||||
/* permitted minimum and maximum values for setting the asynchronous configuration */
|
||||
#define MIN_ASY_BAUD_RATE 50 /* maximum baud rate */
|
||||
#define MAX_ASY_BAUD_RATE 250000 /* minimum baud rate */
|
||||
#define MIN_ASY_BITS_PER_CHAR 5 /* minimum number of bits per character */
|
||||
#define MAX_ASY_BITS_PER_CHAR 8 /* maximum number of bits per character */
|
||||
#define MAX_BREAK_TMR_VAL 5000 /* maximum break signal timer */
|
||||
#define MAX_ASY_RX_INTER_CHAR_TMR 30000 /* maximum receive inter-character timer */
|
||||
#define MAX_ASY_RX_CPLT_LENGTH 2000 /* maximum receive 'length complete' value */
|
||||
|
||||
/* bit settings for the 'asy_API_options' */
|
||||
#define ASY_RX_DATA_TRANSPARENT 0x0001 /* do not strip parity and unused bits from received characters */
|
||||
|
||||
/* bit settings for the 'asy_protocol_options' */
|
||||
#define ASY_RTS_HS_FOR_RX 0x0001 /* RTS handshaking is used for reception control */
|
||||
#define ASY_XON_XOFF_HS_FOR_RX 0x0002 /* XON/XOFF handshaking is used for reception control */
|
||||
#define ASY_XON_XOFF_HS_FOR_TX 0x0004 /* XON/XOFF handshaking is used for transmission control */
|
||||
#define ASY_DCD_HS_FOR_TX 0x0008 /* DCD handshaking is used for transmission control */
|
||||
#define ASY_CTS_HS_FOR_TX 0x0020 /* CTS handshaking is used for transmission control */
|
||||
#define ASY_HDLC_FRAMING 0x0100 /* use HDLC framing */
|
||||
#define ASY_HDLC_PASS_RX_CRC_TO_APP 0x0200 /* pass received HDLC CRC bytes to the application */
|
||||
#define ASY_HDLC_PASS_RX_BAD_TO_APP 0x0400 /* pass received bad frames to the application */
|
||||
#define ASY_DIS_RX_WHEN_TX 0x1000 /* disable the receiver when transmitting */
|
||||
|
||||
/* bit settings for the 'stop_bits' definition */
|
||||
#define ONE_STOP_BIT 1 /* representation for 1 stop bit */
|
||||
#define TWO_STOP_BITS 2 /* representation for 2 stop bits */
|
||||
#define ONE_AND_A_HALF_STOP_BITS 3 /* representation for 1.5 stop bits */
|
||||
|
||||
/* bit settings for the 'parity' definition */
|
||||
#define NO_PARITY 0 /* representation for no parity */
|
||||
#define ODD_PARITY 1 /* representation for odd parity */
|
||||
#define EVEN_PARITY 2 /* representation for even parity */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_COMMS_ERROR_STATS command (asynchronous mode)
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the communications error statistics structure */
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count; /* receiver overrun error count */
|
||||
unsigned short Rx_parity_err_count; /* parity errors received count */
|
||||
unsigned short Rx_framing_err_count; /* framing errors received count */
|
||||
unsigned short DCD_state_change_count; /* DCD state change count */
|
||||
unsigned short CTS_state_change_count; /* CTS state change count */
|
||||
} ASY_COMMS_ERROR_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_ASY_OPERATIONAL_STATS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the asynchronous operational statistics structure */
|
||||
typedef struct {
|
||||
|
||||
/* transmission statistics */
|
||||
unsigned long blocks_Tx_count; /* number of blocks transmitted */
|
||||
unsigned long bytes_Tx_count; /* number of bytes transmitted */
|
||||
unsigned long Tx_throughput; /* transmit throughput */
|
||||
unsigned long no_ms_for_Tx_thruput_comp; /* millisecond time used for the Tx throughput computation */
|
||||
unsigned long Tx_block_discard_lgth_err_count;/* number of blocks discarded (length error) */
|
||||
|
||||
/* reception statistics */
|
||||
unsigned long blocks_Rx_count; /* number of blocks received */
|
||||
unsigned long bytes_Rx_count; /* number of bytes received */
|
||||
unsigned long Rx_throughput; /* receive throughput */
|
||||
unsigned long no_ms_for_Rx_thruput_comp; /* millisecond time used for the Rx throughput computation */
|
||||
unsigned long Rx_bytes_discard_count; /* received Data bytes discarded */
|
||||
|
||||
/* handshaking protocol statistics */
|
||||
unsigned short XON_chars_Tx_count; /* number of XON characters transmitted */
|
||||
unsigned short XOFF_chars_Tx_count; /* number of XOFF characters transmitted */
|
||||
unsigned short XON_chars_Rx_count; /* number of XON characters received */
|
||||
unsigned short XOFF_chars_Rx_count; /* number of XOFF characters received */
|
||||
unsigned short Tx_halt_modem_low_count; /* number of times Tx halted (modem line low) */
|
||||
unsigned short Rx_halt_RTS_low_count; /* number of times Rx halted by setting RTS low */
|
||||
|
||||
/* break statistics */
|
||||
unsigned short break_Tx_count; /* number of break sequences transmitted */
|
||||
unsigned short break_Rx_count; /* number of break sequences received */
|
||||
|
||||
} ASY_OPERATIONAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for data transmission
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the data block transmit status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Tx_status_elements; /* number of transmit status elements */
|
||||
unsigned long base_addr_Tx_status_elements; /* base address of the transmit element list */
|
||||
unsigned long next_Tx_status_element_to_use; /* pointer to the next transmit element to be used */
|
||||
} ASY_TX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
|
||||
/* the data block transmit status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* opp flag */
|
||||
unsigned short data_length; /* length of the block to be transmitted */
|
||||
unsigned char misc_bits; /* miscellaneous transmit bits */
|
||||
unsigned char reserved[8]; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr; /* pointer to the data area */
|
||||
} ASY_DATA_TX_STATUS_EL_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for data reception
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the data block receive status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Rx_status_elements; /* number of receive status elements */
|
||||
unsigned long base_addr_Rx_status_elements; /* base address of the receive element list */
|
||||
unsigned long next_Rx_status_element_to_use; /* pointer to the next receive element to be used */
|
||||
unsigned long base_addr_Rx_buffer; /* base address of the receive data buffer */
|
||||
unsigned long end_addr_Rx_buffer; /* end address of the receive data buffer */
|
||||
} ASY_RX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the data block receive status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* opp flag */
|
||||
unsigned short data_length; /* length of the received data block */
|
||||
unsigned char misc_bits; /* miscellaneous receive bits */
|
||||
unsigned short time_stamp; /* receive time stamp (HDLC_STREAMING_MODE) */
|
||||
unsigned short data_buffered; /* the number of data bytes still buffered */
|
||||
unsigned char reserved[4]; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr; /* pointer to the data area */
|
||||
} ASY_DATA_RX_STATUS_EL_STRUCT;
|
||||
|
||||
/* settings for the 'misc_bits' */
|
||||
#define RX_HDLC_FRM_ABORT 0x01 /* the incoming frame was aborted */
|
||||
#define RX_HDLC_FRM_CRC_ERROR 0x02 /* the incoming frame has a CRC error */
|
||||
#define RX_FRM_OVERRUN_ERROR 0x04 /* the incoming frame has an overrun error */
|
||||
#define RX_HDLC_FRM_SHORT_ERROR 0x10 /* the incoming frame was too short */
|
||||
#define RX_HDLC_FRM_LONG_ERROR 0x20 /* the incoming frame was too long */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants defining the shared memory information area
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global information structure */
|
||||
typedef struct {
|
||||
unsigned char global_status; /* global status */
|
||||
unsigned char modem_status; /* current modem status */
|
||||
unsigned char global_excep_conditions; /* global exception conditions */
|
||||
unsigned char glob_info_reserved[5]; /* reserved */
|
||||
unsigned char code_name[4]; /* code name */
|
||||
unsigned char code_version[4]; /* code version */
|
||||
} GLOBAL_INFORMATION_STRUCT;
|
||||
|
||||
/* the ASY information structure */
|
||||
typedef struct {
|
||||
unsigned char asy_rx_avail;
|
||||
unsigned char asy_info_reserved[15]; /* reserved */
|
||||
} ASY_INFORMATION_STRUCT;
|
||||
|
||||
/* the interrupt information structure */
|
||||
typedef struct {
|
||||
unsigned char interrupt_type; /* type of interrupt triggered */
|
||||
unsigned char interrupt_permission; /* interrupt permission mask */
|
||||
unsigned char int_info_reserved[14]; /* reserved */
|
||||
} INTERRUPT_INFORMATION_STRUCT;
|
||||
|
||||
/* the FT1 information structure */
|
||||
typedef struct {
|
||||
unsigned char parallel_port_A_input; /* input - parallel port A */
|
||||
unsigned char parallel_port_B_input; /* input - parallel port B */
|
||||
unsigned char FT1_INS_alarm_condition; /* the current FT1 in-service/alarm condition */
|
||||
unsigned char FT1_info_reserved[13]; /* reserved */
|
||||
} FT1_INFORMATION_STRUCT;
|
||||
|
||||
|
||||
/* the shared memory area information structure */
|
||||
typedef struct {
|
||||
GLOBAL_INFORMATION_STRUCT global_info_struct; /* the global information structure */
|
||||
ASY_INFORMATION_STRUCT async_info_struct; /* the asynchronous information structure */
|
||||
INTERRUPT_INFORMATION_STRUCT interrupt_info_struct;/* the interrupt information structure */
|
||||
FT1_INFORMATION_STRUCT FT1_info_struct; /* the FT1 information structure */
|
||||
} SHARED_MEMORY_INFO_STRUCT;
|
||||
|
||||
|
||||
#define MAX_LGTH_HDLC_FRAME 2048 /* the maximum permitted length of an HDLC frame */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* HDLC Interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define READ_HDLC_OPERATIONAL_STATS 0xF0 /* retrieve the HDLC operational statistics */
|
||||
#define FLUSH_HDLC_OPERATIONAL_STATS 0xF1 /* flush the HDLC operational statistics */
|
||||
|
||||
/* the HDLC operational statistics structure (returned on READ_HDLC_OPERATIONAL_STATS command) */
|
||||
typedef struct {
|
||||
/* frame transmission statistics */
|
||||
unsigned long frames_Tx_count; /* number of frames transmitted */
|
||||
unsigned long bytes_Tx_count; /* number of bytes transmitted */
|
||||
unsigned long Tx_frame_discard_lgth_err_count;/* number of frames discarded (length error) */
|
||||
|
||||
/* frame reception statistics */
|
||||
unsigned long frames_Rx_count; /* number of frames received */
|
||||
unsigned long bytes_Rx_count; /* number of bytes received */
|
||||
unsigned long Rx_frame_short_count; /* received frames too short */
|
||||
unsigned long Rx_frame_long_count; /* received frames too long */
|
||||
unsigned long Rx_frame_discard_full_count; /* received frames discarded (buffer full) */
|
||||
unsigned long CRC_error_count; /* receiver CRC error count */
|
||||
unsigned long Rx_abort_count; /* abort frames received count */
|
||||
} HDLC_OPERATIONAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
|
||||
#undef UDPMGMT_SIGNATURE
|
||||
#define UDPMGMT_SIGNATURE "CTPIPEAB"
|
||||
#define UDPMGMT_SIGNATURE_LEN 8
|
||||
|
||||
|
||||
/* UDP/IP packet (for UDP management) layout */
|
||||
/*
|
||||
typedef struct {
|
||||
unsigned char reserved[2] ;
|
||||
unsigned short ip_length ;
|
||||
unsigned char reserved2[4] ;
|
||||
unsigned char ip_ttl ;
|
||||
unsigned char ip_protocol ;
|
||||
unsigned short ip_checksum ;
|
||||
unsigned long ip_src_address ;
|
||||
unsigned long ip_dst_address ;
|
||||
unsigned short udp_src_port ;
|
||||
unsigned short udp_dst_port ;
|
||||
unsigned short udp_length ;
|
||||
unsigned short udp_checksum ;
|
||||
udp_management_packet_t um_packet ;
|
||||
} ip_packet_t;
|
||||
*/
|
||||
|
||||
/* valid ip_protocol for UDP management */
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
|
||||
#if 0
|
||||
typedef struct {
|
||||
unsigned char status ;
|
||||
unsigned char data_avail ;
|
||||
unsigned short real_length ;
|
||||
unsigned short time_stamp ;
|
||||
unsigned char data[1] ;
|
||||
} trace_pkt_t;
|
||||
#endif
|
||||
|
||||
/* Special UDP drivers management commands */
|
||||
#define CPIPE_ENABLE_TRACING 0x50
|
||||
#define CPIPE_DISABLE_TRACING 0x51
|
||||
#define CPIPE_GET_TRACE_INFO 0x52
|
||||
#define CPIPE_GET_IBA_DATA 0x53
|
||||
#define CPIPE_FT1_READ_STATUS 0x54
|
||||
#define CPIPE_DRIVER_STAT_IFSEND 0x55
|
||||
#define CPIPE_DRIVER_STAT_INTR 0x56
|
||||
#define CPIPE_DRIVER_STAT_GEN 0x57
|
||||
#define CPIPE_FLUSH_DRIVER_STATS 0x58
|
||||
#define CPIPE_ROUTER_UP_TIME 0x59
|
||||
|
||||
#if 0
|
||||
#define CPIPE_MPPP_TRACE_ENABLE 0x60
|
||||
#define CPIPE_MPPP_TRACE_DISABLE 0x61
|
||||
#define CPIPE_TE1_56K_STAT 0x62 /* TE1_56K */
|
||||
#define CPIPE_GET_MEDIA_TYPE 0x63 /* TE1_56K */
|
||||
#define CPIPE_FLUSH_TE1_PMON 0x64 /* TE1 */
|
||||
#define CPIPE_READ_REGISTER 0x65 /* TE1_56K */
|
||||
#define CPIPE_TE1_CFG 0x66 /* TE1 */
|
||||
#endif
|
||||
|
||||
/* Driver specific commands for API */
|
||||
#define CHDLC_READ_TRACE_DATA 0xE4 /* read trace data */
|
||||
#define TRACE_ALL 0x00
|
||||
#define TRACE_PROT 0x01
|
||||
#define TRACE_DATA 0x02
|
||||
|
||||
#define SIOC_ASYHDLC_RX_AVAIL_CMD SIOC_WANPIPE_DEVPRIVATE
|
||||
#define SIOC_GET_HDLC_RECEIVER_STATUS SIOC_ASYHDLC_RX_AVAIL_CMD
|
||||
|
||||
/* Return codes for SIOC_GET_HDLC_RECEIVER_STATUS cmd */
|
||||
enum {
|
||||
HDLC_RX_IN_PROCESS,
|
||||
NO_HDLC_RX_IN_PROCESS
|
||||
};
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,751 @@
|
|||
/************************************************************************************
|
||||
* *
|
||||
* PHYAPI.H - the 'C' header file for the Sangoma S508/S514 PHY-level ATM code API. *
|
||||
* *
|
||||
************************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __SDLA_ATM_H_
|
||||
#define __SDLA_ATM_H_
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants defining the shared memory control block (mailbox)
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define BASE_ADDR_MB_STRUCT 0xE000 /* the base address of the mailbox structure */
|
||||
#define NUMBER_MB_RESERVED_BYTES 0x0B /* the number of reserved bytes in the mailbox header area */
|
||||
#define SIZEOF_MB_DATA_BFR 240 /* the size of the actual mailbox data area */
|
||||
|
||||
/* the control block mailbox structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* the opp flag */
|
||||
unsigned char command; /* the user command */
|
||||
unsigned short buffer_length; /* the data length */
|
||||
unsigned char return_code; /* the return code */
|
||||
char MB_reserved[NUMBER_MB_RESERVED_BYTES]; /* reserved for later use */
|
||||
char data[SIZEOF_MB_DATA_BFR]; /* the data area */
|
||||
} ATM_MAILBOX_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* global interface commands */
|
||||
#define READ_GLOBAL_EXCEPTION_CONDITION 0x01 /* read a global exception condition from the adapter */
|
||||
#define SET_GLOBAL_CONFIGURATION 0x02 /* set the global operational configuration */
|
||||
#define READ_GLOBAL_CONFIGURATION 0x03 /* read the global configuration */
|
||||
#define READ_GLOBAL_STATISTICS 0x04 /* retrieve the global statistics */
|
||||
#define FLUSH_GLOBAL_STATISTICS 0x05 /* flush the global statistics */
|
||||
#define SET_MODEM_STATUS 0x06 /* set the status of DTR and/or RTS */
|
||||
#define READ_MODEM_STATUS 0x07 /* read the current status of CTS and DCD */
|
||||
#undef READ_COMMS_ERROR_STATS
|
||||
#define READ_COMMS_ERROR_STATS 0x08 /* read the communication error statistics */
|
||||
|
||||
#undef FLUSH_COMMS_ERROR_STATS
|
||||
#define FLUSH_COMMS_ERROR_STATS 0x09 /* flush the communication error statistics */
|
||||
#define SET_TRACE_CONFIGURATION 0x0A /* set the line trace configuration */
|
||||
#define READ_TRACE_CONFIGURATION 0x0B /* read the line trace configuration */
|
||||
#define READ_TRACE_STATISTICS 0x0C /* read the trace statistics */
|
||||
#undef FLUSH_TRACE_STATISTICS
|
||||
#define FLUSH_TRACE_STATISTICS 0x0D /* flush the trace statistics */
|
||||
|
||||
/* PHY-level interface commands */
|
||||
#undef PHY_READ_CODE_VERSION
|
||||
#define PHY_READ_CODE_VERSION 0x20 /* read the ATM code version */
|
||||
#define PHY_READ_EXCEPTION_CONDITION 0x21 /* read a PHY-level exception condition from the adapter */
|
||||
#define PHY_SET_CONFIGURATION 0x22 /* set the PHY-level configuration */
|
||||
#define PHY_READ_CONFIGURATION 0x23 /* read the PHY-level configuration */
|
||||
#define PHY_ENABLE_COMMUNICATIONS 0x24 /* enable PHY-level communications */
|
||||
#define PHY_DISABLE_COMMUNICATIONS 0x25 /* disable PHY-level communications */
|
||||
#define PHY_READ_STATUS 0x26 /* read the PHY-level status */
|
||||
#define PHY_READ_OPERATIONAL_STATS 0x27 /* retrieve the PHY-level operational statistics */
|
||||
#define PHY_FLUSH_OPERATIONAL_STATS 0x28 /* flush the PHY-level operational statistics */
|
||||
#define PHY_RESYNCHRONIZE_RECEIVER 0x29 /* resynchronize the receiver */
|
||||
#define PHY_SET_TX_UNDERRUN_CONFIG 0x2A /* set the transmit underrun cell configuration */
|
||||
#define PHY_READ_TX_UNDERRUN_CONFIG 0x2B /* read the transmit underrun cell configuration */
|
||||
#define PHY_SET_INTERRUPT_TRIGGERS 0x30 /* set the PHY-level application interrupt triggers */
|
||||
#define PHY_READ_INTERRUPT_TRIGGERS 0x31 /* read the PHY-level application interrupt trigger configuration */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Return codes from interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define OK 0x00 /* the interface command was successful */
|
||||
|
||||
/* return codes from global interface commands */
|
||||
#define NO_GLOBAL_EXCEP_COND_TO_REPORT 0x01 /* there is no global exception condition to report */
|
||||
#define LGTH_GLOBAL_CFG_DATA_INVALID 0x01 /* the length of the passed global configuration data is invalid */
|
||||
#define LGTH_TRACE_CFG_DATA_INVALID 0x01 /* the length of the passed trace configuration data is invalid */
|
||||
#define IRQ_TIMEOUT_VALUE_INVALID 0x02 /* an invalid application IRQ timeout value was selected */
|
||||
#define TRACE_CONFIG_INVALID 0x02 /* the passed line trace configuration is invalid */
|
||||
#define ADAPTER_OPERATING_FREQ_INVALID 0x03 /* an invalid adapter operating frequency was selected */
|
||||
|
||||
/* return codes from command READ_GLOBAL_EXCEPTION_CONDITION */
|
||||
#define EXCEP_MODEM_STATUS_CHANGE 0x10 /* a modem status change occurred */
|
||||
#define EXCEP_APP_IRQ_TIMEOUT 0x12 /* an application IRQ timeout has occurred */
|
||||
|
||||
/* return codes from PHY-level interface commands */
|
||||
#define PHY_NO_EXCEP_COND_TO_REPORT 0x21 /* there is no PHY-level exception condition to report */
|
||||
#define PHY_COMMS_DISABLED 0x21 /* communications are not currently enabled */
|
||||
#define PHY_COMMS_ENABLED 0x21 /* communications are currently enabled */
|
||||
#define PHY_DISABLE_COMMS_BEFORE_CFG 0x21 /* communications must be disabled before setting the configuration */
|
||||
#define PHY_CFG_BEFORE_COMMS_ENABLED 0x22 /* perform a PHY_SET_CONFIGURATION before enabling comms */
|
||||
#define PHY_LGTH_CFG_DATA_INVALID 0x22 /* the length of the passed configuration data is invalid */
|
||||
#define PHY_LGTH_INT_TRIG_DATA_INVALID 0x22 /* the length of the passed interrupt trigger data is invalid */
|
||||
#define PHY_LGTH_TX_UND_DATA_INVALID 0x22 /* the length of the passed transmit underrun data is invalid */
|
||||
#define PHY_RX_NOT_SYNCHRONIZED 0x22 /* the receiver is not synchronized */
|
||||
#define PHY_INVALID_IRQ_SELECTED 0x23 /* an invalid IRQ was selected in the PHY_SET_INTERRUPT_TRIGGERS */
|
||||
#define PHY_INVALID_CFG_DATA 0x23 /* the passed configuration data is invalid */
|
||||
#define PHY_IRQ_TMR_VALUE_INVALID 0x24 /* an invalid application IRQ timer value was selected */
|
||||
#define PHY_INVALID_COMMAND 0x2F /* the defined interface command is invalid */
|
||||
|
||||
/* return codes from command PHY_READ_EXCEPTION_CONDITION */
|
||||
#define PHY_EXCEP_RX_SYNC_STATE_CHANGE 0x30 /* the PHY receiver has changed state */
|
||||
#define PHY_EXCEP_INVALID_HEC 0x32 /* the Rx consecutive incorrect HEC counter has expired */
|
||||
#define PHY_EXCEP_RECEP_LOSS 0x33 /* the cell reception sync loss timer has expired */
|
||||
#define PHY_EXCEP_RX_DISCARD 0x36 /* incoming cells were discarded */
|
||||
#define PHY_EXCEP_TX_LENGTH_ERROR 0x37 /* a transmit buffer of invalid length was detected */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_GLOBAL_EXCEPTION_CONDITION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global exception condition structure for handling a modem status change */
|
||||
typedef struct {
|
||||
unsigned char modem_status_change; /* the modem status change */
|
||||
} GLOBAL_EX_MODEM_STRUCT;
|
||||
|
||||
/* settings for the 'modem_status_change' */
|
||||
#define CHANGE_IN_DCD 0x04 /* a change in DCD occured */
|
||||
#define CHANGE_IN_CTS 0x10 /* a change in CTS occured */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_GLOBAL_CONFIGURATION/READ_GLOBAL_CONFIGURATION commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global configuration structure */
|
||||
typedef struct {
|
||||
unsigned short adapter_config_options; /* adapter configuration options */
|
||||
unsigned short app_IRQ_timeout; /* application IRQ timeout */
|
||||
unsigned long adapter_operating_frequency; /* adapter operating frequency */
|
||||
} GLOBAL_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'adapter_config_options' */
|
||||
#define ADPTR_CFG_S514 0x0001 /* S514 adapter */
|
||||
|
||||
/* settings for the 'app_IRQ_timeout' */
|
||||
#define MAX_APP_IRQ_TIMEOUT_VALUE 5000 /* the maximum permitted IRQ timeout */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_GLOBAL_STATISTICS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global statistics structure */
|
||||
typedef struct {
|
||||
unsigned short app_IRQ_timeout_count; /* application IRQ timeout count */
|
||||
} GLOBAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_MODEM_STATUS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the set modem status structure */
|
||||
typedef struct {
|
||||
unsigned char output_modem_status; /* the output modem status */
|
||||
} SET_MODEM_STATUS_STRUCT;
|
||||
|
||||
/* settings for the 'output_modem_status' */
|
||||
#define SET_DTR_HIGH 0x01 /* set DTR high */
|
||||
#define SET_RTS_HIGH 0x02 /* set RTS high */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_MODEM_STATUS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the read modem status structure */
|
||||
typedef struct {
|
||||
unsigned char input_modem_status; /* the input modem status */
|
||||
} READ_MODEM_STATUS_STRUCT;
|
||||
|
||||
/* settings for the 'input_modem_status' */
|
||||
#define DCD_HIGH 0x08 /* DCD is high */
|
||||
#define CTS_HIGH 0x20 /* CTS is high */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_COMMS_ERROR_STATS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the communications error statistics structure */
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count; /* receiver overrun error count */
|
||||
unsigned short reserved_0; /* reserved for later use */
|
||||
unsigned short reserved_1; /* reserved for later use */
|
||||
unsigned short DCD_state_change_count; /* DCD state change count */
|
||||
unsigned short CTS_state_change_count; /* CTS state change count */
|
||||
} COMMS_ERROR_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants used for line tracing
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the trace configuration structure (SET_TRACE_CONFIGURATION/READ_TRACE_CONFIGURATION commands) */
|
||||
typedef struct {
|
||||
unsigned char trace_config; /* trace configuration */
|
||||
unsigned long ptr_trace_stat_el_cfg_struct; /* a pointer to the line trace element configuration structure */
|
||||
} LINE_TRACE_CONFIG_STRUCT;
|
||||
|
||||
/* 'trace_config' bit settings */
|
||||
#define TRACE_INACTIVE 0x00 /* trace is inactive */
|
||||
#define TRACE_ACTIVE 0x01 /* trace is active */
|
||||
#define TRACE_LIMIT_REPEAT_CELLS 0x08 /* limit the tracing of repeated Physical Layer and Idle Cells */
|
||||
#define TRACE_PHY_UNASSIGNED_CELLS 0x10 /* trace Unassigned Cells */
|
||||
#define TRACE_PHY_IDLE_CELLS 0x20 /* trace Idle Cells */
|
||||
#define TRACE_PHY_PHYS_LAYER_CELLS 0x40 /* trace Physical Layer Cells */
|
||||
#define TRACE_PHY_NON_UNAS_PHYS_CELLS 0x80 /* trace cells other than Physical Layer and Idle Cells */
|
||||
|
||||
/* the line trace status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_trace_status_els; /* number of line trace elements */
|
||||
unsigned long base_addr_trace_status_els; /* base address of the trace element list */
|
||||
unsigned long next_trace_el_to_use; /* pointer to the next trace element to be used */
|
||||
} TRACE_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the line trace status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* opp flag */
|
||||
unsigned short trace_length; /* trace length */
|
||||
unsigned char trace_type; /* trace type */
|
||||
unsigned short trace_time_stamp; /* time stamp */
|
||||
unsigned short trace_reserved_1; /* reserved for later use */
|
||||
unsigned long trace_reserved_2; /* reserved for later use */
|
||||
unsigned long ptr_data_bfr; /* pointer to the trace data buffer */
|
||||
} TRACE_STATUS_ELEMENT_STRUCT;
|
||||
|
||||
/* settings for the 'trace_type' */
|
||||
#define TRACE_INCOMING 0x00 /* an incoming block/cell has been traced */
|
||||
#define TRACE_OUTGOING 0x01 /* an outgoing block/cell has been traced */
|
||||
#define TRACE_HEC_ERROR 0x80 /* the traced cell has a HEC error */
|
||||
|
||||
/* the line trace statistics structure */
|
||||
typedef struct {
|
||||
unsigned long blocks_traced_count; /* number of blocks traced */
|
||||
unsigned long trc_blocks_discarded_count; /* number of trace blocks discarded */
|
||||
} LINE_TRACE_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the PHY_READ_EXCEPTION_CONDITION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the structure returned on a return code PHY_EXCEP_RX_SYNC_STATE_CHANGE */
|
||||
/* Note that the definitions for the 'Rx_sync_status' are as per the PHY_READ_STATUS command */
|
||||
typedef struct {
|
||||
unsigned char Rx_sync_status; /* receiver synchronization status */
|
||||
} PHY_RX_SYNC_EXCEP_STRUCT;
|
||||
|
||||
/* the structure returned on a return code PHY_EXCEP_RX_DISCARD */
|
||||
typedef struct {
|
||||
unsigned long Rx_discard_count; /* number of incoming blocks discarded */
|
||||
} PHY_RX_DISC_EXCEP_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the PHY_SET_CONFIGURATION/PHY_READ_CONFIGURATION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the PHY-level configuration structure */
|
||||
typedef struct {
|
||||
unsigned long baud_rate; /* the baud rate */
|
||||
unsigned short line_config_options; /* line configuration options */
|
||||
unsigned short modem_config_options; /* modem configuration options */
|
||||
unsigned short modem_status_timer; /* timer for monitoring modem status changes */
|
||||
unsigned short API_options; /* API options */
|
||||
unsigned short protocol_options; /* protocol options */
|
||||
unsigned short HEC_options; /* HEC options */
|
||||
unsigned char custom_Rx_COSET; /* the custom COSET value used when checking the HEC value in received cells */
|
||||
unsigned char custom_Tx_COSET; /* the custom COSET value used when setting the HEC value in transmitted cells */
|
||||
unsigned short buffer_options; /* Tx/Rx buffer options */
|
||||
unsigned short max_cells_in_Tx_block; /* the maximum number of cells in an outgoing block */
|
||||
unsigned char Tx_underrun_cell_GFC; /* the GFC value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_PT; /* the PT value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_CLP; /* the CLP value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_payload; /* the payload character in a Tx underrun cell */
|
||||
unsigned short number_cells_Tx_underrun; /* the number of cells to be transmitted in an underrun condition */
|
||||
unsigned short max_cells_in_Rx_block; /* the maximum number of cells in an incoming block */
|
||||
unsigned short Rx_hunt_timer; /* receiver hunt timer */
|
||||
unsigned short Rx_sync_bytes; /* receiver synchronization bytes */
|
||||
unsigned short Rx_sync_offset; /* offset of the receiver synchronization bytes */
|
||||
unsigned short cell_Rx_sync_loss_timer; /* cell reception synchronization loss timer */
|
||||
unsigned short Rx_HEC_check_timer; /* the Rx HEC check timer */
|
||||
unsigned short Rx_bad_HEC_timer; /* the time period for monitoring cells with bad HEC values */
|
||||
unsigned short Rx_max_bad_HEC_count; /* the maximum number of bad HEC count */
|
||||
unsigned short number_cells_Rx_discard; /* the number of cells to be discarded in a buffer overrun condition */
|
||||
unsigned short statistics_options; /* operational statistics options */
|
||||
unsigned long ptr_shared_mem_info_struct; /* a pointer to the shared memory area information structure */
|
||||
unsigned long ptr_Tx_stat_el_cfg_struct; /* a pointer to the transmit status element configuration structure */
|
||||
unsigned long ptr_Rx_stat_el_cfg_struct; /* a pointer to the receive status element configuration structure */
|
||||
} PHY_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'line_config_options' */
|
||||
#define PHY_INTERFACE_LEVEL_V35 0x0001 /* V.35 interface level */
|
||||
#define PHY_INTERFACE_LEVEL_RS232 0x0002 /* RS-232 interface level */
|
||||
|
||||
/* settings for the 'modem_config_options' */
|
||||
#define PHY_MANUAL_DTR_RTS 0x0001 /* don't automatically raise DTR and RTS when performing an */
|
||||
/* PHY_ENABLE_COMMUNICATIONS command */
|
||||
#define PHY_IGNORE_CHG_MODEM_STATUS 0x0002 /* don't report changes in modem status to the application */
|
||||
|
||||
/* settings for the 'API_options' */
|
||||
#define PHY_DISCARD_RX_UNASSIGNED_CELLS 0x0001 /* discard incoming Unassigned Cells */
|
||||
#define PHY_DISCARD_RX_IDLE_CELLS 0x0002 /* discard incoming Idle Cells */
|
||||
#define PHY_DISCARD_RX_PHYS_LAYER_CELLS 0x0004 /* discard incoming Physical Layer Cells */
|
||||
#define PHY_TRANSPARENT_TX_RX_CELLS 0x0010 /* cells passed to and from the application transparently */
|
||||
#define PHY_DECODED_TX_RX_CELLS 0x0020 /* cells decoded and formatted by the PHY firmware */
|
||||
#define PHY_APP_REVERSES_BIT_ORDER 0x0040 /* let application revers bits */
|
||||
|
||||
/* settings for the 'protocol_options' */
|
||||
#define PHY_UNI 0x0001 /* configure as a User-Network Interface */
|
||||
#define PHY_NNI 0x0002 /* configure as a Network Node Interface */
|
||||
#define PHY_MANUAL_RX_SYNC 0x0100 /* use user-defined Rx synchronization parameters */
|
||||
|
||||
/* settings for the 'HEC_options' */
|
||||
#define PHY_DISABLE_RX_HEC_CHECK 0x0001 /* disable the checking of the HEC value in received cells */
|
||||
#define PHY_DISABLE_AUTO_SYNC_BAD_HEC 0x0002 /* disable automatic resynchronization on receipt of cells with bad HEC values */
|
||||
#define PHY_DISABLE_RX_COSET 0x0010 /* disable XOR with COSET when checking the HEC value in received cells */
|
||||
#define PHY_DISABLE_TX_COSET 0x0020 /* disable XOR with COSET when setting the HEC value in transmitted cells */
|
||||
#define PHY_CUSTOM_RX_COSET 0x0040 /* use a custom COSET when checking the HEC value in received cells */
|
||||
#define PHY_CUSTOM_TX_COSET 0x0080 /* use a custom COSET when setting the HEC value in transmitted cells */
|
||||
|
||||
/* bit settings for the 'buffer_options' */
|
||||
#define PHY_TX_ONLY 0x0001 /* transmit only (no reception) */
|
||||
#define PHY_RX_ONLY 0x0002 /* receive only (no transmission) */
|
||||
#define PHY_SINGLE_TX_BUFFER 0x0010 /* configure a single transmit buffer */
|
||||
|
||||
/* settings for the 'statistics_options' */
|
||||
#define PHY_TX_BYTE_COUNT_STAT 0x0001 /* record the number of bytes transmitted */
|
||||
#define PHY_RX_BYTE_COUNT_STAT 0x0002 /* record the number of bytes received */
|
||||
#define PHY_TX_THROUGHPUT_STAT 0x0004 /* compute the transmit throughput */
|
||||
#define PHY_RX_THROUGHPUT_STAT 0x0008 /* compute the receive throughput */
|
||||
#define PHY_INCL_UNDERRUN_TX_THRUPUT 0x0010 /* include Tx underrun cells in Tx throughput */
|
||||
#define PHY_INCL_DISC_RX_THRUPUT 0x0020 /* include discarded (idle/unassigned) Rx cells in Rx throughput */
|
||||
|
||||
/* permitted minimum and maximum values for setting the PHY configuration */
|
||||
#define PHY_MAX_BAUD_RATE_S508 2666666 /* maximum baud rate (S508) */
|
||||
#define PHY_MAX_BAUD_RATE_S514 2750000 /* maximum baud rate (S514) */
|
||||
#define PHY_MIN_MODEM_TIMER 0 /* minimum modem status timer */
|
||||
#define PHY_MAX_MODEM_TIMER 6000 /* maximum modem status timer */
|
||||
#define PHY_MIN_RX_HUNT_TIMER 1 /* minimum receiver hunt timer */
|
||||
#define PHY_MAX_RX_HUNT_TIMER 6000 /* maximum receiver hunt timer */
|
||||
#define PHY_MIN_RX_SYNC_OFFSET 0 /* minimum offset of receiver synchronization bytes */
|
||||
#define PHY_MAX_RX_SYNC_OFFSET 50 /* maximum offset of receiver synchronization bytes */
|
||||
#define PHY_MIN_CELLS_IN_TX_BLOCK 1 /* minimum number of cells in an outgoing block */
|
||||
#define PHY_MAX_CELLS_IN_TX_BLOCK 96 /* maximum number of cells in an outgoing block */
|
||||
#define PHY_MIN_CELLS_TX_UNDERRUN 1 /* minimum number of cells to be transmitted in an underrun condition */
|
||||
#define PHY_MAX_CELLS_TX_UNDERRUN 5 /* minimum number of cells to be transmitted in an underrun condition */
|
||||
#define PHY_MIN_CELLS_IN_RX_BLOCK 1 /* minimum number of cells in an incoming block */
|
||||
#define PHY_MAX_CELLS_IN_RX_BLOCK 96 /* maximum number of cells in an incoming block */
|
||||
#define PHY_MAX_RX_SYNC_LOSS_TIMER 6000 /* maximum cell reception sync loss timer */
|
||||
#define PHY_MAX_RX_HEC_CHECK_TIMER 6000 /* maximum receive HEC check timer */
|
||||
#define PHY_MIN_RX_BAD_HEC_TIMER 5 /* minimum time for monitoring cells with bad HEC values */
|
||||
#define PHY_MAX_RX_BAD_HEC_TIMER 60000 /* maximum time for monitoring cells with bad HEC values */
|
||||
#define PHY_MIN_RX_BAD_HEC_COUNT 1 /* the minimum bad HEC counter */
|
||||
#define PHY_MAX_RX_BAD_HEC_COUNT 10000 /* the maximum bad HEC counter */
|
||||
#define PHY_MAX_RX_INCORRECT_HEC_COUNT 100 /* maximum receive consecutive incorrect HEC counter */
|
||||
#define PHY_MIN_CELLS_RX_DISCARD 1 /* minimum number of cells to be discarded in a buffer overrun condition */
|
||||
#define PHY_MAX_CELLS_RX_DISCARD 5 /* maximum number of cells to be discarded in a buffer overrun condition */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the PHY_READ_STATUS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the PHY-level status structure */
|
||||
typedef struct {
|
||||
unsigned char Rx_sync_status; /* receiver synchronization status */
|
||||
unsigned char excep_conditions; /* PHY exception conditions */
|
||||
unsigned char no_Rx_blocks_avail; /* number of Rx blocks available for the application */
|
||||
unsigned short Rx_sync_time; /* receiver synchronization time */
|
||||
unsigned short Rx_sync_bytes; /* receiver synchronization bytes */
|
||||
unsigned short Rx_sync_offset; /* offset of the receiver synchronization bytes */
|
||||
} PHY_STATUS_STRUCT;
|
||||
|
||||
/* settings for the 'Rx_sync_status' variable */
|
||||
#define PHY_RX_SYNC_LOST 0x00 /* synchronization has been lost */
|
||||
#define PHY_RX_HUNT 0x01 /* receiver in hunt state */
|
||||
#define PHY_RX_PRESYNC 0x02 /* receiver in presync state */
|
||||
#define PHY_RX_SYNCHRONIZED 0x80 /* receiver synchronized */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the PHY_READ_OPERATIONAL_STATS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the PHY-level operational statistics structure */
|
||||
typedef struct {
|
||||
|
||||
/* transmission statistics */
|
||||
unsigned long blocks_Tx_count; /* number of blocks transmitted */
|
||||
unsigned long bytes_Tx_count; /* number of bytes transmitted */
|
||||
unsigned long Tx_throughput; /* transmit throughput */
|
||||
unsigned long no_ms_for_Tx_thruput_comp; /* millisecond time used for the Tx throughput computation */
|
||||
unsigned long Tx_underrun_cell_count; /* number of underrun cells transmitted */
|
||||
unsigned long Tx_length_error_count; /* number of blocks transmitted with a length error */
|
||||
unsigned long reserved_Tx_stat0; /* reserved for later use */
|
||||
unsigned long reserved_Tx_stat1; /* reserved for later use */
|
||||
|
||||
/* reception statistics */
|
||||
unsigned long blocks_Rx_count; /* number of blocks received */
|
||||
unsigned long bytes_Rx_count; /* number of bytes received */
|
||||
unsigned long Rx_throughput; /* receive throughput */
|
||||
unsigned long no_ms_for_Rx_thruput_comp; /* millisecond time used for the Rx throughput computation */
|
||||
unsigned long Rx_blocks_discard_count; /* number of incoming blocks discarded */
|
||||
unsigned long Rx_Idle_Cell_discard_count; /* number of incoming Idle Cells discarded */
|
||||
unsigned long Rx_Unas_Cell_discard_count; /* number of incoming Unassigned Cells discarded */
|
||||
unsigned long Rx_Phys_Lyr_Cell_discard_count;/* number of incoming Physical Layer Cells discarded */
|
||||
unsigned long Rx_bad_HEC_count; /* number of incoming cells with a bad HEC */
|
||||
unsigned long reserved_Rx_stat0; /* reserved for later use */
|
||||
unsigned long reserved_Rx_stat1; /* reserved for later use */
|
||||
|
||||
/* synchronization statistics */
|
||||
unsigned long Rx_sync_attempt_count; /* receiver synchronization attempt count */
|
||||
unsigned long Rx_sync_achieved_count; /* receiver synchronization achieved count */
|
||||
unsigned long Rx_sync_failure_count; /* receiver synchronization failure count */
|
||||
unsigned long Rx_hunt_attempt_count; /* Rx hunt attempt count */
|
||||
unsigned long Rx_hunt_char_sync_count; /* Rx hunt character synchronization count */
|
||||
unsigned long Rx_hunt_timeout_count; /* Rx hunt timeout count */
|
||||
unsigned long Rx_hunt_achieved_count; /* Rx hunt achieved count */
|
||||
unsigned long Rx_hunt_failure_count; /* Rx hunt failure count */
|
||||
unsigned long Rx_presync_attempt_count; /* Rx presync attempt count */
|
||||
unsigned long Rx_presync_achieved_count; /* Rx presync achieved count */
|
||||
unsigned long Rx_presync_failure_count; /* Rx presync failure count */
|
||||
unsigned long Rx_resync_bad_HEC_count; /* Rx re-synchronization due to cells received with a bad HEC */
|
||||
unsigned long Rx_resync_reception_loss_count;/* Rx re-synchronization due to loss of reception */
|
||||
unsigned long Rx_resync_overrun_count; /* Rx re-synchronization due receiver overrun */
|
||||
unsigned long reserved_Rx_sync_stat0; /* reserved for later use */
|
||||
unsigned long reserved_Rx_sync_stat1; /* reserved for later use */
|
||||
} PHY_OPERATIONAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the PHY_SET_TX_UNDERRUN_CONFIG command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the PHY transmit underrun cell structure */
|
||||
typedef struct {
|
||||
unsigned char Tx_underrun_cell_GFC; /* the GFC value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_PT; /* the PT value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_CLP; /* the CLP value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_payload; /* the payload character in a Tx underrun cell */
|
||||
} PHY_TX_UNDERRUN_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for using application interrupts
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the structure used for the PHY_SET_INTERRUPT_TRIGGERS/PHY_READ_INTERRUPT_TRIGGERS command */
|
||||
typedef struct {
|
||||
unsigned char interrupt_triggers; /* interrupt trigger configuration */
|
||||
unsigned char IRQ; /* IRQ to be used */
|
||||
unsigned short interrupt_timer; /* interrupt timer */
|
||||
unsigned short misc_interrupt_bits; /* miscellaneous interrupt bits */
|
||||
} PHY_INT_TRIGGERS_STRUCT;
|
||||
|
||||
/* 'interrupt_triggers' bit settings */
|
||||
#define PHY_INT_RX 0x01 /* interrupt on reception */
|
||||
#define PHY_INT_TX 0x02 /* interrupt on transmission */
|
||||
#define PHY_INT_COMMAND_COMPLETE 0x04 /* interrupt when an interface command is complete */
|
||||
#define PHY_INT_TIMER 0x08 /* interrupt on a defined 1/100th second timeout */
|
||||
#define PHY_INT_GLOBAL_EXCEP_COND 0x10 /* interrupt on a global exception condition */
|
||||
#define PHY_INT_PHY_EXCEP_COND 0x20 /* interrupt on a PHY-level exception condition */
|
||||
#define PHY_INT_TRACE 0x80 /* interrupt when trace data is available */
|
||||
|
||||
/* 'interrupt_timer' limitation */
|
||||
#define MAX_INTERRUPT_TIMER_VALUE 60000 /* the maximum permitted timer interrupt value */
|
||||
|
||||
/* interrupt types indicated at 'interrupt_type' byte of the INTERRUPT_INFORMATION_STRUCT */
|
||||
#define PHY_NO_INT_PEND 0x00 /* no interrups are pending */
|
||||
#define PHY_RX_INT_PEND 0x01 /* a receive interrupt is pending */
|
||||
#define PHY_TX_INT_PEND 0x02 /* a transmit interrupt is pending */
|
||||
#define PHY_COMMAND_COMPLETE_INT_PEND 0x04 /* a 'command complete' interrupt is pending */
|
||||
#define PHY_TIMER_INT_PEND 0x08 /* a timer interrupt is pending */
|
||||
#define PHY_GLOBAL_EXCEP_COND_INT_PEND 0x10 /* a global exception condition interrupt is pending */
|
||||
#define PHY_PHY_EXCEP_COND_INT_PEND 0x20 /* a PHY exception condition interrupt is pending */
|
||||
#define PHY_TRACE_INT_PEND 0x80 /* a trace data interrupt is pending */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for block transmission
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the block transmit status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Tx_status_els; /* number of transmit status elements */
|
||||
unsigned long base_addr_Tx_status_els; /* base address of the transmit element list */
|
||||
unsigned long next_Tx_status_el_to_use; /* pointer to the next transmit element to be used */
|
||||
} PHY_TX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the block transmit status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* opp flag */
|
||||
unsigned short block_length; /* length of the block to be transmitted */
|
||||
unsigned char misc_Tx_bits; /* miscellaneous Tx bits */
|
||||
unsigned char Tx_underrun_cell_GFC; /* the GFC value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_PT; /* the PT value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_CLP; /* the CLP value in a Tx underrun cell */
|
||||
unsigned char Tx_underrun_cell_payload; /* the payload character in a Tx underrun cell */
|
||||
unsigned char reserved[4]; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr; /* pointer to the data area */
|
||||
} PHY_TX_STATUS_EL_STRUCT;
|
||||
|
||||
/* settings for the 'misc_Tx_bits' */
|
||||
#define PHY_UPDATE_TX_UNDERRUN_CONFIG 0x01 /* update the transmit underrun cell configuration */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for block reception
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the block receive status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Rx_status_els; /* number of receive status elements */
|
||||
unsigned long base_addr_Rx_status_els; /* base address of the receive element list */
|
||||
unsigned long next_Rx_status_el_to_use; /* pointer to the next receive element to be used */
|
||||
} PHY_RX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the block receive status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* opp flag */
|
||||
unsigned short block_length; /* length of the received block */
|
||||
unsigned char misc_Rx_bits; /* miscellaneous Rx bits */
|
||||
unsigned short time_stamp; /* receive time stamp */
|
||||
unsigned char reserved[6]; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr; /* pointer to the data area */
|
||||
} PHY_RX_STATUS_EL_STRUCT;
|
||||
|
||||
/* settings for the 'misc_Rx_bits' */
|
||||
#define RX_OVERRUN_ERROR 0x04 /* the incoming block has an overrun error */
|
||||
#define HEC_ERROR 0x08 /* the received cell has a HEC error */
|
||||
|
||||
/* structure used for transmitting and receiving cells that are decoded and formatted by the PHY firmware */
|
||||
typedef struct {
|
||||
unsigned char reserved[5]; /* reserved for internal use */
|
||||
unsigned char payload[48]; /* information payload */
|
||||
unsigned short GFC_VPI; /* GFC (Generic Flow Control)/VPI (Virtual Path Identifier) */
|
||||
unsigned short VCI; /* VCI (Virtual Channel Identifier) */
|
||||
unsigned char PT; /* PT (Payload Type) */
|
||||
unsigned char CLP; /* CLP (Cell Loss Priority) */
|
||||
unsigned char HEC; /* HEC (Header Error Control) */
|
||||
} PHY_TX_RX_DECODE_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants defining the shared memory information area
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global information structure */
|
||||
typedef struct {
|
||||
unsigned char global_status; /* global status */
|
||||
unsigned char modem_status; /* current modem status */
|
||||
unsigned char global_excep_conditions; /* global exception conditions */
|
||||
unsigned char glob_info_reserved[5]; /* reserved */
|
||||
unsigned char code_name[4]; /* code name */
|
||||
unsigned char code_version[4]; /* code version */
|
||||
} GLOBAL_INFORMATION_STRUCT;
|
||||
|
||||
/* the PHY information structure */
|
||||
typedef struct {
|
||||
unsigned char Rx_sync_status; /* receiver synchronization status */
|
||||
unsigned char PHY_excep_conditions; /* PHY exception conditions */
|
||||
unsigned char no_Rx_blocks_avail; /* number of Rx blocks available for the application */
|
||||
unsigned char PHY_info_reserved[13]; /* reserved */
|
||||
} PHY_INFORMATION_STRUCT;
|
||||
|
||||
/* the interrupt information structure */
|
||||
typedef struct {
|
||||
unsigned char interrupt_type; /* type of interrupt triggered */
|
||||
unsigned char interrupt_permission; /* interrupt permission mask */
|
||||
unsigned char int_info_reserved[14]; /* reserved */
|
||||
} INTERRUPT_INFORMATION_STRUCT;
|
||||
|
||||
/* the front-end information structure */
|
||||
typedef struct {
|
||||
unsigned char parallel_port_A_input; /* input - parallel port A */
|
||||
unsigned char parallel_port_B_input; /* input - parallel port B */
|
||||
unsigned char FT1_INS_alarm_condition; /* the current FT1 in-service/alarm condition */
|
||||
unsigned char FT1_info_reserved[13]; /* reserved */
|
||||
} FE_INFORMATION_STRUCT;
|
||||
|
||||
/* the shared memory area information structure */
|
||||
typedef struct {
|
||||
GLOBAL_INFORMATION_STRUCT global_info_struct; /* the global information structure */
|
||||
PHY_INFORMATION_STRUCT PHY_info_struct; /* the PHY information structure */
|
||||
INTERRUPT_INFORMATION_STRUCT interrupt_info_struct;/* the interrupt information structure */
|
||||
FE_INFORMATION_STRUCT FE_info_struct; /* the front-end information structure */
|
||||
} SHARED_MEMORY_INFO_STRUCT;
|
||||
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
#undef wan_udphdr_data
|
||||
#define wan_udphdr_data wan_udphdr_u.atm.data
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#undef wan_udp_data
|
||||
#define wan_udp_data wan_udp_hdr.wan_udphdr_u.atm.data
|
||||
#endif
|
||||
|
||||
|
||||
//#define SHARED_MEMORY_INFO_STRUCT void
|
||||
//#define CONFIGURATION_STRUCT PHY_CONFIGURATION_STRUCT
|
||||
//#define INTERRUPT_INFORMATION_STRUCT void
|
||||
#define DATA_RX_STATUS_EL_STRUCT PHY_RX_STATUS_EL_STRUCT
|
||||
#define DATA_TX_STATUS_EL_STRUCT PHY_TX_STATUS_EL_STRUCT
|
||||
#define INT_TRIGGERS_STRUCT PHY_INT_TRIGGERS_STRUCT
|
||||
#define TX_STATUS_EL_CFG_STRUCT PHY_TX_STATUS_EL_CFG_STRUCT
|
||||
#define RX_STATUS_EL_CFG_STRUCT PHY_RX_STATUS_EL_CFG_STRUCT
|
||||
//#define TRACE_STATUS_EL_CFG_STRUCT void
|
||||
//#define TRACE_STATUS_ELEMENT_STRUCT void
|
||||
//#define LINE_TRACE_CONFIG_STRUCT void
|
||||
//#define COMMS_ERROR_STATS_STRUCT void
|
||||
#define OPERATIONAL_STATS_STRUCT PHY_OPERATIONAL_STATS_STRUCT
|
||||
|
||||
#define DFLT_TEMPLATE_VALUE ...
|
||||
|
||||
#define WANCONFIG_FRMW WANCONFIG_ATM
|
||||
|
||||
#define COMMAND_OK OK
|
||||
|
||||
#define APP_INT_ON_TIMER PHY_INT_TIMER
|
||||
#define APP_INT_ON_TX_FRAME PHY_INT_TX
|
||||
#define APP_INT_ON_RX_FRAME PHY_INT_RX
|
||||
#define APP_INT_ON_GLOBAL_EXCEP_COND PHY_INT_GLOBAL_EXCEP_COND
|
||||
#define APP_INT_ON_EXCEP_COND PHY_INT_PHY_EXCEP_COND
|
||||
#define APP_INT_ON_COMMAND_COMPLETE PHY_INT_COMMAND_COMPLETE
|
||||
|
||||
|
||||
#define COMMAND_COMPLETE_APP_INT_PEND PHY_COMMAND_COMPLETE_INT_PEND
|
||||
#define RX_APP_INT_PEND PHY_RX_INT_PEND
|
||||
#define TX_APP_INT_PEND PHY_TX_INT_PEND
|
||||
#define EXCEP_COND_APP_INT_PEND PHY_PHY_EXCEP_COND_INT_PEND
|
||||
#define GLOBAL_EXCEP_COND_APP_INT_PEND PHY_GLOBAL_EXCEP_COND_INT_PEND
|
||||
#define TIMER_APP_INT_PEND PHY_TIMER_INT_PEND
|
||||
#define TRACE_APP_INT_PEND PHY_TRACE_INT_PEND
|
||||
|
||||
#undef READ_CODE_VERSION
|
||||
#define READ_CODE_VERSION PHY_READ_CODE_VERSION
|
||||
|
||||
#undef READ_CONFIGURATION
|
||||
#define READ_CONFIGURATION PHY_READ_CONFIGURATION
|
||||
#define SET_CONFIGURATION PHY_SET_CONFIGURATION
|
||||
|
||||
#define DISABLE_COMMUNICATIONS PHY_DISABLE_COMMUNICATIONS
|
||||
#define ENABLE_COMMUNICATIONS PHY_ENABLE_COMMUNICATIONS
|
||||
|
||||
#define SET_INTERRUPT_TRIGGERS PHY_SET_INTERRUPT_TRIGGERS
|
||||
#define READ_INTERRUPT_TRIGGERS PHY_READ_INTERRUPT_TRIGGERS
|
||||
|
||||
//#define FT1_MONITOR_STATUS_CTRL DFLT_TEMPLATE_VALUE
|
||||
//#define ENABLE_READ_FT1_STATUS DFLT_TEMPLATE_VALUE
|
||||
//#define ENABLE_READ_FT1_OP_STATS DFLT_TEMPLATE_VALUE
|
||||
//#define CPIPE_FT1_READ_STATUS DFLT_TEMPLATE_VALUE
|
||||
//#define TRACE_INACTIVE DFLT_TEMPLATE_VALUE
|
||||
|
||||
//#define READ_GLOBAL_STATISTICS DFLT_TEMPLATE_VALUE
|
||||
//#define READ_MODEM_STATUS DFLT_TEMPLATE_VALUE
|
||||
//#define READ_LINK_STATUS DFLT_TEMPLATE_VALUE
|
||||
//#define READ_COMMS_ERROR_STATS DFLT_TEMPLATE_VALUE
|
||||
//#define READ_TRACE_CONFIGURATION DFLT_TEMPLATE_VALUE
|
||||
//#define GET_TRACE_INFO DFLT_TEMPLATE_VALUE
|
||||
|
||||
enum {
|
||||
FT1_READ_STATUS = WANPIPE_PROTOCOL_PRIVATE,
|
||||
FT1_MONITOR_STATUS_CTRL,
|
||||
ENABLE_READ_FT1_STATUS,
|
||||
ENABLE_READ_FT1_OP_STATS,
|
||||
READ_FT1_OPERATIONAL_STATS,
|
||||
ATM_LINK_STATUS
|
||||
};
|
||||
|
||||
#define ATM_TRACE_CELL 0x01
|
||||
#define ATM_TRACE_PDU 0x02
|
||||
#define ATM_TRACE_DATA 0x04
|
||||
|
||||
#undef READ_OPERATIONAL_STATS
|
||||
#define READ_OPERATIONAL_STATS PHY_READ_OPERATIONAL_STATS
|
||||
//#define SET_TRACE_CONFIGURATION DFLT_TEMPLATE_VALUE
|
||||
//#define TRACE_ACTIVE DFLT_TEMPLATE_VALUE
|
||||
|
||||
#define EXCEP_IRQ_TIMEOUT EXCEP_APP_IRQ_TIMEOUT
|
||||
#define READ_EXCEPTION_CONDITION PHY_READ_EXCEPTION_CONDITION
|
||||
#define EXCEP_LINK_ACTIVE DFLT_TEMPLATE_VALUE
|
||||
#define EXCEP_LINK_INACTIVE_MODEM DFLT_TEMPLATE_VALUE
|
||||
#define EXCEP_LINK_INACTIVE_KPALV DFLT_TEMPLATE_VALUE
|
||||
#define EXCEP_IP_ADDRESS_DISCOVERED DFLT_TEMPLATE_VALUE
|
||||
#define EXCEP_LOOPBACK_CONDITION DFLT_TEMPLATE_VALUE
|
||||
#define NO_EXCEP_COND_TO_REPORT DFLT_TEMPLATE_VALUE
|
||||
|
||||
//#define READ_GLOBAL_EXCEPTION_CONDITION DFLT_TEMPLATE_VALUE
|
||||
//#define EXCEP_MODEM_STATUS_CHANGE DFLT_TEMPLATE_VALUE
|
||||
#define DCD_HIGH 0x08
|
||||
#define CTS_HIGH 0x20
|
||||
|
||||
#define INTERFACE_LEVEL_RS232 PHY_INTERFACE_LEVEL_RS232
|
||||
#define INTERFACE_LEVEL_V35 PHY_INTERFACE_LEVEL_V35
|
||||
|
||||
|
||||
#define MIN_WP_PRI_MTU 1500
|
||||
#define MAX_WP_PRI_MTU MIN_WP_PRI_MTU
|
||||
#define DEFAULT_WP_PRI_MTU MIN_WP_PRI_MTU
|
||||
|
||||
#define ATM_CELL_SIZE 53
|
||||
#define MIN_WP_SEC_MTU 50
|
||||
#define MAX_WP_SEC_MTU PHY_MAX_CELLS_IN_RX_BLOCK*ATM_CELL_SIZE/ATM_OVERHEAD
|
||||
#define DEFAULT_WP_SEC_MTU 1500
|
||||
|
||||
|
||||
/* reasons for enabling the timer interrupt on the adapter */
|
||||
#define TMR_INT_ENABLED_UDP 0x01
|
||||
#define TMR_INT_ENABLED_UPDATE 0x02
|
||||
#define TMR_INT_ENABLED_CONFIG 0x10
|
||||
#define TMR_INT_ENABLED_TE 0x20
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define PRI_BASE_ADDR_MB_STRUCT BASE_ADDR_MB_STRUCT
|
||||
|
||||
extern unsigned char calculate_hec_crc(unsigned char *util_ptr);
|
||||
|
||||
#endif
|
||||
#endif
|
|
@ -0,0 +1,37 @@
|
|||
/*******************************************************************************
|
||||
* ** sdla_b800_remora.h
|
||||
* **
|
||||
* ** Author: David Yat Sin <dyatsin@sangoma.com>
|
||||
* **
|
||||
* ** Copyright: (c) 2005 Sangoma Technologies Inc.
|
||||
* **
|
||||
* ** This program is free software; you can redistribute it and/or
|
||||
* ** modify it under the terms of the GNU General Public License
|
||||
* ** as published by the Free Software Foundation; either version
|
||||
* ** 2 of the License, or (at your option) any later version.
|
||||
* ** ============================================================================
|
||||
* ** Nov , 2008 David Yat Sin Initial version
|
||||
* *******************************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef __SDLA_B800_REMORA_H
|
||||
#define __SDLA_B800_REMORA_H
|
||||
|
||||
|
||||
#define AFT_B800_BASE_REG_OFF 0x0000
|
||||
#define B800_REG_OFF(reg) reg+AFT_B800_BASE_REG_OFF
|
||||
|
||||
#define B800_SPI_REG_RESET_BIT 28
|
||||
#define B800_SPI_REG_READ_ENABLE_BIT 29 /* 1 for read, 0 for write */
|
||||
#define B800_SPI_REG_CHAN_TYPE_FXS_BIT 30 /* 0 for FXO, 1 for FXS */
|
||||
#define B800_SPI_REG_SPI_BUSY_BIT 31 /* 1 busy, 0 ready */
|
||||
#define B800_SPI_REG_START_BIT 31
|
||||
|
||||
#define NUM_B800_ANALOG_PORTS 16
|
||||
|
||||
#define IS_B800(fe) (((sdla_t*)(fe->card))->adptr_type == AFT_ADPTR_B800)
|
||||
#define IS_B800_CARD(card) (card->adptr_type == AFT_ADPTR_B800)
|
||||
|
||||
#endif /* __SDLA_B800_REMORA_H */
|
|
@ -0,0 +1,548 @@
|
|||
/**********************************************************************************
|
||||
* *
|
||||
* BSTRMAPI.H - the 'C' header file for the Sangoma S508/S514 BITSTREAM code API. *
|
||||
* *
|
||||
**********************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _SDLA_BITSTRM_H_
|
||||
#define _SDLA_BITSTRM_H_
|
||||
|
||||
#include <linux/if_wanpipe.h>
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants defining the shared memory control block (mailbox)
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define PRI_BASE_ADDR_MB_STRUCT 0xE000 /* the base address of the mailbox structure (primary port) */
|
||||
#define SEC_BASE_ADDR_MB_STRUCT 0xE800 /* the base address of the mailbox structure (secondary port) */
|
||||
#define NUMBER_MB_RESERVED_BYTES 0x0B /* the number of reserved bytes in the mailbox header area */
|
||||
#define SIZEOF_MB_DATA_BFR 2032 /* the size of the actual mailbox data area */
|
||||
|
||||
#if 0
|
||||
/* the control block mailbox structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* the opp flag */
|
||||
unsigned char command; /* the user command */
|
||||
unsigned short buffer_length; /* the data length */
|
||||
unsigned char return_code; /* the return code */
|
||||
char MB_reserved[NUMBER_MB_RESERVED_BYTES]; /* reserved for later use */
|
||||
char data[SIZEOF_MB_DATA_BFR]; /* the data area */
|
||||
} BSTRM_MAILBOX_STRUCT;
|
||||
#endif
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* global interface commands */
|
||||
#define READ_GLOBAL_EXCEPTION_CONDITION 0x01 /* read a global exception condition from the adapter */
|
||||
#define SET_GLOBAL_CONFIGURATION 0x02 /* set the global operational configuration */
|
||||
#define READ_GLOBAL_CONFIGURATION 0x03 /* read the global configuration */
|
||||
#define READ_GLOBAL_STATISTICS 0x04 /* retrieve the global statistics */
|
||||
#define FLUSH_GLOBAL_STATISTICS 0x05 /* flush the global statistics */
|
||||
#define SET_MODEM_STATUS 0x06 /* set the status of DTR and/or RTS */
|
||||
#define READ_MODEM_STATUS 0x07 /* read the current status of CTS and DCD */
|
||||
#undef READ_COMMS_ERROR_STATS
|
||||
#define READ_COMMS_ERROR_STATS 0x08 /* read the communication error statistics */
|
||||
#undef FLUSH_COMMS_ERROR_STATS
|
||||
#define FLUSH_COMMS_ERROR_STATS 0x09 /* flush the communication error statistics */
|
||||
|
||||
/* BSTRM-level interface commands */
|
||||
#define READ_BSTRM_CODE_VERSION 0x20 /* read the BSTRM code version */
|
||||
#define READ_BSTRM_EXCEPTION_CONDITION 0x21 /* read an BSTRM exception condition from the adapter */
|
||||
#define SET_BSTRM_CONFIGURATION 0x22 /* set the BSTRM configuration */
|
||||
#define READ_BSTRM_CONFIGURATION 0x23 /* read the BSTRM configuration */
|
||||
#define ENABLE_BSTRM_COMMUNICATIONS 0x24 /* enable BSTRM communications */
|
||||
#define DISABLE_BSTRM_COMMUNICATIONS 0x25 /* disable BSTRM communications */
|
||||
#define READ_BSTRM_STATUS 0x26 /* read the BSTRM status */
|
||||
#define READ_BSTRM_OPERATIONAL_STATS 0x27 /* retrieve the BSTRM operational statistics */
|
||||
#define FLUSH_BSTRM_OPERATIONAL_STATS 0x28 /* flush the BSTRM operational statistics */
|
||||
#define SET_BSTRM_INTERRUPT_TRIGGERS 0x30 /* set the BSTRM application interrupt triggers */
|
||||
#define READ_BSTRM_INTERRUPT_TRIGGERS 0x31 /* read the BSTRM application interrupt trigger configuration */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Return codes from interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define OK 0x00 /* the interface command was successful */
|
||||
|
||||
/* return codes from global interface commands */
|
||||
#define NO_GLOBAL_EXCEP_COND_TO_REPORT 0x01 /* there is no BSTRM exception condition to report */
|
||||
#define LGTH_GLOBAL_CFG_DATA_INVALID 0x01 /* the length of the passed global configuration data is invalid */
|
||||
#define IRQ_TIMEOUT_VALUE_INVALID 0x02 /* an invalid application IRQ timeout value was selected */
|
||||
#define ADAPTER_OPERATING_FREQ_INVALID 0x03 /* an invalid adapter operating frequency was selected */
|
||||
#define TRANSMIT_TIMEOUT_INVALID 0x04 /* the block transmit timeout is invalid */
|
||||
|
||||
/* return codes from command READ_GLOBAL_EXCEPTION_CONDITION */
|
||||
#define EXCEP_MODEM_STATUS_CHANGE 0x10 /* a modem status change occurred */
|
||||
#define EXCEP_APP_IRQ_TIMEOUT 0x12 /* an application IRQ timeout has occurred */
|
||||
|
||||
/* return codes from BSTRM-level interface commands */
|
||||
#define NO_BSTRM_EXCEP_COND_TO_REPORT 0x21 /* there is no BSTRM exception condition to report */
|
||||
#define BSTRM_COMMS_DISABLED 0x21 /* communications are not currently enabled */
|
||||
#define BSTRM_COMMS_ENABLED 0x21 /* communications are currently enabled */
|
||||
#define DISABLE_COMMS_BEFORE_CFG 0x21 /* communications must be disabled before setting the configuration */
|
||||
#define ENABLE_BSTRM_COMMS_BEFORE_CONN 0x21 /* communications must be enabled before using the BSTRM_CONNECT conmmand */
|
||||
#define CFG_BEFORE_COMMS_ENABLED 0x22 /* perform a SET_BSTRM_CONFIGURATION before enabling comms */
|
||||
#define LGTH_BSTRM_CFG_DATA_INVALID 0x22 /* the length of the passed configuration data is invalid */
|
||||
#define LGTH_INT_TRIGGERS_DATA_INVALID 0x22 /* the length of the passed interrupt trigger data is invalid */
|
||||
#define INVALID_IRQ_SELECTED 0x23 /* an invalid IRQ was selected in the SET_BSTRM_INTERRUPT_TRIGGERS */
|
||||
#define INVALID_BSTRM_CFG_DATA 0x23 /* the passed configuration data is invalid */
|
||||
#define IRQ_TMR_VALUE_INVALID 0x24 /* an invalid application IRQ timer value was selected */
|
||||
#define T1_E1_AMI_NOT_SUPPORTED 0x25 /* T1/E1 - AMI decoding not supported */
|
||||
#define S514_BOTH_PORTS_SAME_CLK_MODE 0x26 /* S514 - both ports must have the same clocking mode */
|
||||
#define INVALID_BSTRM_COMMAND 0x4F /* the defined BSTRM interface command is invalid */
|
||||
#define COMMAND_INVALID_FOR_PORT 0x50 /* the command is invalid for the selected port */
|
||||
|
||||
/* return codes from command READ_BSTRM_EXCEPTION_CONDITION */
|
||||
#define EXCEP_SYNC_LOST 0x30 /* the BSTRM receiver has lost synchronization */
|
||||
#define EXCEP_SYNC_ACHIEVED 0x31 /* the BSTRM receiver has achieved synchronization */
|
||||
#define EXCEP_RX_DISCARD 0x36 /* an incoming block of data was discarded */
|
||||
#define EXCEP_TX_IDLE 0x37 /* a block was transmitted from the idle buffer */
|
||||
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_GLOBAL_CONFIGURATION/READ_GLOBAL_CONFIGURATION commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global configuration structure */
|
||||
typedef struct {
|
||||
unsigned short adapter_config_options; /* adapter configuration options */
|
||||
unsigned short app_IRQ_timeout; /* application IRQ timeout */
|
||||
unsigned long adapter_operating_frequency; /* adapter operating frequency */
|
||||
} GLOBAL_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'adapter_config_options' */
|
||||
#define ADPTR_CFG_S514 0x0001 /* S514 adapter */
|
||||
|
||||
/* settings for the 'app_IRQ_timeout' */
|
||||
#define MAX_APP_IRQ_TIMEOUT_VALUE 5000 /* the maximum permitted IRQ timeout */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_GLOBAL_STATISTICS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global statistics structure */
|
||||
typedef struct {
|
||||
unsigned short app_IRQ_timeout_count; /* application IRQ timeout count */
|
||||
} GLOBAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_BSTRM_EXCEPTION_CONDITION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the structure returned on a return code EXCEP_RX_DISCARD and EXCEP_TX_IDLE */
|
||||
typedef struct {
|
||||
unsigned long Rx_discard_count; /* number of incoming blocks discarded */
|
||||
unsigned long Tx_idle_count; /* number of Tx blocks transmitted from the idle code buffer (T1/E1) */
|
||||
} RX_DISC_TX_IDLE_EXCEP_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_COMMS_ERROR_STATS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the communications error statistics structure */
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count; /* receiver overrun error count */
|
||||
unsigned short Rx_dis_pri_bfrs_full_count; /* receiver disabled count */
|
||||
unsigned short pri_missed_Tx_DMA_int_count; /* primary port - missed Tx DMA interrupt count */
|
||||
unsigned short sync_lost_count; /* synchronization lost count */
|
||||
unsigned short sync_achieved_count; /* synchronization achieved count */
|
||||
unsigned short P0_T1_E1_sync_failed_count; /* T1/E1 synchronization failure count */
|
||||
unsigned short reserved_1; /* reserved for later use */
|
||||
unsigned short DCD_state_change_count; /* DCD state change count */
|
||||
unsigned short CTS_state_change_count; /* CTS state change count */
|
||||
} COMMS_ERROR_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_BSTRM_CONFIGURATION/READ_BSTRM_CONFIGURATION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the BSTRM configuration structure */
|
||||
typedef struct {
|
||||
unsigned long baud_rate; /* the baud rate */
|
||||
unsigned short line_config_options; /* line configuration options */
|
||||
unsigned short modem_config_options; /* modem configuration options */
|
||||
unsigned short modem_status_timer; /* timer for monitoring modem status changes */
|
||||
unsigned short API_options; /* API options */
|
||||
unsigned short SYNC_options; /* sync options */
|
||||
unsigned short Rx_sync_char; /* receive sync character */
|
||||
unsigned char monosync_Tx_time_fill_char; /* transmit time fill character (monosync mode) */
|
||||
unsigned short buffer_options; /* Tx/Rx buffer options */
|
||||
unsigned short max_length_Tx_data_block; /* the maximum length of a Tx data block */
|
||||
unsigned short Rx_complete_length; /* length of receive block */
|
||||
unsigned short Rx_complete_timer; /* the Rx completion timer */
|
||||
unsigned short statistics_options; /* operational statistics options */
|
||||
unsigned long ptr_shared_mem_info_struct; /* a pointer to the shared memory area information structure */
|
||||
unsigned long ptr_Tx_stat_el_cfg_struct; /* a pointer to the transmit status element configuration structure */
|
||||
unsigned long ptr_Rx_stat_el_cfg_struct; /* a pointer to the receive status element configuration structure */
|
||||
} BSTRM_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'line_config_options' */
|
||||
#define INTERFACE_LEVEL_V35 0x0000 /* V.35 interface level */
|
||||
|
||||
#define INTERFACE_LEVEL_RS232 0x0001 /* RS-232 interface level */
|
||||
|
||||
#define NRZI_ENCODING 0x0010 /* NRZI data encoding */
|
||||
|
||||
/* settings for the 'modem_config_options' */
|
||||
#define DONT_RAISE_DTR_RTS_ON_EN_COMMS 0x0001 /* don't automatically raise DTR and RTS when performing an */
|
||||
/* ENABLE_BSTRM_COMMUNICATIONS command */
|
||||
#define DONT_REPORT_CHG_IN_MODEM_STAT 0x0002 /* don't report changes in modem status to the application */
|
||||
|
||||
/* settings for the 'API_options' */
|
||||
#define MANUAL_RESYNC_AFTER_SYNC_LOSS 0x0001 /* manual re-synchronization after synchronization loss */
|
||||
#define PERMIT_APP_INT_TX_RX_BFR_ERR 0x0002 /* permit a BSTRM exception condition interrupt on a Tx or Rx */
|
||||
/* buffer error */
|
||||
|
||||
/* settings for the 'SYNC_options' */
|
||||
#define MONOSYNC_8_BIT_SYNC 0x0001 /* monosync, 8-bit sync character */
|
||||
#define MONOSYNC_6_BIT_SYNC 0x0002 /* monosync, 6-bit sync character */
|
||||
#define BISYNC_16_BIT_SYNC 0x0004 /* bisync, 16-bit sync character */
|
||||
#define BISYNC_12_BIT_SYNC 0x0008 /* bisync, 12-bit sync character */
|
||||
#define EXTERNAL_SYNC_8_BIT_TIME_FILL 0x0010 /* external sync, 8-bit sync character */
|
||||
#define EXTERNAL_SYNC_6_BIT_TIME_FILL 0x0020 /* external sync, 6-bit sync character */
|
||||
#define SYNC_CHAR_LOAD_INHIBIT 0x0100 /* inhibit loading of the received sync character */
|
||||
/* ??????????????wwwwwww */
|
||||
#define T1_E1_ENABLE_TX_ALIGN_CHECK 0x1000 /* T1/E1 - enable checking of the transmit channel alignment */
|
||||
|
||||
/* bit settings for the 'buffer_options' */
|
||||
#define TX_ONLY 0x0001 /* transmit only for this port (no reception) */
|
||||
#define RX_ONLY 0x0002 /* receive only for this port (no transmission) */
|
||||
#define SINGLE_TX_BUFFER 0x0010 /* configure a single transmit buffer */
|
||||
#define SEC_DMA_RX 0x0100 /* secondary port - configure for high speed DMA receive mode */
|
||||
|
||||
/* settings for the 'statistics_options' */
|
||||
#define TX_DATA_BYTE_COUNT_STAT 0x0001 /* record the number of data bytes transmitted */
|
||||
#define RX_DATA_BYTE_COUNT_STAT 0x0002 /* record the number of data bytes received */
|
||||
#define TX_THROUGHPUT_STAT 0x0004 /* compute the data transmit throughput */
|
||||
#define RX_THROUGHPUT_STAT 0x0008 /* compute the data receive throughput */
|
||||
|
||||
/* permitted minimum and maximum values for setting the BSTRM configuration */
|
||||
#define PRI_MAX_BAUD_RATE_S508 2666666 /* primary port - maximum baud rate (S508) */
|
||||
#define SEC_MAX_BAUD_RATE_S508 258064 /* secondary port - maximum baud rate (S508) */
|
||||
#define PRI_MAX_BAUD_RATE_S514 2750000 /* primary port - maximum baud rate (S514) */
|
||||
#define SEC_MAX_BAUD_RATE_S514 515625 /* secondary port - maximum baud rate (S514) */
|
||||
#define MIN_PERMITTED_MODEM_TIMER 0 /* minimum modem status timer */
|
||||
#define MAX_PERMITTED_MODEM_TIMER 5000 /* maximum modem status timer */
|
||||
#define PRI_MAX_LENGTH_TX_DATA_BLOCK 4096 /* primary port - maximum length of the Tx data block */
|
||||
#define SEC_MAX_LENGTH_TX_DATA_BLOCK 2048 /* secondary port - maximum length of the Tx data block */
|
||||
#define MAX_RX_COMPLETE_LENGTH 4096 /* the maximum length of receive data block */
|
||||
#define MAX_RX_COMPLETE_TIMER 60000 /* the maximum Rx completion timer value */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_BSTRM_STATUS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the BSTRM status structure */
|
||||
typedef struct {
|
||||
unsigned char sync_status; /* synchronization status */
|
||||
unsigned char BSTRM_excep_conditions; /* BSTRM exception conditions */
|
||||
unsigned char no_Rx_data_blocks_avail; /* number of Rx data blocks available for the application */
|
||||
unsigned char receiver_status; /* receiver status (enabled/disabled) */
|
||||
} READ_BSTRM_STATUS_STRUCT;
|
||||
|
||||
/* settings for the 'sync_status' variable */
|
||||
#define SYNC_LOST 0x01
|
||||
#define SYNC_ACHIEVED 0x02
|
||||
|
||||
/* settings for the 'receiver_status' variable */
|
||||
#define RCVR_NOT_DISCARD 0x00 /* receiver not discarding incoming blocks */
|
||||
#define RCVR_DISCARD 0x01 /* receiver discarding incoming blocks */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_BSTRM_OPERATIONAL_STATS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the BSTRM operational statistics structure */
|
||||
typedef struct {
|
||||
|
||||
/* data transmission statistics */
|
||||
unsigned long blocks_Tx_count; /* number of blocks transmitted */
|
||||
unsigned long bytes_Tx_count; /* number of bytes transmitted */
|
||||
unsigned long Tx_throughput; /* transmit throughput */
|
||||
unsigned long no_ms_for_Tx_thruput_comp; /* millisecond time used for the Tx throughput computation */
|
||||
unsigned long Tx_idle_count; /* number of times the transmitter reverted to the idle line condition (serial) OR */
|
||||
/* number of Tx blocks transmitted from the idle code buffer (T1/E1) */
|
||||
unsigned long Tx_discard_lgth_err_count; /* number of Tx blocks discarded (length error) */
|
||||
unsigned long reserved_Tx_stat0; /* reserved for later use */
|
||||
unsigned long reserved_Tx_stat1; /* reserved for later use */
|
||||
unsigned long reserved_Tx_stat2; /* reserved for later use */
|
||||
|
||||
/* data reception statistics */
|
||||
unsigned long blocks_Rx_count; /* number of blocks received */
|
||||
unsigned long bytes_Rx_count; /* number of bytes received */
|
||||
unsigned long Rx_throughput; /* receive throughput */
|
||||
unsigned long no_ms_for_Rx_thruput_comp; /* millisecond time used for the Rx throughput computation */
|
||||
unsigned long Rx_discard_count; /* number of incoming blocks discarded */
|
||||
unsigned long reserved_Rx_stat1; /* reserved for later use */
|
||||
unsigned long reserved_Rx_stat2; /* reserved for later use */
|
||||
|
||||
} BSTRM_OPERATIONAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for using application interrupts
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the structure used for the SET_BSTRM_INTERRUPT_TRIGGERS/READ_BSTRM_INTERRUPT_TRIGGERS command */
|
||||
typedef struct {
|
||||
unsigned char BSTRM_interrupt_triggers; /* BSTRM interrupt trigger configuration */
|
||||
unsigned char IRQ; /* IRQ to be used */
|
||||
unsigned short interrupt_timer; /* interrupt timer */
|
||||
unsigned short misc_interrupt_bits; /* miscellaneous interrupt bits */
|
||||
} BSTRM_INT_TRIGGERS_STRUCT;
|
||||
|
||||
/* 'BSTRM_interrupt_triggers' bit settings */
|
||||
#define APP_INT_ON_RX_BLOCK 0x01 /* interrupt on data block reception */
|
||||
#define APP_INT_ON_TX_BLOCK 0x02 /* interrupt when an data block may be transmitted */
|
||||
#define APP_INT_ON_COMMAND_COMPLETE 0x04 /* interrupt when an interface command is complete */
|
||||
#define APP_INT_ON_TIMER 0x08 /* interrupt on a defined millisecond timeout */
|
||||
#define APP_INT_ON_GLOBAL_EXCEP_COND 0x10 /* interrupt on a global exception condition */
|
||||
#define APP_INT_ON_BSTRM_EXCEP_COND 0x20 /* interrupt on an BSTRM exception condition */
|
||||
|
||||
/* 'interrupt_timer' limitation */
|
||||
#define MAX_INTERRUPT_TIMER_VALUE 60000 /* the maximum permitted timer interrupt value */
|
||||
|
||||
/* interrupt types indicated at 'interrupt_type' byte of the INTERRUPT_INFORMATION_STRUCT */
|
||||
#define NO_APP_INTS_PEND 0x00 /* no interrups are pending */
|
||||
#define RX_APP_INT_PEND 0x01 /* a receive interrupt is pending */
|
||||
#define TX_APP_INT_PEND 0x02 /* a transmit interrupt is pending */
|
||||
#define COMMAND_COMPLETE_APP_INT_PEND 0x04 /* a 'command complete' interrupt is pending */
|
||||
#define TIMER_APP_INT_PEND 0x08 /* a timer interrupt is pending */
|
||||
#define GLOBAL_EXCEP_COND_APP_INT_PEND 0x10 /* a global exception condition interrupt is pending */
|
||||
#define BSTRM_EXCEP_COND_APP_INT_PEND 0x20 /* an BSTRM exception condition interrupt is pending */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for data block transmission
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the data block transmit status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Tx_status_elements; /* number of transmit status elements */
|
||||
unsigned long base_addr_Tx_status_elements; /* base address of the transmit element list */
|
||||
unsigned long next_Tx_status_element_to_use; /* pointer to the next transmit element to be used */
|
||||
} BSTRM_TX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the data block transmit status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* opp flag */
|
||||
unsigned short block_length; /* length of the block to be transmitted */
|
||||
unsigned char misc_Tx_bits; /* miscellaneous transmit bits */
|
||||
unsigned short Tx_time_fill_char; /* transmit time fill character */
|
||||
unsigned short reserved_0; /* reserved for internal use */
|
||||
unsigned long reserved_1; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr; /* pointer to the data area */
|
||||
} BSTRM_DATA_TX_STATUS_EL_STRUCT;
|
||||
|
||||
/* settings for the 'misc_Tx_bits' */
|
||||
#define UPDATE_TX_TIME_FILL_CHAR 0x01 /* update the transmit time fill character */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for data block reception
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the data block receive status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Rx_status_elements; /* number of receive status elements */
|
||||
unsigned long base_addr_Rx_status_elements; /* base address of the receive element list */
|
||||
unsigned long next_Rx_status_element_to_use; /* pointer to the next receive element to be used */
|
||||
} BSTRM_RX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the data block receive status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* opp flag */
|
||||
unsigned short block_length; /* length of the received block */
|
||||
unsigned char error_flag; /* block errors */
|
||||
unsigned short time_stamp; /* receive time stamp */
|
||||
unsigned long reserved_0; /* reserved for internal use */
|
||||
unsigned short reserved_1; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr; /* pointer to the data area */
|
||||
} BSTRM_DATA_RX_STATUS_EL_STRUCT;
|
||||
|
||||
/* settings for the 'error_flag' */
|
||||
#define RX_OVERRUN_ERROR 0x04 /* the incoming block has an overrun error */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants defining the shared memory information area
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global information structure */
|
||||
typedef struct {
|
||||
unsigned char global_status; /* global status */
|
||||
unsigned char modem_status; /* current modem status */
|
||||
unsigned char global_excep_conditions; /* global exception conditions */
|
||||
unsigned char Rx_disabled_Rx_bfrs_full; /* receiver disabled */
|
||||
unsigned char glob_info_reserved[4]; /* reserved */
|
||||
unsigned char code_name[4]; /* code name */
|
||||
unsigned char code_version[4]; /* code version */
|
||||
} GLOBAL_INFORMATION_STRUCT;
|
||||
|
||||
/* the BSTRM information structure */
|
||||
typedef struct {
|
||||
unsigned char sync_status; /* synchronization status */
|
||||
unsigned char BSTRM_excep_conditions; /* BSTRM exception conditions */
|
||||
unsigned char no_Rx_data_blocks_avail; /* number of Rx data blocks available for the application */
|
||||
unsigned long Rx_discard_count; /* number of incoming blocks discarded */
|
||||
unsigned long Tx_idle_count; /* number of Tx blocks transmitted from the idle code buffer (T1/E1) */
|
||||
unsigned char BSTRM_info_reserved[5]; /* reserved */
|
||||
} BSTRM_INFORMATION_STRUCT;
|
||||
|
||||
/* the interrupt information structure */
|
||||
typedef struct {
|
||||
unsigned char interrupt_type; /* type of interrupt triggered */
|
||||
unsigned char interrupt_permission; /* interrupt permission mask */
|
||||
unsigned char int_info_reserved[14]; /* reserved */
|
||||
} INTERRUPT_INFORMATION_STRUCT;
|
||||
|
||||
/* the FT1 information structure */
|
||||
typedef struct {
|
||||
unsigned char parallel_port_A_input; /* input - parallel port A */
|
||||
unsigned char parallel_port_B_input; /* input - parallel port B */
|
||||
unsigned char FT1_INS_alarm_condition; /* the current FT1 in-service/alarm condition */
|
||||
unsigned char FT1_info_reserved[13]; /* reserved */
|
||||
} FT1_INFORMATION_STRUCT;
|
||||
|
||||
/* settings for the 'FT1_INS_alarm_condition' */
|
||||
#define BITSTRM_FT1_IN_SERVICE 0x00 /* the FT1 is in-service */
|
||||
#define BITSTRM_BLUE_ALARM 'B' /* blue alarm condition */
|
||||
#define BITSTRM_YELLOW_ALARM 'Y' /* yellow alarm condition */
|
||||
#define BITSTRM_RED_ALARM 'R' /* red alarm condition */
|
||||
|
||||
/* the shared memory area information structure */
|
||||
typedef struct {
|
||||
GLOBAL_INFORMATION_STRUCT global_info_struct; /* the global information structure */
|
||||
BSTRM_INFORMATION_STRUCT BSTRM_info_struct; /* the BSTRM information structure */
|
||||
INTERRUPT_INFORMATION_STRUCT interrupt_info_struct;/* the interrupt information structure */
|
||||
FT1_INFORMATION_STRUCT FT1_info_struct; /* the FT1 information structure */
|
||||
} SHARED_MEMORY_INFO_STRUCT;
|
||||
|
||||
|
||||
/* Special UDP drivers management commands */
|
||||
#define BPIPE_ROUTER_UP_TIME WANPIPEMON_ROUTER_UP_TIME
|
||||
#define BPIPE_ENABLE_TRACING WANPIPEMON_ENABLE_TRACING
|
||||
#define BPIPE_DISABLE_TRACING WANPIPEMON_DISABLE_TRACING
|
||||
#define BPIPE_GET_TRACE_INFO WANPIPEMON_GET_TRACE_INFO
|
||||
|
||||
#define CPIPE_GET_IBA_DATA WANPIPEMON_GET_IBA_DATA
|
||||
|
||||
#define BPIPE_FT1_READ_STATUS WANPIPEMON_DRIVER_STAT_IFSEND
|
||||
#define BPIPE_DRIVER_STAT_IFSEND WANPIPEMON_DRIVER_STAT_IFSEND
|
||||
#define BPIPE_DRIVER_STAT_INTR WANPIPEMON_DRIVER_STAT_INTR
|
||||
#define BPIPE_DRIVER_STAT_GEN WANPIPEMON_DRIVER_STAT_GEN
|
||||
#define BPIPE_FLUSH_DRIVER_STATS WANPIPEMON_FLUSH_DRIVER_STATS
|
||||
|
||||
|
||||
|
||||
/* modem status changes */
|
||||
#define DCD_HIGH 0x08
|
||||
#define CTS_HIGH 0x20
|
||||
|
||||
#ifdef UDPMGMT_SIGNATURE
|
||||
#undef UDPMGMT_SIGNATURE
|
||||
#define UDPMGMT_SIGNATURE "BTPIPEAB"
|
||||
#endif
|
||||
/* valid ip_protocol for UDP management */
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
|
||||
enum {
|
||||
SIOC_WANPIPE_BITSTRM_T1E1_CFG = SIOC_WANPIPE_PIPEMON + 1,
|
||||
SIOC_CUSTOM_BITSTRM_COMMANDS,
|
||||
|
||||
SIOC_WRITE_RBS_SIG = SIOC_WANPIPE_DEVPRIVATE,
|
||||
SIOC_READ_RBS_SIG
|
||||
};
|
||||
|
||||
enum {
|
||||
COMMS_ALREADY_ENABLED=1,
|
||||
COMMS_ALREADY_DISABLED,
|
||||
IF_IN_DISCONNECED_STATE,
|
||||
FRONT_END_IN_DISCONNECTED_STATE
|
||||
};
|
||||
|
||||
|
||||
typedef struct{
|
||||
unsigned char control_code;
|
||||
unsigned short reg;
|
||||
unsigned char bit_number;
|
||||
}custom_control_call_t;
|
||||
|
||||
//values for 'control_code'
|
||||
enum {
|
||||
SET_BIT_IN_PMC_REGISTER,
|
||||
RESET_BIT_IN_PMC_REGISTER
|
||||
};
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define OPERATE_T1E1_AS_SERIAL 0x8000 /* For bitstreaming only
|
||||
* Allow the applicatoin to
|
||||
* E1 front end */
|
||||
|
||||
|
||||
static inline void bstrm_skb_queue_purge(struct sk_buff_head *list)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
while ((skb=skb_dequeue(list))!=NULL)
|
||||
dev_kfree_skb_any(skb);
|
||||
}
|
||||
|
||||
static inline void bstrm_test_rx_tx_discard (sdla_t *card)
|
||||
{
|
||||
unsigned long cnt;
|
||||
card->hw_iface.peek(card->hw, card->u.b.rx_discard_off,
|
||||
&cnt,sizeof(unsigned long));
|
||||
if (cnt){
|
||||
DEBUG_EVENT("%s: Error: Rx discard cnt %lu\n",
|
||||
card->devname,cnt);
|
||||
cnt=0;
|
||||
card->hw_iface.poke(card->hw, card->u.b.rx_discard_off,
|
||||
&cnt,sizeof(unsigned long));
|
||||
}
|
||||
|
||||
card->hw_iface.peek(card->hw, card->u.b.rx_discard_off,
|
||||
&cnt,sizeof(unsigned long));
|
||||
if (cnt){
|
||||
DEBUG_EVENT("%s: Error: Tx idle cnt %lu\n",
|
||||
card->devname,cnt);
|
||||
cnt=0;
|
||||
card->hw_iface.poke(card->hw, card->u.b.tx_idle_off,
|
||||
&cnt,sizeof(unsigned long));
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
|
@ -0,0 +1,389 @@
|
|||
/***************************************************************************
|
||||
* sdla_bri.h Sangoma ISDN-BRI definitions (for Cologne XHFC-2SU chip).
|
||||
*
|
||||
* Author(s): David Rokhvarg <davidr@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1984 - 2007 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* ============================================================================
|
||||
* February 14, 2007 David Rokhvarg
|
||||
* v1.0 Initial version.
|
||||
*
|
||||
* February 26, 2008 David Rokhvarg
|
||||
* v1.1 Imrovements in SU State transition code.
|
||||
* Implemented T3 and T4 timers.
|
||||
*
|
||||
* July 21 2009 David Rokhvarg
|
||||
* v1.4 Implemented T1 timer for NT.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __SDLA_BRI_H
|
||||
# define __SDLA_BRI_H
|
||||
|
||||
|
||||
#include "xhfc24succ.h"
|
||||
|
||||
/*******************************************************************************
|
||||
** DEFINES and MACROS
|
||||
*******************************************************************************/
|
||||
|
||||
#define IS_BRI_CARD(card) IS_BRI_FEMEDIA(&(card)->fe)
|
||||
|
||||
#define BRI_FE_CFG(fe_cfg) (fe_cfg.cfg.bri)
|
||||
|
||||
#define BRI_FE_CLK(fe_cfg) BRI_FE_CFG(fe_cfg).clock_mode
|
||||
|
||||
#define BRI_CARD_CLK(card) BRI_FE_CLK(card->fe.fe_cfg)
|
||||
|
||||
#define WAN_BRI_START_CHANNEL 1
|
||||
|
||||
#define MAX_BRI_REMORAS 4
|
||||
#define MAX_BRI_MODULES_PER_REMORA 3
|
||||
|
||||
/*
|
||||
Maximum of 4 remoras, 3 modules on each - maximum 12 modules.
|
||||
On each module there is 1 dual-port ISDN BRI chip.
|
||||
On each line there are 2 B-channels and 1 D-channel.
|
||||
*/
|
||||
#define MAX_BRI_MODULES 12
|
||||
#define MAX_BRI_CHANNELS 2 /* Number of channels per device */
|
||||
#define MAX_BRI_LINES (MAX_BRI_MODULES*MAX_BRI_CHANNELS)
|
||||
#define A700_MAX_BRI_LINES 4
|
||||
|
||||
/*
|
||||
The maximum number of BRI timeslots is 32.
|
||||
This is needed for the d-chan, which is always at the otherwise unused timeslot 31.
|
||||
But AFT hardware is actually using only 24 timeslots - only for the b-chans.
|
||||
*/
|
||||
#define MAX_TIMESLOTS 32
|
||||
#define BRI_DCHAN_LOGIC_CHAN 31
|
||||
|
||||
#define BRI_DCHAN_ACTIVE_CFG_CHAN 2
|
||||
|
||||
#define MAX_BRI_TIMESLOTS 3 /* this is the number of b-chans (2) and the d-chan on one BRI line */
|
||||
|
||||
#define MAX_TENT_CHANNELS MAX_BRI_MODULES
|
||||
|
||||
#define MOD_TYPE_NONE 0 /* corresponds to module which is not installed */
|
||||
#define MOD_TYPE_NT 1
|
||||
#define MOD_TYPE_TE 2
|
||||
#define MOD_TYPE_TEST 3
|
||||
|
||||
#define WP_BRI_DECODE_MOD_TYPE(type) \
|
||||
(type == MOD_TYPE_NT) ? "NT" : \
|
||||
(type == MOD_TYPE_TE) ? "TE" : "Unknown"
|
||||
|
||||
/* SPI interface */
|
||||
#define SPI_INTERFACE_REG 0x54
|
||||
#define SPI_MAX_RETRY_COUNT 10
|
||||
|
||||
#define MOD_SPI_RESET 0x40000000
|
||||
#define MOD_SPI_BUSY 0x80000000
|
||||
#define MOD_SPI_V3_STAT 0x08000000 /* bit 27 used as START in version 1-2-3 */
|
||||
#define MOD_SPI_START 0x08000000
|
||||
|
||||
#define BRI_FE_MAGIC 0x150D
|
||||
|
||||
#define WAN_BRI_OPERMODE_LEN 20
|
||||
|
||||
#if !defined(__WINDOWS__)
|
||||
/* Front-End UDP command */
|
||||
#define WAN_FE_TONES (WAN_FE_UDP_CMD_START + 0)
|
||||
#define WAN_FE_RING (WAN_FE_UDP_CMD_START + 1)
|
||||
#define WAN_FE_REGDUMP (WAN_FE_UDP_CMD_START + 2)
|
||||
#define WAN_FE_STATS (WAN_FE_UDP_CMD_START + 3)
|
||||
|
||||
#define WAN_BRI_SET_ECHOTUNE _IOW (ZT_CODE, 63, struct wan_bri_echo_coefs)
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
** XHFC definitions
|
||||
*******************************************************************************/
|
||||
|
||||
/* max. number of S/U ports per XHFC-2SU controller */
|
||||
#define BRI_MAX_PORTS_PER_CHIP 2
|
||||
#define PORT_0 0
|
||||
#define PORT_1 1
|
||||
|
||||
/* flags in _u16 port mode */
|
||||
#define PORT_UNUSED 0x0000
|
||||
#define PORT_MODE_NT 0x0001
|
||||
#define PORT_MODE_TE 0x0002
|
||||
#define PORT_MODE_S0 0x0004
|
||||
#define PORT_MODE_UP 0x0008
|
||||
#define PORT_MODE_EXCH_POL 0x0010
|
||||
#define PORT_MODE_LOOP 0x0020
|
||||
#define NT_TIMER 0x8000
|
||||
|
||||
/* NT / TE defines */
|
||||
#define CLK_DLY_TE 0x0e /* CLKDEL in TE mode */
|
||||
#define CLK_DLY_NT 0x6c /* CLKDEL in NT mode */
|
||||
#define STA_ACTIVATE 0x60 /* start activation in A_SU_WR_STA */
|
||||
#define STA_DEACTIVATE 0x40 /* start deactivation in A_SU_WR_STA */
|
||||
#define LIF_MODE_NT 0x04 /* Line Interface NT mode */
|
||||
|
||||
#define XHFC_TIMER_T3 8000 /* 8s activation timer T3 */
|
||||
#define XHFC_TIMER_T4 500 /* 500ms deactivation timer T4 */
|
||||
|
||||
#define XHFC_TIMER_T1 10000 /* 10s de-activation timer T1 */
|
||||
|
||||
/* xhfc Layer1 physical commands */
|
||||
#define HFC_L1_ACTIVATE_TE 0x01
|
||||
#define HFC_L1_FORCE_DEACTIVATE_TE 0x02
|
||||
#define HFC_L1_ACTIVATE_NT 0x03
|
||||
#define HFC_L1_DEACTIVATE_NT 0x04
|
||||
#define HFC_L1_ENABLE_LOOP_B1 0x05
|
||||
#define HFC_L1_ENABLE_LOOP_B2 0x06
|
||||
#define HFC_L1_DISABLE_LOOP_B1 0x07
|
||||
#define HFC_L1_DISABLE_LOOP_B2 0x08
|
||||
|
||||
/* xhfc Layer1 Flags (stored in bri_xhfc_port_t->l1_flags) */
|
||||
#define HFC_L1_ACTIVATING 1
|
||||
#define HFC_L1_ACTIVATED 2
|
||||
#define HFC_L1_DEACTTIMER 4
|
||||
#define HFC_L1_ACTTIMER 8
|
||||
|
||||
/* Layer1 timer Flags (stored in bri_xhfc_port_t->timer_flags) */
|
||||
/* TE timer flags. bits 1-8 */
|
||||
#define T3_TIMER_ACTIVE 1
|
||||
#define T4_TIMER_ACTIVE 2
|
||||
#define T3_TIMER_EXPIRED 3
|
||||
/* NT timer flags. bits 9-16 */
|
||||
#define T1_TIMER_ACTIVE 9
|
||||
#define T1_TIMER_EXPIRED 10
|
||||
|
||||
#define FIFO_MASK_TX 0x55555555
|
||||
#define FIFO_MASK_RX 0xAAAAAAAA
|
||||
|
||||
|
||||
#ifndef MAX_DFRAME_LEN_L1
|
||||
#define MAX_DFRAME_LEN_L1 300
|
||||
#endif
|
||||
|
||||
#define USE_F0_COUNTER 1 /* akkumulate F0 counter diff every irq */
|
||||
#define TRANSP_PACKET_SIZE 0 /* minium tranparent packet size for transmittion to upper layer */
|
||||
|
||||
typedef struct sdla_bri_cfg_ {
|
||||
int not_used;
|
||||
int opermode;
|
||||
char opermode_name[WAN_BRI_OPERMODE_LEN];
|
||||
/* int tdmv_law;*/ /* WAN_TDMV_ALAW or WAN_TDMV_MULAW */
|
||||
char clock_mode;
|
||||
} sdla_bri_cfg_t;
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
#if !defined(WAN_DEBUG_FE)
|
||||
|
||||
/* no debugging info compiled */
|
||||
/* NT/TE */
|
||||
# define WRITE_BRI_REG(mod_no,reg,val) \
|
||||
fe->write_fe_reg( fe->card, \
|
||||
(int)mod_no, \
|
||||
(int)fe->bri_param.mod[mod_no].type, \
|
||||
(int)reg, \
|
||||
(int)val)
|
||||
|
||||
# define READ_BRI_REG(mod_no,reg) \
|
||||
fe->read_fe_reg( fe->card, \
|
||||
(int)mod_no, \
|
||||
(int)fe->bri_param.mod[mod_no].type, \
|
||||
(int)0, \
|
||||
(int)reg)
|
||||
|
||||
#else
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
# pragma message("WAN_DEBUG_FE - Debugging Defined")
|
||||
#else
|
||||
# warning "WAN_DEBUG_FE - Debugging Defined"
|
||||
#endif
|
||||
|
||||
/* NT/TE */
|
||||
# define WRITE_BRI_REG(mod_no,reg,val) \
|
||||
fe->write_fe_reg( fe->card, \
|
||||
(int)mod_no, \
|
||||
(int)fe->bri_param.mod[mod_no].type, \
|
||||
(int)reg, (int)val,__FILE__,(int)__LINE__)
|
||||
|
||||
# define READ_BRI_REG(mod_no,reg) \
|
||||
fe->read_fe_reg( fe->card, \
|
||||
(int)mod_no, \
|
||||
(int)fe->bri_param.mod[mod_no].type, \
|
||||
(int)0, \
|
||||
(int)reg,__FILE__,(int)__LINE__)
|
||||
|
||||
#endif/* #if !defined(WAN_DEBUG_FE) */
|
||||
|
||||
#define __READ_BRI_REG(mod_no,reg) \
|
||||
fe->__read_fe_reg( fe->card, \
|
||||
(int)mod_no, \
|
||||
(int)fe->bri_param.mod[mod_no].type, \
|
||||
(int)0, \
|
||||
(int)reg)
|
||||
|
||||
|
||||
/***************************************************************/
|
||||
/* port struct for each S/U port */
|
||||
typedef struct {
|
||||
u_int8_t idx; /* port idx in hw->port[idx] */
|
||||
void *hw; /* back pointer to 'wp_bri_module_t' */
|
||||
u_int16_t mode; /* NT/TE / ST/U */
|
||||
u_int32_t l1_flags;
|
||||
u_int32_t timer_flags;
|
||||
|
||||
int drx_indx;
|
||||
int dtx_indx, bytes2transmit;
|
||||
u_int8_t drxbuf[MAX_DFRAME_LEN_L1];
|
||||
u_int8_t dtxbuf[MAX_DFRAME_LEN_L1];
|
||||
|
||||
/* layer1 ISDN timers */
|
||||
/* TE timers */
|
||||
wan_timer_t t3_timer;
|
||||
wan_timer_t t4_timer;
|
||||
/* NT timers */
|
||||
wan_timer_t t1_timer;
|
||||
|
||||
/* chip registers */
|
||||
reg_a_su_rd_sta su_state;
|
||||
reg_a_su_ctrl0 su_ctrl0;
|
||||
reg_a_su_ctrl1 su_ctrl1;
|
||||
reg_a_su_ctrl2 su_ctrl2;
|
||||
reg_a_st_ctrl3 st_ctrl3;
|
||||
|
||||
/* DavidR */
|
||||
reg_a_sl_cfg sl_cfg;/* for data direction programming on pins STIO1 and STIO2 */
|
||||
|
||||
u_int32_t clock_routing_state, clock_routing_counter;
|
||||
|
||||
u_int32_t l1_state;/* BRI L1 current state of the line */
|
||||
int nt_timer;
|
||||
} bri_xhfc_port_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** TYPEDEF STRUCTURE
|
||||
*******************************************************************************/
|
||||
typedef struct {
|
||||
unsigned int mod_no;
|
||||
/* Both ports of a module will always be in the
|
||||
SAME mode - TE or NT. */
|
||||
int type;
|
||||
unsigned long events;
|
||||
|
||||
/* TDM Voice applications */
|
||||
int sig;
|
||||
|
||||
/**********************************/
|
||||
int num_ports; /* number of S and U interfaces */
|
||||
int max_fifo; /* always 4 fifos per port */
|
||||
u_int8_t max_z; /* fifo depth -1 */
|
||||
|
||||
u32 fifo_irqmsk;
|
||||
|
||||
bri_xhfc_port_t port[BRI_MAX_PORTS_PER_CHIP]; /* 2 ports - one for each Line intercace */
|
||||
|
||||
u_int32_t irq_cnt; /* count irqs */
|
||||
u_int32_t f0_cnt; /* last F0 counter value */
|
||||
u_int32_t f0_akku; /* akkumulated f0 counter deltas */
|
||||
|
||||
/* chip registers */
|
||||
reg_r_pcm_md0 pcm_md0;
|
||||
reg_r_pcm_md1 pcm_md1;
|
||||
/**********************************/
|
||||
|
||||
void *fe; /* pointer back to 'sdla_fe_t' */
|
||||
|
||||
u32 initialization_complete;
|
||||
|
||||
} wp_bri_module_t;
|
||||
|
||||
typedef struct {
|
||||
/* u_int16_t type; */
|
||||
unsigned int mod_no; /* A500 - ISDN BRI Remora */
|
||||
unsigned char ec_dtmf_port; /* EC DTMF: SOUT or ROUT */
|
||||
unsigned long ts_map;
|
||||
u_int8_t tone;
|
||||
} sdla_bri_event_t;
|
||||
|
||||
typedef struct sdla_bri_param {
|
||||
int not_used;
|
||||
|
||||
/* each module has 2 lines, */
|
||||
wp_bri_module_t mod[MAX_BRI_LINES];
|
||||
/*
|
||||
Maximum of 4 remoras, 3 modules on each - maximum 12 modules.
|
||||
On each module there is 1 dual-port ISDN BRI chip.
|
||||
On each line there are 2 B-channels and 1 D-channel.
|
||||
|
||||
It means we have 48 timeslots (B-channels only!), and 32 bits are not enough.
|
||||
First 0-23 timeslots will be mapped on 'module_map[0]' and 24-47 will be mapped
|
||||
on 'module_map[1]'.
|
||||
*/
|
||||
u_int32_t module_map[2]; /* Map of available module */
|
||||
u_int16_t max_fe_channels; /* Number of available modules */
|
||||
|
||||
wan_bitmap_t critical;
|
||||
|
||||
/*
|
||||
Flag indicating if this logical 'card' (sdla_t) which represents a BRI line,
|
||||
is the 'clock reference port' for the physical A500 card.
|
||||
Only ONE 'card' may have this flag set to WANOPT_YES, all others must be
|
||||
WANOPT_NO.
|
||||
TE mode: if 'is_clock_master' is set to WANOPT_YES, clock recovered from
|
||||
the line will be routed to ALL other BRI modules on the card.
|
||||
*/
|
||||
u_int8_t is_clock_master;
|
||||
|
||||
u_int8_t use_512khz_recovery_clock;
|
||||
|
||||
} sdla_bri_param_t;
|
||||
|
||||
/* macros to find out type of module */
|
||||
#define IS_BRI_TE_MOD(bri_param_ptr, line_no) ((bri_param_ptr)->mod[line_no].type == MOD_TYPE_TE)
|
||||
#define IS_BRI_NT_MOD(bri_param_ptr, line_no) ((bri_param_ptr)->mod[line_no].type == MOD_TYPE_NT)
|
||||
|
||||
/* Translate FE_LINENO to physical module number divisible by BRI_MAX_PORTS_PER_CHIP. */
|
||||
|
||||
/*******************************************************************************
|
||||
DEFINES AND MACROS
|
||||
*******************************************************************************/
|
||||
|
||||
/* Definition of AFT 32bit register at offset 0x54. */
|
||||
typedef struct bri_reg{
|
||||
u8 data; /* lsb */
|
||||
u8 contrl;
|
||||
|
||||
u8 reserv1;
|
||||
u8 mod_addr:2; /* 00, 01, 10 - adresses modules,
|
||||
code 11 - address of status register per-remora. */
|
||||
|
||||
u8 remora_addr:4; /* Select Remora. Maximum is 4 (from 0 to 3) for BRI */
|
||||
u8 reset:1;
|
||||
u8 start:1; /* msb */
|
||||
}bri_reg_t;
|
||||
|
||||
#define RM_BRI_STATUS_READ 0x3
|
||||
|
||||
#define CPLD_USE_512KHZ_RECOVERY_CLOCK_BIT (1)
|
||||
#define READ_BIT (1 << 7)
|
||||
#define ADDR_BIT (1 << 6)
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** FUNCTION PROTOTYPES
|
||||
*******************************************************************************/
|
||||
extern int wp_bri_iface_init(void*);
|
||||
|
||||
#endif/* WAN_KERNEL */
|
||||
|
||||
/***************************************************************/
|
||||
|
||||
#endif /* __SDLA_BRI_H */
|
|
@ -0,0 +1,123 @@
|
|||
|
||||
#ifndef _BSC_HEADER_
|
||||
#define _BSC_HEADER_
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
|
||||
/*========== MAILBOX COMMANDS AND RETURN CODES ==========*/
|
||||
#define BSC_READ 0x00
|
||||
#define BSC_WRITE 0x01
|
||||
#define OPEN_LINK 0x02
|
||||
#define CLOSE_LINK 0x03
|
||||
#define CAM_WRITE 0x04
|
||||
#define CAM_READ 0x05
|
||||
#define LINK_STATUS 0x06
|
||||
#define READ_OPERATIONAL_STATISTICS 0x07
|
||||
#define FLUSH_OPERATIONAL_STATISTICS 0x08
|
||||
#define READ_COMMS_ERROR_STATISTICS 0x09
|
||||
#define FLUSH_COMMS_ERROR_STATISTICS 0x0A
|
||||
#define READ_BSC_ERROR_STATISTICS 0x0B
|
||||
#define FLUSH_BSC_ERROR_STATISTICS 0x0C
|
||||
#define FLUSH_BSC_TEXT_BUFFERS 0x0D
|
||||
#define SET_CONFIGURATION 0x0E
|
||||
#undef READ_CONFIGURATION
|
||||
#define READ_CONFIGURATION 0x0F
|
||||
#define SET_MODEM_STATUS 0x10
|
||||
#define READ_MODEM_STATUS 0x11
|
||||
#undef READ_CODE_VERSION
|
||||
#define READ_CODE_VERSION 0x12
|
||||
#define ADD_STATION 0x20
|
||||
#define DELETE_STATION 0x21
|
||||
#define DELETE_ALL_STATIONS 0x22
|
||||
#define LIST_STATIONS 0x23
|
||||
#define SET_GENERAL_OR_SPECIFIC_POLL 0x24
|
||||
#define SET_STATION_STATUS 0x25
|
||||
|
||||
#define READ_STATE_DIAGNOSTICS 0x30
|
||||
|
||||
#define UNUSED_CMD_FOR_EVENTS 0x7e
|
||||
|
||||
#define Z80_TIMEOUT_ERROR 0x0a
|
||||
#define DATA_LENGTH_TOO_BIG 0x03
|
||||
|
||||
#define BSC_SENDBOX 0xF000 /* send mailbox */
|
||||
|
||||
#define MDATALEN 4000
|
||||
#define MBOX_HEADER_SZ 15
|
||||
|
||||
/* for point-to-point, ignore station_number and address fields in CBLOCK */
|
||||
|
||||
/* note: structure must be packed on 1-byte boundaries
|
||||
and for a block this size, it is not wise to allocate it on
|
||||
the stack - should be a static global
|
||||
*/
|
||||
/* control block */
|
||||
typedef struct {
|
||||
unsigned char opp_flag ;
|
||||
unsigned char command ;
|
||||
unsigned short buffer_length ;
|
||||
unsigned char return_code ;
|
||||
unsigned char misc_tx_rx_bits ;
|
||||
unsigned short heading_length ;
|
||||
unsigned short notify ;
|
||||
unsigned char station ;
|
||||
unsigned char poll_address ;
|
||||
unsigned char select_address ;
|
||||
unsigned char device_address ;
|
||||
unsigned char notify_extended ;
|
||||
unsigned char reserved ;
|
||||
unsigned char data[MDATALEN] ;
|
||||
} BSC_MAILBOX_STRUCT;
|
||||
|
||||
|
||||
|
||||
typedef struct {
|
||||
unsigned char line_speed_number ;
|
||||
unsigned short max_data_frame_size ;
|
||||
unsigned char secondary_station ;
|
||||
unsigned char num_consec_PAD_eof ;
|
||||
unsigned char num_add_lead_SYN ;
|
||||
unsigned char conversational_mode ;
|
||||
unsigned char pp_dial_up_operation ;
|
||||
unsigned char switched_CTS_RTS ;
|
||||
unsigned char EBCDIC_encoding ;
|
||||
unsigned char auto_open ;
|
||||
unsigned char misc_bits ;
|
||||
unsigned char protocol_options1 ;
|
||||
unsigned char protocol_options2 ;
|
||||
unsigned short reserved_pp ;
|
||||
unsigned char max_retransmissions ;
|
||||
unsigned short fast_poll_retries ;
|
||||
unsigned short TTD_retries ;
|
||||
unsigned short restart_timer ;
|
||||
unsigned short pp_slow_restart_timer ;
|
||||
unsigned short TTD_timer ;
|
||||
unsigned short pp_delay_between_EOT_ENQ ;
|
||||
unsigned short response_timer ;
|
||||
unsigned short rx_data_timer ;
|
||||
unsigned short NAK_retrans_delay_timer ;
|
||||
unsigned short wait_CTS_timer ;
|
||||
unsigned char mp_max_consec_ETX ;
|
||||
unsigned char mp_general_poll_address ;
|
||||
unsigned short sec_poll_timeout ;
|
||||
unsigned char pri_poll_skips_inactive ;
|
||||
unsigned char sec_additional_stn_send_gpoll ;
|
||||
unsigned char pri_select_retries ;
|
||||
unsigned char mp_multipoint_options ;
|
||||
unsigned short reserved ;
|
||||
} BSC_CONFIG_STRUCT;
|
||||
|
||||
|
||||
typedef struct {
|
||||
unsigned char max_tx_queue ;
|
||||
unsigned char max_rx_queue ;
|
||||
unsigned char station_flags ;
|
||||
}ADD_STATION_STRUCT;
|
||||
|
||||
|
||||
#define SIOC_WANPIPE_EXEC_CMD SIOC_WANPIPE_DEVPRIVATE
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
|
@ -0,0 +1,240 @@
|
|||
/* $Header: /home/ncorbic/svn2cvs/cvsroot/wanpipe_linux/code/include/sdla_bscstrm.h,v 1.4 2007-05-24 17:45:25 sangoma Exp $ */
|
||||
|
||||
|
||||
/*
|
||||
***********************************************************************************
|
||||
* *
|
||||
* BSTRMAPI.H is the 'C' API header file for the Sangoma BSC Tx/Rx streaming code. *
|
||||
* *
|
||||
***********************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* $Log: not supported by cvs2svn $
|
||||
* Revision 1.3 2004/09/28 21:47:30 sangoma
|
||||
* *** empty log message ***
|
||||
*
|
||||
* Revision 1.2 2004/04/21 21:11:20 sangoma
|
||||
* *** empty log message ***
|
||||
*
|
||||
* Revision 1.1.1.1 2002/11/25 09:20:00 ncorbic
|
||||
* Wanpipe Linux Development
|
||||
*
|
||||
* Revision 1.2 2002/06/05 09:32:55 ncorbic
|
||||
* *** empty log message ***
|
||||
*
|
||||
* Revision 1.1 2002/03/20 20:58:43 ncorbic
|
||||
* *** empty log message ***
|
||||
*
|
||||
*
|
||||
* Rev 1.2 24 Nov 1998 12:08:54 gideon
|
||||
* Added definitions to handle the inclusion of timer interrupt logic.
|
||||
* The code version is now 1.03.
|
||||
*
|
||||
*
|
||||
* Rev 1.1 30 Jan 1998 17:29:54 gideon
|
||||
* Modifications made to improve error handling when receiving Type 3 blocks as
|
||||
* follows:
|
||||
* 1) The 'comms_err_res_Rx' in the COMMUNICATIONS_ERROR_STRUCT was changed to
|
||||
* 'Rx_invalid_block_count'.
|
||||
* 2) Added the definition RX_INVALID_BLOCK for the 'Rx_error_bits' in the
|
||||
* RECEIVE mailbox.
|
||||
* The code version is now 1.02.
|
||||
*
|
||||
*
|
||||
* Rev 1.0 10 Dec 1997 11:19:48 gideon
|
||||
* Initial revision.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _BSCSTRM_HEADER_
|
||||
#define _BSCSTRM_HEADER_
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* physical addresses on the adapter */
|
||||
#define BASE_ADDR_SEND_MB 0xE000 /* the base address of the SEND mailbox area */
|
||||
#define BASE_ADDR_RECEIVE_MB 0xF000 /* the base address of the RECEIVE mailbox area */
|
||||
#define PTR_INTERRUPT_REPORT_IB 0xFFF0 /* a pointer to the interrupt reporting interface byte */
|
||||
#define PTR_INTERRUPT_PERMIT_IB 0xFFF1 /* a pointer to the interrupt permission interface byte */
|
||||
#define PTR_MODEM_STATUS_IB 0xFFF4 /* a pointer to the modem status interface byte */
|
||||
|
||||
|
||||
|
||||
/* BSC streaming commands */
|
||||
#define BSC_WRITE 0x01 /* transmit a BSC block */
|
||||
#define ENABLE_COMMUNICATIONS 0x02 /* enable communications */
|
||||
#define DISABLE_COMMUNICATIONS 0x03 /* disable communications */
|
||||
#define READ_OPERATIONAL_STATS 0x07 /* retrieve the operational statistics */
|
||||
#define FLUSH_OPERATIONAL_STATS 0x08 /* flush the operational statistics */
|
||||
#define READ_COMMS_ERR_STATS 0x09 /* read the communication error statistics */
|
||||
#define FLUSH_COMMS_ERR_STATS 0x0A /* flush the communication error statistics */
|
||||
#define SET_MODEM_STATUS 0x0B /* set the modem status */
|
||||
#define READ_MODEM_STATUS 0x0C /* read the current modem status (CTS and DCD status) */
|
||||
#define FLUSH_BSC_BUFFERS 0x0D /* flush any queued transmit and receive buffers */
|
||||
#define READ_CONFIGURATION 0x10 /* read the current operational configuration */
|
||||
#define SET_CONFIGURATION 0x11 /* set the operational configuration */
|
||||
#define READ_CODE_VERSION 0x15 /* read the code version */
|
||||
#define SET_INTERRUPT_TRIGGERS 0x20 /* set the interrupt triggers */
|
||||
#define READ_INTERRUPT_TRIGGERS 0x21 /* read the interrupt trigger configuration */
|
||||
//#define READ_ADAPTER_CONFIGURATION 0xA0 /* find out what type of adapter is being used */
|
||||
|
||||
|
||||
|
||||
/* return code from BSC streaming commands */
|
||||
#define COMMAND_SUCCESSFULL 0x00 /* the command was successfull */
|
||||
#define COMMUNICATIONS_DISABLED 0x01 /* communications are currently disabled */
|
||||
#define COMMUNICATIONS_ENABLED 0x02 /* communications are currently enabled */
|
||||
#define SET_CONFIG_BEFORE_ENABLE_COMMS 0x03 /* SET_CONFIGURATION before ENABLE_COMMUNICATIONS */
|
||||
#define SET_CONFIG_BEFORE_INT_TRIGGERS 0x03 /* SET_CONFIGURATION before SET_INTERRUPT_TRIGGERS */
|
||||
#define INVALID_CONFIGURATION_DATA 0x03 /* the passed configuration data is invalid */
|
||||
#define INVALID_TX_DATA_LGTH 0x03 /* the length of the data to be transmitted is invalid */
|
||||
#define CANT_FLUSH_BUSY_SENDING 0x03 /* the BSC buffers cannot be flushed as a block is being transmitted */
|
||||
#define TX_BUFFERS_FULL 0x04 /* the transmit buffers are full */
|
||||
#define INVALID_INTERRUPT_TIMER 0x04 /* the interrupt timer interval value is invalid */
|
||||
#define ILLEGAL_COMMAND 0x05 /* the defined HDLC command is invalid */
|
||||
#define MODEM_STATUS_CHANGE 0x10 /* a modem (DCD/CTS) status change ocurred */
|
||||
|
||||
|
||||
|
||||
/* mailbox definitions */
|
||||
/*
|
||||
The two mailboxes take up a total of 8192 bytes, so each is 4096 bytes in size. However, we reserve the last 16 bytes
|
||||
in the receive mailbox for miscellaneous interface bytes, so each mailbox is now 4080 bytes. If we subtract 16 bytes
|
||||
for the mailbox header area, we are left with a mailbox data size of 4064 bytes.
|
||||
*/
|
||||
#define SIZEOF_MB_DATA_BFR 4064
|
||||
|
||||
/* the mailbox structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* the opp flag */
|
||||
unsigned char command; /* the user command */
|
||||
unsigned short buffer_length; /* the data length */
|
||||
unsigned char return_code; /* the return code */
|
||||
unsigned char misc_Tx_Rx_bits; /* miscellaneous transmit and receive bits */
|
||||
unsigned char Rx_error_bits; /* an indication of a block received with an error */
|
||||
unsigned short Rx_time_stamp; /* a millisecond receive time stamp */
|
||||
unsigned char reserved[7]; /* reserved for later use */
|
||||
char data[SIZEOF_MB_DATA_BFR]; /* the data area */
|
||||
} MAILBOX_STRUCT;
|
||||
|
||||
|
||||
#define MBOX_HEADER_SZ 16
|
||||
|
||||
|
||||
/* definitions for setting the configuration */
|
||||
#define MAXIMUM_BAUD_RATE 112000 /* the maximum permitted baud rate */
|
||||
#define MIN_BLOCK_LENGTH 2 /* the minimum permitted block length */
|
||||
#define MAX_BLOCK_LENGTH 2200 /* the maximum permitted block length */
|
||||
#define MIN_NO_CONSEC_PADs_EOB 1 /* the minimum number of consecutive PADs defining the end-of-block */
|
||||
#define MAX_NO_CONSEC_PADs_EOB 50 /* the maximum number of consecutive PADs defining the end-of-block */
|
||||
#define MIN_ADD_LEAD_TX_SYN_CHARS 0 /* the minimum number of additional leading SYN characters */
|
||||
#define MAX_ADD_LEAD_TX_SYN_CHARS 50 /* the maximum number of additional leading SYN characters */
|
||||
#define MIN_NO_BITS_PER_CHAR 8 /* the minimum number of bits per character */
|
||||
#define MAX_NO_BITS_PER_CHAR 8 /* the maximum number of bits per character */
|
||||
|
||||
/* definitions for the 'Rx_block_type' */
|
||||
#define RX_BLOCK_TYPE_1 1
|
||||
#define RX_BLOCK_TYPE_2 2
|
||||
#define RX_BLOCK_TYPE_3 3
|
||||
|
||||
/* definitions for 'parity' */
|
||||
#define NO_PARITY 0 /* no parity */
|
||||
#define ODD_PARITY 1 /* odd parity */
|
||||
#define EVEN_PARITY 2 /* even parity */
|
||||
|
||||
/* definitions for the 'statistics_options' */
|
||||
#define RX_STATISTICS 0x0001 /* enable receiver statistics */
|
||||
#define RX_TIME_STAMP 0x0002 /* enable the receive time stamp */
|
||||
#define TX_STATISTICS 0x0100 /* enable transmitter statistics */
|
||||
|
||||
/* definitions for the 'misc_config_options' */
|
||||
#define STRIP_PARITY_BIT_FROM_DATA 0x0001 /* strip the parity bit from the data for block types 1 & 3 */
|
||||
|
||||
/* definitions for the 'modem_config_options' */
|
||||
#define DONT_RAISE_DTR_RTS_EN_COMMS 0x0001 /* don't raise DTR and RTS when enabling communications */
|
||||
|
||||
/* the configuration structure */
|
||||
typedef struct {
|
||||
unsigned long baud_rate; /* the baud rate */
|
||||
unsigned long adapter_frequency; /* the adapter frequecy */
|
||||
unsigned short max_data_length; /* the maximum length of a BSC data block */
|
||||
unsigned short EBCDIC_encoding; /* EBCDIC/ASCII encoding */
|
||||
unsigned short Rx_block_type; /* the type of BSC block to be received */
|
||||
unsigned short no_consec_PADs_EOB; /* the number of consecutive PADs indicating the end of the block */
|
||||
unsigned short no_add_lead_Tx_SYN_chars; /* the number of additional leading transmit SYN characters */
|
||||
unsigned short no_bits_per_char; /* the number of bits per character */
|
||||
unsigned short parity; /* parity */
|
||||
unsigned short misc_config_options; /* miscellaneous configuration options */
|
||||
unsigned short statistics_options; /* statistic options */
|
||||
unsigned short modem_config_options; /* modem configuration options */
|
||||
} CONFIGURATION_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* definitions for reading the communications errors */
|
||||
/* the communications error structure */
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count; /* the number of receiver overrun errors */
|
||||
unsigned short BCC_err_count; /* the number of receiver BCC errors */
|
||||
unsigned short nxt_Rx_bfr_occupied_count; /* the number of times a block had to be discarded due to buffering */
|
||||
/* limitations */
|
||||
unsigned short Rx_too_long_int_lvl_count; /* the number of blocks received which exceeded the maximum permitted */
|
||||
/* block size (interrupt level) */
|
||||
unsigned short Rx_too_long_app_lvl_count; /* the number of blocks received which exceeded the configured maximum */
|
||||
/* block size (application level) */
|
||||
unsigned short Rx_invalid_block_count; /* the number of invalid blocks received */
|
||||
unsigned short Tx_underrun_count; /* the number of transmit underruns */
|
||||
unsigned short comms_err_res_Tx; /* reserved (later use) for a transmit statistic */
|
||||
unsigned short DCD_state_change_count; /* the number of times DCD changed state */
|
||||
unsigned short CTS_state_change_count; /* the number of times CTS changed state */
|
||||
} COMMUNICATIONS_ERROR_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* definitions for reading the operational statistics */
|
||||
/* the operational statistics structure */
|
||||
typedef struct {
|
||||
unsigned long no_blocks_Rx; /* the number of data blocks received and made available for the application */
|
||||
unsigned long no_bytes_Rx; /* the number of bytes received and made available for the application */
|
||||
unsigned long no_blocks_Tx; /* the number of data blocks transmitted */
|
||||
unsigned long no_bytes_Tx; /* the number of bytes transmitted */
|
||||
} OPERATIONAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* definitions for interrupt usage */
|
||||
/* 'interrupt_triggers' bit mapping set by a SET_INTERRUPT_TRIGGERS command */
|
||||
#define INTERRUPT_ON_RX_BLOCK 0x01 /* interrupt when an data block is available for the application */
|
||||
#define INTERRUPT_ON_TIMER 0x20 /* interrupt at a defined millisecond interval */
|
||||
|
||||
/* interrupt types indicated at 'ptr_interrupt_interface_byte' */
|
||||
#define RX_INTERRUPT_PENDING 0x01 /* a receive interrupt is pending */
|
||||
#define TIMER_INTERRUPT_PENDING 0x20 /* a timer interrupt is pending */
|
||||
|
||||
#define MAX_INTERRUPT_TIMER_VALUE 60000 /* the maximum permitted interrupt timer value */
|
||||
|
||||
|
||||
/* definitions for data block transmission */
|
||||
/* the setting of the 'misc_Tx_Rx_bits' in the mailbox */
|
||||
#define TX_BLK_TRANSPARENT 0x01 /* send a transparent text block */
|
||||
#define ETB_DEFINES_EOB 0x02 /* an ETB character defines the end of this text block */
|
||||
#define ITB_DEFINES_EOB 0x04 /* an ITB character defines the end of this text block */
|
||||
#define USR_DEFINES_TX_DATA 0x10 /* the user application defines the data to be transmitted */
|
||||
|
||||
|
||||
|
||||
/* definitions for the 'Rx_error_bits' in the RECEIVE mailbox */
|
||||
#define RX_BCC_ERROR 0x01 /* a receive BCC error occurred */
|
||||
#define RX_OVERRUN_ERROR 0x02 /* a receive overrun error occurred */
|
||||
#define RX_INVALID_BLOCK 0x04 /* an invalid block was received */
|
||||
#define RX_EXCESSIVE_LGTH_ERR_INT_LVL 0x10 /* the received block was too long (interrupt level) */
|
||||
#define RX_EXCESSIVE_LGTH_ERR_APP_LVL 0x20 /* the received block was too long (application level) */
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#define SIOC_WANPIPE_EXEC_CMD SIOC_WANPIPE_DEVPRIVATE
|
||||
|
||||
#endif
|
|
@ -0,0 +1,215 @@
|
|||
/*****************************************************************************
|
||||
* bsc_api.h Bisync Streaming API header file.
|
||||
*
|
||||
* Author: Jaspreet Singh <jaspreet@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1998-1997 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Sep 24, 1998 Jaspreet Singh o Initial Version.
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __SDLA_BSTRM_H__
|
||||
#define __SDLA_BSTRM_H__
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* Status flag for determining whether to perform a check on socket receive
|
||||
* queue.
|
||||
*/
|
||||
#define NO_SK_RX_CHECK 0x00
|
||||
#define TOP_CHECK_SK_RX_Q 0x01
|
||||
#define BTM_CHECK_SK_RX_Q 0x02
|
||||
|
||||
#define NO_READ_CMD 0x00
|
||||
#define READ_CMD 0x01
|
||||
|
||||
/* physical addresses on the adapter
|
||||
*/
|
||||
#define SEND_MB_OFF 0x0000 /* base addr of the SEND mb area */
|
||||
#define RECEIVE_MB_OFF 0x1000 /* base addr of the RECEIVE mb area */
|
||||
#define INTERRUPT_REPORT_IB_OFF 0x1FF0 /* a ptr to the interrupt reporting interface byte */
|
||||
#define INTERRUPT_PERMIT_IB_OFF 0x1FF1 /* a pointer to the interrupt permission interface byte */
|
||||
#define PTR_MODEM_STATUS_IB 0xFFF4 /* a pointer to the modem status interface byte */
|
||||
|
||||
|
||||
/* BSC streaming commands */
|
||||
#define BSC_WRITE 0x01 /* transmit a BSC block */
|
||||
#define BSC_READ 0x90
|
||||
#define ENABLE_COMMUNICATIONS 0x02 /* enable communications */
|
||||
#define DISABLE_COMMUNICATIONS 0x03 /* disable communications */
|
||||
#define READ_OPERATIONAL_STATS 0x07 /* retrieve the operational statistics */
|
||||
#define FLUSH_OPERATIONAL_STATS 0x08 /* flush the operational statistics */
|
||||
#define READ_COMMS_ERR_STATS 0x09 /* read the communication error statistics */
|
||||
#define FLUSH_COMMS_ERR_STATS 0x0A /* flush the communication error statistics */
|
||||
#define SET_MODEM_STATUS 0x0B /* set the modem status */
|
||||
#define READ_MODEM_STATUS 0x0C /* read the current modem status (CTS and DCD status) */
|
||||
#define FLUSH_BSC_BUFFERS 0x0D /* flush any queued transmit and receive buffers */
|
||||
#define READ_CONFIGURATION 0x10 /* read the current operational configuration */
|
||||
#define SET_CONFIGURATION 0x11 /* set the operational configuration */
|
||||
#define READ_CODE_VERSION 0x15 /* read the code version */
|
||||
#define SET_INTERRUPT_TRIGGERS 0x20 /* set the interrupt triggers */
|
||||
#define READ_INTERRUPT_TRIGGERS 0x21 /* read the interrupt trigger configuration */
|
||||
#define READ_ADAPTER_CONFIGURATION 0xA0 /* find out what type of adapter is being used */
|
||||
|
||||
|
||||
|
||||
/* return code from BSC streaming commands */
|
||||
#define COMMAND_SUCCESSFULL 0x00 /* the command was successfull */
|
||||
#define COMMUNICATIONS_DISABLED 0x01 /* communications are currently disabled */
|
||||
#define COMMUNICATIONS_ENABLED 0x02 /* communications are currently enabled */
|
||||
#define SET_CONFIG_BEFORE_ENABLE_COMMS 0x03 /* SET_CONFIGURATION before ENABLE_COMMUNICATIONS */
|
||||
#define INVALID_CONFIGURATION_DATA 0x03 /* the passed configuration data is invalid */
|
||||
#define INVALID_TX_DATA_LGTH 0x03 /* the length of the data to be transmitted is invalid */
|
||||
#define CANT_FLUSH_BUSY_SENDING 0x03 /* the BSC buffers cannot be flushed as a block is being transmitted */
|
||||
#define TX_BUFFERS_FULL 0x04 /* the transmit buffers are full */
|
||||
#define ILLEGAL_COMMAND 0x05 /* the defined HDLC command is invalid */
|
||||
#define MODEM_STATUS_CHANGE 0x10 /* a modem (DCD/CTS) status change ocurred */
|
||||
#define NO_DATA_AVAILABLE 0x20
|
||||
|
||||
/* mailbox definitions */
|
||||
/*
|
||||
The two mailboxes take up a total of 8192 bytes, so each is 4096 bytes in size. However, we reserve the last 16 bytes
|
||||
in the receive mailbox for miscellaneous interface bytes, so each mailbox is now 4080 bytes. If we subtract 16 bytes
|
||||
for the mailbox header area, we are left with a mailbox data size of 4064 bytes.
|
||||
*/
|
||||
#define SIZEOF_MB_DATA_BFR 4064
|
||||
#define MAILBOX_SIZE 20
|
||||
|
||||
/* the mailbox structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* the opp flag */
|
||||
unsigned char command ; /* the user command */
|
||||
unsigned short buffer_length ; /* the data length */
|
||||
unsigned char return_code ; /* the return code */
|
||||
unsigned char misc_Tx_Rx_bits ; /* miscellaneous transmit and receive bits */
|
||||
unsigned char Rx_error_bits ; /* an indication of a block received with an error */
|
||||
unsigned short Rx_time_stamp ; /* a millisecond receive time stamp */
|
||||
unsigned char reserved[7] ; /* reserved for later use */
|
||||
char data[SIZEOF_MB_DATA_BFR] ; /* the data area */
|
||||
} MAILBOX_STRUCT;
|
||||
|
||||
typedef struct {
|
||||
pid_t pid_num ;
|
||||
MAILBOX_STRUCT cmdarea ;
|
||||
} CMDBLOCK_STRUCT;
|
||||
|
||||
/* definitions for setting the configuration */
|
||||
#define MAXIMUM_BAUD_RATE 112000 /* the maximum permitted baud rate */
|
||||
#define MIN_BLOCK_LENGTH 2 /* the minimum permitted block length */
|
||||
#define MAX_BLOCK_LENGTH 2200 /* the maximum permitted block length */
|
||||
#define MIN_NO_CONSEC_PADs_EOB 1 /* the minimum number of consecutive PADs defining the end-of-block */
|
||||
#define MAX_NO_CONSEC_PADs_EOB 50 /* the maximum number of consecutive PADs defining the end-of-block */
|
||||
#define MIN_ADD_LEAD_TX_SYN_CHARS 0 /* the minimum number of additional leading SYN characters */
|
||||
#define MAX_ADD_LEAD_TX_SYN_CHARS 50 /* the maximum number of additional leading SYN characters */
|
||||
#define MIN_NO_BITS_PER_CHAR 8 /* the minimum number of bits per character */
|
||||
#define MAX_NO_BITS_PER_CHAR 8 /* the maximum number of bits per character */
|
||||
|
||||
/* definitions for the 'Rx_block_type' */
|
||||
#define RX_BLOCK_TYPE_1 1
|
||||
#define RX_BLOCK_TYPE_2 2
|
||||
#define RX_BLOCK_TYPE_3 3
|
||||
|
||||
/* definitions for 'parity' */
|
||||
#define NO_PARITY 0 /* no parity */
|
||||
#define ODD_PARITY 1 /* odd parity */
|
||||
#define EVEN_PARITY 2 /* even parity */
|
||||
|
||||
/* definitions for the 'statistics_options' */
|
||||
#define RX_STATISTICS 0x0001 /* enable receiver statistics */
|
||||
#define RX_TIME_STAMP 0x0002 /* enable the receive time stamp */
|
||||
#define TX_STATISTICS 0x0100 /* enable transmitter statistics */
|
||||
|
||||
/* definitions for the 'misc_config_options' */
|
||||
#define STRIP_PARITY_BIT_FROM_DATA 0x0001 /* strip the parity bit from the data for block types 1 & 3 */
|
||||
|
||||
/* definitions for the 'modem_config_options' */
|
||||
#define DONT_RAISE_DTR_RTS_EN_COMMS 0x0001 /* don't raise DTR and RTS when enabling communications */
|
||||
|
||||
/* the configuration structure */
|
||||
typedef struct {
|
||||
unsigned long baud_rate ; /* the baud rate */
|
||||
unsigned long adapter_frequency ; /* the adapter frequecy */
|
||||
unsigned short max_data_length ; /* the maximum length of a BSC data block */
|
||||
unsigned short EBCDIC_encoding ; /* EBCDIC/ASCII encoding */
|
||||
unsigned short Rx_block_type ; /* the type of BSC block to be received */
|
||||
unsigned short no_consec_PADs_EOB ; /* the number of consecutive PADs indicating the end of the block */
|
||||
unsigned short no_add_lead_Tx_SYN_chars ; /* the number of additional leading transmit SYN characters */
|
||||
unsigned short no_bits_per_char ; /* the number of bits per character */
|
||||
unsigned short parity ; /* parity */
|
||||
unsigned short misc_config_options ; /* miscellaneous configuration options */
|
||||
unsigned short statistics_options ; /* statistic options */
|
||||
unsigned short modem_config_options ; /* modem configuration options */
|
||||
} CONFIGURATION_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* definitions for reading the communications errors */
|
||||
/* the communications error structure */
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count; /* the number of receiver overrun errors */
|
||||
unsigned short BCC_err_count; /* the number of receiver BCC errors */
|
||||
unsigned short nxt_Rx_bfr_occupied_count; /* the number of times a block had to be discarded due to buffering */
|
||||
/* limitations */
|
||||
unsigned short Rx_too_long_int_lvl_count; /* the number of blocks received which exceeded the maximum permitted */
|
||||
/* block size (interrupt level) */
|
||||
unsigned short Rx_too_long_app_lvl_count; /* the number of blocks received which exceeded the configured maximum */
|
||||
/* block size (application level) */
|
||||
unsigned short comms_err_res_Rx; /* reserved (later use) for a receive statistic */
|
||||
unsigned short Tx_underrun_count; /* the number of transmit underruns */
|
||||
unsigned short comms_err_res_Tx; /* reserved (later use) for a transmit statistic */
|
||||
unsigned short DCD_state_change_count; /* the number of times DCD changed state */
|
||||
unsigned short CTS_state_change_count; /* the number of times CTS changed state */
|
||||
} COMMUNICATIONS_ERROR_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* definitions for reading the operational statistics */
|
||||
/* the operational statistics structure */
|
||||
typedef struct {
|
||||
unsigned long no_blocks_Rx ; /* the number of data blocks received and made available for the application */
|
||||
unsigned long no_bytes_Rx ; /* the number of bytes received and made available for the application */
|
||||
unsigned long no_blocks_Tx ; /* the number of data blocks transmitted */
|
||||
unsigned long no_bytes_Tx ; /* the number of bytes transmitted */
|
||||
} OPERATIONAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* definitions for interrupt usage */
|
||||
/* 'interrupt_triggers' bit mapping set by a SET_INTERRUPT_TRIGGERS command */
|
||||
#define INTERRUPT_ON_RX_BLOCK 0x01 /* interrupt when an data block is
|
||||
available for the application */
|
||||
#define NO_INTERRUPTS 0x00
|
||||
#define INTERRUPT_ON_TIMER 0x20
|
||||
|
||||
/* interrupt types indicated at 'ptr_interrupt_interface_byte' */
|
||||
#define RX_INTERRUPT_PENDING 0x01 /* a receive interrupt is pending */
|
||||
|
||||
typedef struct {
|
||||
char int_type;
|
||||
char int_allowed;
|
||||
} BSC_INT_BYTES;
|
||||
|
||||
|
||||
/* definitions for data block transmission */
|
||||
/* the setting of the 'misc_Tx_Rx_bits' in the mailbox */
|
||||
#define TX_BLK_TRANSPARENT 0x01 /* send a transparent text block */
|
||||
#define ETB_DEFINES_EOB 0x02 /* an ETB character defines the end of this text block */
|
||||
#define ITB_DEFINES_EOB 0x04 /* an ITB character defines the end of this text block */
|
||||
#define USR_DEFINES_TX_DATA 0x10 /* the user application defines the data to be transmitted */
|
||||
|
||||
|
||||
|
||||
/* definitions for the 'Rx_error_bits' in the RECEIVE mailbox */
|
||||
#define RX_BCC_ERROR 0x01 /* a receive BCC error occurred */
|
||||
#define RX_OVERRUN_ERROR 0x02 /* a receive overrun error occurred */
|
||||
#define RX_EXCESSIVE_LGTH_ERR_INT_LVL 0x10 /* the received block was too long (interrupt level) */
|
||||
#define RX_EXCESSIVE_LGTH_ERR_APP_LVL 0x20 /* the received block was too long (application level) */
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
|
@ -0,0 +1,819 @@
|
|||
/*************************************************************************
|
||||
sdla_chdlc.h Sangoma Cisco HDLC firmware API definitions
|
||||
|
||||
Author: Gideon Hack
|
||||
Nenad Corbic <ncorbic@sangoma.com>
|
||||
|
||||
Copyright: (c) 1995-2000 Sangoma Technologies Inc.
|
||||
|
||||
This program is free software; you can redistribute it and/or
|
||||
modify it under the term of the GNU General Public License
|
||||
as published by the Free Software Foundation; either version
|
||||
2 of the License, or (at your option) any later version.
|
||||
|
||||
===========================================================================
|
||||
Oct 04, 1999 Nenad Corbic Updated API support
|
||||
Jun 02, 1999 Gideon Hack Changes for S514 usage.
|
||||
Oct 28, 1998 Jaspreet Singh Made changes for Dual Port CHDLC.
|
||||
Jun 11, 1998 David Fong Initial version.
|
||||
===========================================================================
|
||||
|
||||
Organization
|
||||
- Compatibility notes
|
||||
- Constants defining the shared memory control block (mailbox)
|
||||
- Interface commands
|
||||
- Return code from interface commands
|
||||
- Constants for the commands (structures for casting data)
|
||||
- UDP Management constants and structures
|
||||
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef _SDLA_CHDLC_H
|
||||
#define _SDLA_CHDLC_H
|
||||
|
||||
#if defined(__LINUX__)
|
||||
# include "if_wanpipe.h"
|
||||
#endif
|
||||
|
||||
#if defined (__KERNEL__)
|
||||
# include "wanpipe_sppp_iface.h"
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
Notes:
|
||||
|
||||
All structres defined in this file are byte-aligned.
|
||||
|
||||
Compiler Platform
|
||||
------------------------
|
||||
GNU C Linux
|
||||
|
||||
------------------------------------------------------------------------*/
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants defining the shared memory control block (mailbox)
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define PRI_BASE_ADDR_MB_STRUCT 0xE000 /* the base address of the mailbox structure on the adapter */
|
||||
#define SEC_BASE_ADDR_MB_STRUCT 0xE800 /* the base address of the mailbox structure on the adapter */
|
||||
#define SIZEOF_MB_DATA_BFR 2032 /* the size of the actual mailbox data area */
|
||||
#define NUMBER_MB_RESERVED_BYTES 0x0B /* the number of reserved bytes in the mailbox header area */
|
||||
|
||||
|
||||
#define MIN_LGTH_CHDLC_DATA_CFG 300 /* min length of the CHDLC data field (for configuration purposes) */
|
||||
#define PRI_MAX_NO_DATA_BYTES_IN_FRAME 15354 /* PRIMARY - max length of the CHDLC data field */
|
||||
|
||||
#if 0
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* the opp flag */
|
||||
unsigned char command ; /* the user command */
|
||||
unsigned short buffer_length ; /* the data length */
|
||||
unsigned char return_code ; /* the return code */
|
||||
unsigned char MB_reserved[NUMBER_MB_RESERVED_BYTES] ; /* reserved for later */
|
||||
unsigned char data[SIZEOF_MB_DATA_BFR] ; /* the data area */
|
||||
} CHDLC_MAILBOX_STRUCT;
|
||||
#endif
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* global interface commands */
|
||||
#define READ_GLOBAL_EXCEPTION_CONDITION 0x01
|
||||
#define SET_GLOBAL_CONFIGURATION 0x02
|
||||
/*#define READ_GLOBAL_CONFIGURATION 0x03*/
|
||||
#define READ_GLOBAL_STATISTICS 0x04
|
||||
#define FLUSH_GLOBAL_STATISTICS 0x05
|
||||
#define SET_MODEM_STATUS 0x06 /* set status of DTR or RTS */
|
||||
#define READ_MODEM_STATUS 0x07 /* read status of CTS and DCD */
|
||||
|
||||
#undef READ_COMMS_ERROR_STATS
|
||||
#define READ_COMMS_ERROR_STATS 0x08
|
||||
|
||||
#undef FLUSH_COMMS_ERROR_STATS
|
||||
#define FLUSH_COMMS_ERROR_STATS 0x09
|
||||
#define SET_TRACE_CONFIGURATION 0x0A /* set the line trace config */
|
||||
#define READ_TRACE_CONFIGURATION 0x0B /* read the line trace config */
|
||||
#define READ_TRACE_STATISTICS 0x0C /* read the trace statistics */
|
||||
#define FLUSH_TRACE_STATISTICS 0x0D /* flush the trace statistics */
|
||||
#define FT1_MONITOR_STATUS_CTRL 0x1C /* set the status of the S508/FT1 monitoring */
|
||||
#define SET_FT1_CONFIGURATION 0x18 /* set the FT1 configuration */
|
||||
#define READ_FT1_CONFIGURATION 0x19 /* read the FT1 configuration */
|
||||
#define TRANSMIT_ASYNC_DATA_TO_FT1 0x1A /* output asynchronous data to the FT1 */
|
||||
#define RECEIVE_ASYNC_DATA_FROM_FT1 0x1B /* receive asynchronous data from the FT1 */
|
||||
#define FT1_MONITOR_STATUS_CTRL 0x1C /* set the status of the FT1 monitoring */
|
||||
|
||||
#define READ_FT1_OPERATIONAL_STATS 0x1D /* read the S508/FT1 operational statistics */
|
||||
|
||||
#undef SET_FT1_MODE
|
||||
#define SET_FT1_MODE 0x1E /* set the operational mode of the S508/FT1 module */
|
||||
|
||||
/* CHDLC-level interface commands */
|
||||
#define READ_CHDLC_CODE_VERSION 0x20
|
||||
#define READ_CHDLC_EXCEPTION_CONDITION 0x21 /* read exception condition from the adapter */
|
||||
#define SET_CHDLC_CONFIGURATION 0x22
|
||||
#define READ_CHDLC_CONFIGURATION 0x23
|
||||
#define ENABLE_CHDLC_COMMUNICATIONS 0x24
|
||||
#define DISABLE_CHDLC_COMMUNICATIONS 0x25
|
||||
#define READ_CHDLC_LINK_STATUS 0x26
|
||||
|
||||
#define SET_MISC_TX_RX_PARAMETERS 0x29
|
||||
/* set miscellaneous Tx/Rx parameters */
|
||||
#define START_BAUD_CALIBRATION 0x2A
|
||||
/* calibrate an external clock */
|
||||
#define READ_BAUD_CALIBRATION_RESULT 0x2B
|
||||
|
||||
#define RESET_ESCC 0x2C
|
||||
/* read the result of a baud rate calibration */
|
||||
|
||||
#define SET_CHDLC_INTERRUPT_TRIGGERS 0x30
|
||||
/* set application interrupt triggers */
|
||||
#define READ_CHDLC_INTERRUPT_TRIGGERS 0x31
|
||||
/* read application interrupt trigger configuration */
|
||||
|
||||
/* Special UDP drivers management commands */
|
||||
#define CPIPE_ROUTER_UP_TIME WANPIPEMON_ROUTER_UP_TIME
|
||||
#define CPIPE_ENABLE_TRACING WANPIPEMON_ENABLE_TRACING
|
||||
#define CPIPE_DISABLE_TRACING WANPIPEMON_DISABLE_TRACING
|
||||
#define CPIPE_GET_TRACE_INFO WANPIPEMON_GET_TRACE_INFO
|
||||
#define DIGITAL_LOOPTEST WANPIPEMON_DIGITAL_LOOPTEST
|
||||
#define CPIPE_GET_IBA_DATA WANPIPEMON_GET_IBA_DATA
|
||||
#define CPIPE_FT1_READ_STATUS WANPIPEMON_FT1_READ_STATUS
|
||||
#define CPIPE_DRIVER_STAT_IFSEND WANPIPEMON_DRIVER_STAT_IFSEND
|
||||
#define CPIPE_DRIVER_STAT_INTR WANPIPEMON_DRIVER_STAT_INTR
|
||||
#define CPIPE_DRIVER_STAT_GEN WANPIPEMON_DRIVER_STAT_GEN
|
||||
#define CPIPE_FLUSH_DRIVER_STATS WANPIPEMON_FLUSH_DRIVER_STATS
|
||||
|
||||
|
||||
/* Driver specific commands for API */
|
||||
#define CHDLC_READ_TRACE_DATA 0xE4 /* read trace data */
|
||||
#define TRACE_ALL 0x00
|
||||
#define TRACE_PROT 0x01
|
||||
#define TRACE_DATA 0x02
|
||||
|
||||
#define DISCARD_RX_ERROR_FRAMES 0x0001
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Return codes from interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define COMMAND_OK 0x00
|
||||
|
||||
/* return codes from global interface commands */
|
||||
#define NO_GLOBAL_EXCEP_COND_TO_REPORT 0x01 /* there is no CHDLC exception condition to report */
|
||||
#define LGTH_GLOBAL_CFG_DATA_INVALID 0x01 /* the length of the passed global configuration data is invalid */
|
||||
#define LGTH_TRACE_CFG_DATA_INVALID 0x01 /* the length of the passed trace configuration data is invalid */
|
||||
#define IRQ_TIMEOUT_VALUE_INVALID 0x02 /* an invalid application IRQ timeout value was selected */
|
||||
#define TRACE_CONFIG_INVALID 0x02 /* the passed line trace configuration is invalid */
|
||||
#define ADAPTER_OPERATING_FREQ_INVALID 0x03 /* an invalid adapter operating frequency was selected */
|
||||
#define TRC_DEAC_TMR_INVALID 0x03 /* the trace deactivation timer is invalid */
|
||||
#define S508_FT1_ADPTR_NOT_PRESENT 0x0C /* the S508/FT1 adapter is not present */
|
||||
#define INVALID_FT1_STATUS_SELECTION 0x0D /* the S508/FT1 status selection is invalid */
|
||||
#define FT1_OP_STATS_NOT_ENABLED 0x0D /* the FT1 operational statistics have not been enabled */
|
||||
#define FT1_OP_STATS_NOT_AVAILABLE 0x0E /* the FT1 operational statistics are not currently available */
|
||||
#define S508_FT1_MODE_SELECTION_BUSY 0x0E /* the S508/FT1 adapter is busy selecting the operational mode */
|
||||
|
||||
/* return codes from command READ_GLOBAL_EXCEPTION_CONDITION */
|
||||
#define EXCEP_MODEM_STATUS_CHANGE 0x10 /* a modem status change occurred */
|
||||
#define EXCEP_TRC_DISABLED 0x11 /* the trace has been disabled */
|
||||
#define EXCEP_IRQ_TIMEOUT 0x12 /* IRQ timeout */
|
||||
#define EXCEP_CSU_DSU_STATE_CHANGE 0x16
|
||||
|
||||
/* return codes from CHDLC-level interface commands */
|
||||
#define NO_CHDLC_EXCEP_COND_TO_REPORT 0x21 /* there is no CHDLC exception condition to report */
|
||||
#define CHDLC_COMMS_DISABLED 0x21 /* communications are not currently enabled */
|
||||
#define CHDLC_COMMS_ENABLED 0x21 /* communications are currently enabled */
|
||||
#define DISABLE_CHDLC_COMMS_BEFORE_CFG 0x21 /* CHDLC communications must be disabled before setting the configuration */
|
||||
#define ENABLE_CHDLC_COMMS_BEFORE_CONN 0x21 /* communications must be enabled before using the CHDLC_CONNECT conmmand */
|
||||
#define CHDLC_CFG_BEFORE_COMMS_ENABLED 0x22 /* perform a SET_CHDLC_CONFIGURATION before enabling comms */
|
||||
#define LGTH_CHDLC_CFG_DATA_INVALID 0x22 /* the length of the passed CHDLC configuration data is invalid */
|
||||
#define LGTH_INT_TRIGGERS_DATA_INVALID 0x22 /* the length of the passed interrupt trigger data is invalid */
|
||||
#define INVALID_IRQ_SELECTED 0x23 /* in invalid IRQ was selected in the SET_CHDLC_INTERRUPT_TRIGGERS */
|
||||
#define INVALID_CHDLC_CFG_DATA 0x23 /* the passed CHDLC configuration data is invalid */
|
||||
#define IRQ_TMR_VALUE_INVALID 0x24 /* an invalid application IRQ timer value was selected */
|
||||
#define LARGER_PERCENT_TX_BFR_REQUIRED 0x24 /* a larger Tx buffer percentage is required */
|
||||
#define LARGER_PERCENT_RX_BFR_REQUIRED 0x25 /* a larger Rx buffer percentage is required */
|
||||
#define S514_BOTH_PORTS_SAME_CLK_MODE 0x26 /* S514 - both ports must have same clock mode */
|
||||
#define BAUD_CALIBRATION_NOT_DONE 0x29 /* a baud rate calibration has not been performed */
|
||||
#define BUSY_WITH_BAUD_CALIBRATION 0x2A /* adapter busy with a baud rate calibration */
|
||||
#define BAUD_CAL_FAILED_NO_TX_CLK 0x2B /* baud rate calibration failed (no transmit clock) */
|
||||
#define BAUD_CAL_FAILED_BAUD_HI 0x2C /* baud rate calibration failed (baud too high) */
|
||||
#define CANNOT_DO_BAUD_CAL 0x2D /* a baud rate calibration cannot be performed */
|
||||
|
||||
#define INVALID_CMND_HDLC_STREAM_MODE 0x4E /* the CHDLC interface command is invalid for HDLC streaming mode */
|
||||
#define INVALID_CHDLC_COMMAND 0x4F /* the defined CHDLC interface command is invalid */
|
||||
|
||||
/* return codes from command READ_CHDLC_EXCEPTION_CONDITION */
|
||||
#define EXCEP_LINK_ACTIVE 0x30 /* the CHDLC link has become active */
|
||||
#define EXCEP_LINK_INACTIVE_MODEM 0x31 /* the CHDLC link has become inactive (modem status) */
|
||||
#define EXCEP_LINK_INACTIVE_KPALV 0x32 /* the CHDLC link has become inactive (keepalive status) */
|
||||
#define EXCEP_IP_ADDRESS_DISCOVERED 0x33 /* the IP address has been discovered */
|
||||
#define EXCEP_LOOPBACK_CONDITION 0x34 /* a loopback condition has occurred */
|
||||
|
||||
|
||||
/* return code from command CHDLC_SEND_WAIT and CHDLC_SEND_NO_WAIT */
|
||||
#define LINK_DISCONNECTED 0x21
|
||||
#define NO_TX_BFRS_AVAIL 0x24
|
||||
|
||||
typedef struct {
|
||||
unsigned char modem_status;
|
||||
} MODEM_STATUS_STRUCT;
|
||||
|
||||
#define SET_MODEM_DTR_HIGH 0x01
|
||||
#define SET_MODEM_RTS_HIGH 0x02
|
||||
|
||||
#define MODEM_CTS_MASK 0x20
|
||||
#define MODEM_DCD_MASK 0x08
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_GLOBAL_CONFIGURATION/READ_GLOBAL_CONFIGURATION commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global configuration structure */
|
||||
typedef struct {
|
||||
unsigned short adapter_config_options ; /* adapter config options */
|
||||
unsigned short app_IRQ_timeout ; /* application IRQ timeout */
|
||||
unsigned int adapter_operating_frequency ; /* adapter operating frequency */
|
||||
unsigned short frame_transmit_timeout ;
|
||||
} GLOBAL_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'app_IRQ_timeout' */
|
||||
#define MAX_APP_IRQ_TIMEOUT_VALUE 5000 /* the maximum permitted IRQ timeout */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_GLOBAL_STATISTICS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global statistics structure */
|
||||
typedef struct {
|
||||
unsigned short app_IRQ_timeout_count ;
|
||||
} GLOBAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_COMMS_ERROR_STATS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the communications error statistics structure */
|
||||
typedef struct {
|
||||
unsigned short Rx_overrun_err_count ;
|
||||
unsigned short CRC_err_count ; /* receiver CRC error count */
|
||||
unsigned short Rx_abort_count ; /* abort frames recvd count */
|
||||
unsigned short Rx_dis_pri_bfrs_full_count ;/* receiver disabled */
|
||||
unsigned short comms_err_stat_reserved_1 ;/* reserved for later */
|
||||
unsigned short sec_Tx_abort_msd_Tx_int_count ; /* secondary - abort frames transmitted count (missed Tx interrupt) */
|
||||
unsigned short missed_Tx_und_int_count ; /* missed tx underrun interrupt count */
|
||||
unsigned short sec_Tx_abort_count ; /*secondary-abort frames tx count */
|
||||
unsigned short DCD_state_change_count ; /* DCD state change */
|
||||
unsigned short CTS_state_change_count ; /* CTS state change */
|
||||
} COMMS_ERROR_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants used for line tracing
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the trace configuration structure (SET_TRACE_CONFIGURATION/READ_TRACE_CONFIGURATION commands) */
|
||||
typedef struct {
|
||||
unsigned char trace_config ; /* trace configuration */
|
||||
unsigned short trace_deactivation_timer ; /* trace deactivation timer */
|
||||
unsigned int ptr_trace_stat_el_cfg_struct ; /* a pointer to the line trace element configuration structure */
|
||||
} LINE_TRACE_CONFIG_STRUCT;
|
||||
|
||||
/* 'trace_config' bit settings */
|
||||
#define TRACE_INACTIVE 0x00 /* trace is inactive */
|
||||
#define TRACE_ACTIVE 0x01 /* trace is active */
|
||||
#define TRACE_DELAY_MODE 0x04 /* operate the trace in delay mode */
|
||||
#define TRACE_DATA_FRAMES 0x08 /* trace Data frames */
|
||||
#define TRACE_SLARP_FRAMES 0x10 /* trace SLARP frames */
|
||||
#define TRACE_CDP_FRAMES 0x20 /* trace CDP frames */
|
||||
|
||||
/* the line trace status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_trace_status_elements ; /* number of line trace elements */
|
||||
unsigned int base_addr_trace_status_elements ; /* base address of the trace element list */
|
||||
unsigned int next_trace_element_to_use ; /* pointer to the next trace element to be used */
|
||||
unsigned int base_addr_trace_buffer ; /* base address of the trace data buffer */
|
||||
unsigned int end_addr_trace_buffer ; /* end address of the trace data buffer */
|
||||
} TRACE_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the line trace status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* opp flag */
|
||||
unsigned short trace_length ; /* trace length */
|
||||
unsigned char trace_type ; /* trace type */
|
||||
unsigned short trace_time_stamp ; /* time stamp */
|
||||
unsigned short trace_reserved_1 ; /* reserved for later use */
|
||||
unsigned int trace_reserved_2 ; /* reserved for later use */
|
||||
unsigned int ptr_data_bfr ; /* ptr to the trace data buffer */
|
||||
} TRACE_STATUS_ELEMENT_STRUCT;
|
||||
|
||||
/* "trace_type" bit settings */
|
||||
#define TRACE_INCOMING 0x00
|
||||
#define TRACE_OUTGOINGING 0x01
|
||||
#define TRACE_INCOMING_ABORTED 0x10
|
||||
#define TRACE_INCOMING_CRC_ERROR 0x20
|
||||
#define TRACE_INCOMING_OVERRUN_ERROR 0x40
|
||||
|
||||
|
||||
|
||||
/* the line trace statistics structure */
|
||||
typedef struct {
|
||||
unsigned int frames_traced_count ; /* number of frames traced */
|
||||
unsigned int trc_frms_not_recorded_count ; /* number of trace frames discarded */
|
||||
} LINE_TRACE_STATS_STRUCT;
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the FT1_MONITOR_STATUS_CTRL command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
#define DISABLE_FT1_STATUS_STATISTICS 0x00 /* disable the FT1 status and statistics monitoring */
|
||||
#define ENABLE_READ_FT1_STATUS 0x01 /* read the FT1 operational status */
|
||||
#define ENABLE_READ_FT1_OP_STATS 0x02 /* read the FT1 operational statistics */
|
||||
#define FLUSH_FT1_OP_STATS 0x04 /* flush the FT1 operational statistics */
|
||||
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_CHDLC_CONFIGURATION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the CHDLC configuration structure */
|
||||
typedef struct {
|
||||
unsigned int baud_rate ; /* the baud rate */
|
||||
unsigned short line_config_options ; /* line configuration options */
|
||||
unsigned short modem_config_options ; /* modem configration options */
|
||||
unsigned short modem_status_timer ; /* timer for monitoring modem status changes */
|
||||
unsigned short CHDLC_API_options ; /* CHDLC API options */
|
||||
unsigned short CHDLC_protocol_options ; /* CHDLC protocol options */
|
||||
unsigned short percent_data_buffer_for_Tx ; /* percentage data buffering used for Tx */
|
||||
unsigned short CHDLC_statistics_options ; /* CHDLC operational statistics options */
|
||||
unsigned short max_CHDLC_data_field_length ; /* the maximum length of the CHDLC Data field */
|
||||
unsigned short transmit_keepalive_timer ; /* the transmit keepalive timer */
|
||||
unsigned short receive_keepalive_timer ; /* the receive keepalive timer */
|
||||
unsigned short keepalive_error_tolerance ; /* the receive keepalive error tolerance */
|
||||
unsigned short SLARP_request_timer ; /* the SLARP request timer */
|
||||
unsigned int IP_address ; /* the IP address */
|
||||
unsigned int IP_netmask ; /* the IP netmask */
|
||||
unsigned int ptr_shared_mem_info_struct ; /* a pointer to the shared memory area information structure */
|
||||
unsigned int ptr_CHDLC_Tx_stat_el_cfg_struct ; /* a pointer to the transmit status element configuration structure */
|
||||
unsigned int ptr_CHDLC_Rx_stat_el_cfg_struct ; /* a pointer to the receive status element configuration structure */
|
||||
} CHDLC_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'line_config_options' */
|
||||
#define INTERFACE_LEVEL_V35 0x0000
|
||||
/* V.35 interface level */
|
||||
|
||||
#define INTERFACE_LEVEL_RS232 0x0001
|
||||
/* RS-232 interface level */
|
||||
|
||||
#define NRZI_ENCODING 0x0010
|
||||
/* NRZI data encoding */
|
||||
|
||||
#define IDLE_MARK 0x0020
|
||||
/* idle line condition is mark (not flags) */
|
||||
|
||||
|
||||
/* settings for the 'modem_config_options' */
|
||||
|
||||
#define DONT_RAISE_DTR_RTS_ON_EN_COMMS 0x0001
|
||||
/* don't automatically raise DTR and RTS when performing an
|
||||
ENABLE_CHDLC_COMMUNICATIONS command */
|
||||
|
||||
#define DONT_REPORT_CHG_IN_MODEM_STAT 0x0002
|
||||
/* don't report changes in modem status to the application */
|
||||
|
||||
#define SWITCHED_CTS_RTS 0x0010
|
||||
/* switched CTS/RTS */
|
||||
|
||||
|
||||
/* bit settings for the 'CHDLC_protocol_options' byte */
|
||||
|
||||
#define IGNORE_DCD_FOR_LINK_STAT 0x0001
|
||||
/* ignore DCD in determining the CHDLC link status */
|
||||
|
||||
#define IGNORE_CTS_FOR_LINK_STAT 0x0002
|
||||
/* ignore CTS in determining the CHDLC link status */
|
||||
|
||||
#define IGNORE_KPALV_FOR_LINK_STAT 0x0004
|
||||
/* ignore keepalive frames in determining the CHDLC link status */
|
||||
|
||||
#define INSTALL_FAST_INT_HANDLERS 0x1000
|
||||
/* install 'fast' interrupt handlers for improved dual-port perf. */
|
||||
|
||||
#define USE_32_BIT_CRC 0x2000
|
||||
/* use a 32-bit CRC */
|
||||
|
||||
#define SINGLE_TX_BUFFER 0x4000
|
||||
/* configure a single transmit buffer */
|
||||
|
||||
#define HDLC_STREAMING_MODE 0x8000
|
||||
|
||||
/* settings for the 'CHDLC_statistics_options' */
|
||||
|
||||
#define CHDLC_TX_DATA_BYTE_COUNT_STAT 0x0001
|
||||
/* record the number of Data bytes transmitted */
|
||||
|
||||
#define CHDLC_RX_DATA_BYTE_COUNT_STAT 0x0002
|
||||
/* record the number of Data bytes received */
|
||||
|
||||
#define CHDLC_TX_THROUGHPUT_STAT 0x0004
|
||||
/* compute the Data frame transmit throughput */
|
||||
|
||||
#define CHDLC_RX_THROUGHPUT_STAT 0x0008
|
||||
/* compute the Data frame receive throughput */
|
||||
|
||||
|
||||
/* permitted minimum and maximum values for setting the CHDLC configuration */
|
||||
#define PRI_MAX_BAUD_RATE_S508 2666666 /* PRIMARY - maximum baud rate (S508) */
|
||||
#define SEC_MAX_BAUD_RATE_S508 258064 /* SECONDARY - maximum baud rate (S508) */
|
||||
#define PRI_MAX_BAUD_RATE_S514 2750000 /* PRIMARY - maximum baud rate (S508) */
|
||||
#define SEC_MAX_BAUD_RATE_S514 515625 /* SECONDARY - maximum baud rate (S508) */
|
||||
|
||||
#define MIN_MODEM_TIMER 0 /* minimum modem status timer */
|
||||
#define MAX_MODEM_TIMER 5000 /* maximum modem status timer */
|
||||
|
||||
#define SEC_MAX_NO_DATA_BYTES_IN_FRAME 2048 /* SECONDARY - max length of the CHDLC data field */
|
||||
|
||||
#define MIN_Tx_KPALV_TIMER 0 /* minimum transmit keepalive timer */
|
||||
#define MAX_Tx_KPALV_TIMER 60000 /* maximum transmit keepalive timer */
|
||||
#define DEFAULT_Tx_KPALV_TIMER 10000 /* default transmit keepalive timer */
|
||||
|
||||
#define MIN_Rx_KPALV_TIMER 10 /* minimum receive keepalive timer */
|
||||
#define MAX_Rx_KPALV_TIMER 60000 /* maximum receive keepalive timer */
|
||||
#define DEFAULT_Rx_KPALV_TIMER 10000 /* default receive keepalive timer */
|
||||
|
||||
#define MIN_KPALV_ERR_TOL 1 /* min kpalv error tolerance count */
|
||||
#define MAX_KPALV_ERR_TOL 20 /* max kpalv error tolerance count */
|
||||
#define DEFAULT_KPALV_ERR_TOL 3 /* default value */
|
||||
|
||||
#define MIN_SLARP_REQ_TIMER 0 /* min transmit SLARP Request timer */
|
||||
#define MAX_SLARP_REQ_TIMER 60000 /* max transmit SLARP Request timer */
|
||||
#define DEFAULT_SLARP_REQ_TIMER 0 /* default value -- no SLARP */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the READ_CHDLC_LINK_STATUS command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the CHDLC status structure */
|
||||
typedef struct {
|
||||
unsigned char CHDLC_link_status ; /* CHDLC link status */
|
||||
unsigned char no_Data_frms_for_app ; /* number of Data frames available for the application */
|
||||
unsigned char receiver_status ; /* enabled/disabled */
|
||||
unsigned char SLARP_state ; /* internal SLARP state */
|
||||
} CHDLC_LINK_STATUS_STRUCT;
|
||||
|
||||
/* settings for the 'CHDLC_link_status' variable */
|
||||
#define CHDLC_LINK_INACTIVE 0x00 /* the CHDLC link is inactive */
|
||||
#define CHDLC_LINK_ACTIVE 0x01 /* the CHDLC link is active */
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for using application interrupts
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the structure used for the SET_CHDLC_INTERRUPT_TRIGGERS/READ_CHDLC_INTERRUPT_TRIGGERS command */
|
||||
typedef struct {
|
||||
unsigned char CHDLC_interrupt_triggers ; /* CHDLC interrupt trigger configuration */
|
||||
unsigned char IRQ ; /* IRQ to be used */
|
||||
unsigned short interrupt_timer ; /* interrupt timer */
|
||||
unsigned short misc_interrupt_bits ; /* miscellaneous bits */
|
||||
} CHDLC_INT_TRIGGERS_STRUCT;
|
||||
|
||||
/* 'CHDLC_interrupt_triggers' bit settings */
|
||||
#define APP_INT_ON_RX_FRAME 0x01 /* interrupt on Data frame reception */
|
||||
#define APP_INT_ON_TX_FRAME 0x02 /* interrupt when an Data frame may be transmitted */
|
||||
#define APP_INT_ON_COMMAND_COMPLETE 0x04 /* interrupt when an interface command is complete */
|
||||
#define APP_INT_ON_TIMER 0x08 /* interrupt on a defined millisecond timeout */
|
||||
#define APP_INT_ON_GLOBAL_EXCEP_COND 0x10 /* interrupt on a global exception condition */
|
||||
#define APP_INT_ON_CHDLC_EXCEP_COND 0x20 /* interrupt on an CHDLC exception condition */
|
||||
#define APP_INT_ON_TRACE_DATA_AVAIL 0x80 /* interrupt when trace data is available */
|
||||
|
||||
/* interrupt types indicated at 'interrupt_type' byte of the INTERRUPT_INFORMATION_STRUCT */
|
||||
#define NO_APP_INTS_PEND 0x00 /* no interrups are pending */
|
||||
#define RX_APP_INT_PEND 0x01 /* a receive interrupt is pending */
|
||||
#define TX_APP_INT_PEND 0x02 /* a transmit interrupt is pending */
|
||||
#define COMMAND_COMPLETE_APP_INT_PEND 0x04 /* a 'command complete' interrupt is pending */
|
||||
#define TIMER_APP_INT_PEND 0x08 /* a timer interrupt is pending */
|
||||
#define GLOBAL_EXCEP_COND_APP_INT_PEND 0x10 /* a global exception condition interrupt is pending */
|
||||
#define CHDLC_EXCEP_COND_APP_INT_PEND 0x20 /* an CHDLC exception condition interrupt is pending */
|
||||
#define TRACE_DATA_AVAIL_APP_INT_PEND 0x80 /* a trace data available interrupt is pending */
|
||||
|
||||
|
||||
/* modem status changes */
|
||||
#define DCD_HIGH 0x08
|
||||
#define CTS_HIGH 0x20
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for Data frame transmission
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the Data frame transmit status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Tx_status_elements ; /* number of transmit status elements */
|
||||
unsigned int base_addr_Tx_status_elements ; /* base address of the transmit element list */
|
||||
unsigned int next_Tx_status_element_to_use ; /* pointer to the next transmit element to be used */
|
||||
} CHDLC_TX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the Data frame transmit status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* opp flag */
|
||||
unsigned short frame_length ; /* length of the frame to be transmitted */
|
||||
unsigned char misc_Tx_bits ; /* miscellaneous transmit bits */
|
||||
unsigned int reserved_2 ; /* reserved for internal use */
|
||||
unsigned int reserved_3 ; /* reserved for internal use */
|
||||
unsigned int ptr_data_bfr ; /* pointer to the data area */
|
||||
} CHDLC_DATA_TX_STATUS_EL_STRUCT;
|
||||
|
||||
|
||||
/* settings for the 'misc_Tx_bits'
|
||||
* (pertains only to switched CTS/RTS and
|
||||
* 'idle mark' configurations) */
|
||||
|
||||
#define DROP_RTS_AFTER_TX 0x01
|
||||
/* drop RTS after transmission of this frame */
|
||||
|
||||
#define IDLE_FLAGS_AFTER_TX 0x02
|
||||
/* idle flags after transmission of this frame */
|
||||
|
||||
/* settings for the 'misc_Tx_bits' for IPv4/IPv6 usage */
|
||||
#define TX_DATA_IPv4 0x00
|
||||
/* apply the IPv4 CHDLC header to the transmitted Data frame */
|
||||
#define TX_DATA_IPv6 0x80
|
||||
/* apply the IPv6 CHDLC header to the transmitted Data frame */
|
||||
|
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for Data frame reception
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the Data frame receive status element configuration structure */
|
||||
typedef struct {
|
||||
unsigned short number_Rx_status_elements ; /* number of receive status elements */
|
||||
unsigned int base_addr_Rx_status_elements ; /* base address of the receive element list */
|
||||
unsigned int next_Rx_status_element_to_use ; /* pointer to the next receive element to be used */
|
||||
unsigned int base_addr_Rx_buffer ; /* base address of the receive data buffer */
|
||||
unsigned int end_addr_Rx_buffer ; /* end address of the receive data buffer */
|
||||
} CHDLC_RX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/* the Data frame receive status element structure */
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* opp flag */
|
||||
unsigned short frame_length ; /* length of the received frame */
|
||||
unsigned char error_flag ; /* frame errors (HDLC_STREAMING_MODE)*/
|
||||
unsigned short time_stamp ; /* receive time stamp (HDLC_STREAMING_MODE) */
|
||||
unsigned int reserved_1 ; /* reserved for internal use */
|
||||
unsigned short reserved_2 ; /* reserved for internal use */
|
||||
unsigned int ptr_data_bfr ; /* pointer to the data area */
|
||||
} CHDLC_DATA_RX_STATUS_EL_STRUCT;
|
||||
|
||||
|
||||
/* settings for the 'error_flag' */
|
||||
#define RX_FRM_ABORT 0x01
|
||||
#define RX_FRM_CRC_ERROR 0x02
|
||||
#define RX_FRM_OVERRUN_ERROR 0x04
|
||||
|
||||
/* settings for the 'error_flag' for IPv4/IPv6 usage */
|
||||
#define RX_DATA_IPv4 0x00
|
||||
/* the received Data frame is IPv4 */
|
||||
#define RX_DATA_IPv6 0x80
|
||||
/* the received Data frame is IPv6 */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants defining the shared memory information area
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the global information structure */
|
||||
typedef struct {
|
||||
unsigned char global_status ; /* global status */
|
||||
unsigned char modem_status ; /* current modem status */
|
||||
unsigned char global_excep_conditions ; /* global exception conditions */
|
||||
unsigned char glob_info_reserved[5] ; /* reserved */
|
||||
unsigned char codename[4] ; /* Firmware name */
|
||||
unsigned char codeversion[4] ; /* Firmware version */
|
||||
} GLOBAL_INFORMATION_STRUCT;
|
||||
|
||||
/* the CHDLC information structure */
|
||||
typedef struct {
|
||||
unsigned char CHDLC_status ; /* CHDLC status */
|
||||
unsigned char CHDLC_excep_conditions ; /* CHDLC exception conditions */
|
||||
unsigned char CHDLC_info_reserved[14] ; /* reserved */
|
||||
} CHDLC_INFORMATION_STRUCT;
|
||||
|
||||
/* the interrupt information structure */
|
||||
typedef struct {
|
||||
unsigned char interrupt_type ; /* type of interrupt triggered */
|
||||
unsigned char interrupt_permission ; /* interrupt permission mask */
|
||||
unsigned char int_info_reserved[14] ; /* reserved */
|
||||
} INTERRUPT_INFORMATION_STRUCT;
|
||||
|
||||
/* the S508/FT1 information structure */
|
||||
typedef struct {
|
||||
unsigned char parallel_port_A_input ; /* input - parallel port A */
|
||||
unsigned char parallel_port_B_input ; /* input - parallel port B */
|
||||
unsigned char FT1_info_reserved[14] ; /* reserved */
|
||||
} FT1_INFORMATION_STRUCT;
|
||||
|
||||
/* the shared memory area information structure */
|
||||
typedef struct {
|
||||
GLOBAL_INFORMATION_STRUCT global_info_struct ; /* the global information structure */
|
||||
CHDLC_INFORMATION_STRUCT CHDLC_info_struct ; /* the CHDLC information structure */
|
||||
INTERRUPT_INFORMATION_STRUCT interrupt_info_struct ; /* the interrupt information structure */
|
||||
FT1_INFORMATION_STRUCT FT1_info_struct ; /* the S508/FT1 information structure */
|
||||
} SHARED_MEMORY_INFO_STRUCT;
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* UDP Management constants and structures
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* The embedded control block for UDP mgmt
|
||||
This is essentially a mailbox structure, without the large data field */
|
||||
|
||||
#ifndef HDLC_PROT_ONLY
|
||||
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* the opp flag */
|
||||
unsigned char command ; /* the user command */
|
||||
unsigned short buffer_length ; /* the data length */
|
||||
unsigned char return_code ; /* the return code */
|
||||
unsigned char MB_reserved[NUMBER_MB_RESERVED_BYTES] ; /* reserved for later */
|
||||
} cblock_t;
|
||||
|
||||
/* UDP management packet layout (data area of ip packet) */
|
||||
/*
|
||||
typedef struct {
|
||||
unsigned char signature[8] ;
|
||||
unsigned char request_reply ;
|
||||
unsigned char id ;
|
||||
unsigned char reserved[6] ;
|
||||
cblock_t cblock ;
|
||||
unsigned char num_frames ;
|
||||
unsigned char ismoredata ;
|
||||
unsigned char data[SIZEOF_MB_DATA_BFR] ;
|
||||
} udp_management_packet_t;
|
||||
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
unsigned char num_frames ;
|
||||
unsigned char ismoredata ;
|
||||
} trace_info_t;
|
||||
|
||||
#if 0
|
||||
typedef struct {
|
||||
ip_pkt_t ip_pkt ;
|
||||
udp_pkt_t udp_pkt ;
|
||||
wp_mgmt_t wp_mgmt ;
|
||||
cblock_t cblock ;
|
||||
trace_info_t trace_info ;
|
||||
unsigned char data[SIZEOF_MB_DATA_BFR] ;
|
||||
} chdlc_udp_pkt_t;
|
||||
#endif
|
||||
|
||||
typedef struct ft1_exec_cmd{
|
||||
unsigned char command ; /* the user command */
|
||||
unsigned short buffer_length ; /* the data length */
|
||||
unsigned char return_code ; /* the return code */
|
||||
unsigned char MB_reserved[NUMBER_MB_RESERVED_BYTES] ;
|
||||
} ft1_exec_cmd_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned char opp_flag ;
|
||||
ft1_exec_cmd_t cmd ;
|
||||
unsigned char data[SIZEOF_MB_DATA_BFR] ;
|
||||
} ft1_exec_t;
|
||||
|
||||
|
||||
/* By default UDPMGMT Signature is AFT, if user
|
||||
includes the sdla_chdlc.h file then its assumed that
|
||||
they wan't to use legacy API variant */
|
||||
#ifdef UDPMGMT_SIGNATURE
|
||||
#undef UDPMGMT_SIGNATURE
|
||||
#define UDPMGMT_SIGNATURE "CTPIPEAB"
|
||||
#endif
|
||||
|
||||
#define UDPMGMT_SIGNATURE_LEN 8
|
||||
|
||||
|
||||
/* UDP/IP packet (for UDP management) layout */
|
||||
/*
|
||||
typedef struct {
|
||||
unsigned char reserved[2] ;
|
||||
unsigned short ip_length ;
|
||||
unsigned char reserved2[4] ;
|
||||
unsigned char ip_ttl ;
|
||||
unsigned char ip_protocol ;
|
||||
unsigned short ip_checksum ;
|
||||
unsigned int ip_src_address ;
|
||||
unsigned int ip_dst_address ;
|
||||
unsigned short udp_src_port ;
|
||||
unsigned short udp_dst_port ;
|
||||
unsigned short udp_length ;
|
||||
unsigned short udp_checksum ;
|
||||
udp_management_packet_t um_packet ;
|
||||
} ip_packet_t;
|
||||
*/
|
||||
|
||||
/* valid ip_protocol for UDP management */
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
|
||||
#if 0
|
||||
typedef struct {
|
||||
unsigned char status ;
|
||||
unsigned char data_avail ;
|
||||
unsigned short real_length ;
|
||||
unsigned short time_stamp ;
|
||||
unsigned char data[1] ;
|
||||
} trace_pkt_t;
|
||||
#endif
|
||||
|
||||
#endif //HDLC_PROT_ONLY
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for the SET_FT1_CONFIGURATION/READ_FT1_CONFIGURATION command
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the FT1 configuration structure */
|
||||
typedef struct {
|
||||
unsigned short framing_mode;
|
||||
unsigned short encoding_mode;
|
||||
unsigned short line_build_out;
|
||||
unsigned short channel_base;
|
||||
unsigned short baud_rate_kbps; /* the baud rate (in kbps) */
|
||||
unsigned short clock_mode;
|
||||
} ft1_config_t;
|
||||
|
||||
|
||||
|
||||
/* settings for the 'framing_mode' */
|
||||
#define ESF_FRAMING 0x00 /* ESF framing */
|
||||
#define D4_FRAMING 0x01 /* D4 framing */
|
||||
|
||||
/* settings for the 'encoding_mode' */
|
||||
#define B8ZS_ENCODING 0x00 /* B8ZS encoding */
|
||||
#define AMI_ENCODING 0x01 /* AMI encoding */
|
||||
|
||||
/* settings for the 'line_build_out' */
|
||||
#define LN_BLD_CSU_0dB_DSX1_0_to_133 0x00 /* set build out to CSU (0db) or DSX-1 (0-133ft) */
|
||||
#define LN_BLD_DSX1_133_to_266 0x01 /* set build out DSX-1 (133-266ft) */
|
||||
#define LN_BLD_DSX1_266_to_399 0x02 /* set build out DSX-1 (266-399ft) */
|
||||
#define LN_BLD_DSX1_399_to_533 0x03 /* set build out DSX-1 (399-533ft) */
|
||||
#define LN_BLD_DSX1_533_to_655 0x04 /* set build out DSX-1 (533-655ft) */
|
||||
#define LN_BLD_CSU_NEG_7dB 0x05 /* set build out to CSU (-7.5db) */
|
||||
#define LN_BLD_CSU_NEG_15dB 0x06 /* set build out to CSU (-15db) */
|
||||
#define LN_BLD_CSU_NEG_22dB 0x07 /* set build out to CSU (-22.5db) */
|
||||
|
||||
/* settings for the 'channel_base' */
|
||||
#define MIN_CHANNEL_BASE_VALUE 1 /* the minimum permitted channel base value */
|
||||
#define MAX_CHANNEL_BASE_VALUE 24 /* the maximum permitted channel base value */
|
||||
|
||||
/* settings for the 'baud_rate_kbps' */
|
||||
#define MIN_BAUD_RATE_KBPS 0 /* the minimum permitted baud rate (kbps) */
|
||||
#define MAX_BAUD_RATE_KBPS 1536 /* the maximum permitted baud rate (kbps) */
|
||||
#define BAUD_RATE_FT1_AUTO_CONFIG 0xFFFF /* the baud rate used to trigger an automatic FT1 configuration */
|
||||
|
||||
/* settings for the 'clock_mode' */
|
||||
#define CLOCK_MODE_NORMAL 0x00 /* clock mode set to normal (slave) */
|
||||
#define CLOCK_MODE_MASTER 0x01 /* clock mode set to master */
|
||||
|
||||
|
||||
#define BAUD_RATE_FT1_AUTO_CONFIG 0xFFFF
|
||||
#define AUTO_FT1_CONFIG_NOT_COMPLETE 0x08
|
||||
#define AUTO_FT1_CFG_FAIL_OP_MODE 0x0C
|
||||
#define AUTO_FT1_CFG_FAIL_INVALID_LINE 0x0D
|
||||
|
||||
#if !defined(__WINDOWS__)
|
||||
#undef wan_udphdr_data
|
||||
#define wan_udphdr_data wan_udphdr_u.chdlc.data
|
||||
#endif
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#undef wan_udp_data
|
||||
#define wan_udp_data wan_udp_hdr.wan_udphdr_u.chdlc.data
|
||||
#endif
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
#if defined(__LINUX__)
|
||||
enum {
|
||||
SIOC_MBOX_CMD = SIOC_WANPIPE_DEVPRIVATE
|
||||
};
|
||||
#endif
|
||||
|
||||
#endif /* _SDLA_CHDLC_H */
|
|
@ -0,0 +1,167 @@
|
|||
/*************************************************************************
|
||||
* sdla_edu.h Sangoma Educatonal Kit definitions
|
||||
*
|
||||
* Author: David Rokhvarg <davidr@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1984-2004 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the term of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
===========================================================================
|
||||
*
|
||||
* Sep 18, 2001 David Rokhvarg Initial version.
|
||||
*
|
||||
* Jul 30, 2003 David Rokhvarg v 1.0
|
||||
* 1. sdla_load() is not used anymore,
|
||||
* all the loading is done from user mode instead.
|
||||
* All IOCTLs used for loading are not valid anymore.
|
||||
* 2. New IOCTLs added for starting and stopping
|
||||
* the card.
|
||||
*
|
||||
* Nov 17, 2004 David Rokhvarg v 2.0
|
||||
* 1. Removed globals and put into private area
|
||||
* 2. New IOCTLs added for TCP/IP handling.
|
||||
*
|
||||
===========================================================================
|
||||
Organization
|
||||
- Constants defining the shared memory control block (mailbox)
|
||||
- IOCTL codes
|
||||
- Structures for performing IOCTLs
|
||||
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef _SDLA_EDU_H
|
||||
# define _SDLA_EDU_H
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
Notes:
|
||||
|
||||
Compiler Platform
|
||||
------------------------
|
||||
GNU C Linux
|
||||
|
||||
------------------------------------------------------------------------*/
|
||||
|
||||
enum SDLA_COMMAND{
|
||||
|
||||
SDLA_CMD_READ_BYTE = 10,
|
||||
SDLA_CMD_WRITE_BYTE,
|
||||
|
||||
SDLA_CMD_READ_PORT_BYTE,
|
||||
SDLA_CMD_WRITE_PORT_BYTE,
|
||||
|
||||
SDLA_CMD_READ_BLOCK,
|
||||
SDLA_CMD_WRITE_BLOCK,
|
||||
|
||||
SDLA_CMD_GET_CARDS,
|
||||
SDLA_CMD_REGISTER,
|
||||
SDLA_CMD_DEREGISTER,
|
||||
SDLA_CMD_PREPARE_TO_LOAD,
|
||||
SDLA_CMD_LOAD_COMPLETE,
|
||||
SDLA_CMD_ZERO_WINDOW,
|
||||
|
||||
SDLA_CMD_START_S514,
|
||||
SDLA_CMD_STOP_S514,
|
||||
|
||||
SDLA_CMD_IS_TX_DATA_AVAILABLE,
|
||||
SDLA_CMD_COPLETE_TX_REQUEST,
|
||||
|
||||
SDLA_CMD_INDICATE_RX_DATA_AVAILABLE,
|
||||
SDLA_CMD_GET_PCI_ADAPTER_TYPE
|
||||
};
|
||||
|
||||
typedef struct edu_exec_cmd{
|
||||
unsigned char ioctl; // the ioctl code
|
||||
unsigned char return_code;
|
||||
unsigned short buffer_length; // the data length
|
||||
unsigned long offset; // offset on the card
|
||||
}edu_exec_cmd_t;
|
||||
|
||||
#define MAX_TCP_IP_DATA_LEN 800L
|
||||
#define MAX_TX_RX_DATA_SIZE 2000
|
||||
typedef struct{
|
||||
//caller's card number. only card 0 can do IP transactions.
|
||||
unsigned char cardnumber;
|
||||
//operation status
|
||||
unsigned char status;
|
||||
//length of data in 'data'
|
||||
unsigned long buffer_length;
|
||||
unsigned char data[MAX_TX_RX_DATA_SIZE];
|
||||
}TX_RX_DATA;
|
||||
|
||||
//
|
||||
//possible 'status' values in 'TX_RX_DATA' structure on completion of:
|
||||
// 1. SDLA_CMD_COPLETE_TX_REQUEST
|
||||
// 2. SDLA_CMD_IS_TX_DATA_AVAILABLE
|
||||
// 3. SDLA_CMD_INDICATE_RX_DATA_AVAILABLE
|
||||
//
|
||||
enum TX_RX_STATUS{
|
||||
TX_SUCCESS = 1,
|
||||
TX_ERR_PROTOCOL_DOWN,
|
||||
TX_ERR_HARDWARE,
|
||||
TX_RX_REQUEST_INVALID
|
||||
};
|
||||
|
||||
#if !defined(BUILD_FOR_UNIX)
|
||||
#define IOCTL_SDLA CTL_CODE(FILE_DEVICE_UNKNOWN, 0, METHOD_BUFFERED, FILE_ANY_ACCESS)
|
||||
|
||||
typedef struct {
|
||||
unsigned char cardnumber;
|
||||
unsigned long offset;
|
||||
unsigned char value;
|
||||
} XFER_BYTE_CONTROL;
|
||||
|
||||
#define MAX_CARDS 1 //card 0 and card 1 only
|
||||
|
||||
/* structure used for reading and writing blocks */
|
||||
typedef struct {
|
||||
void* buffer;
|
||||
unsigned short num_bytes;
|
||||
unsigned long offset;
|
||||
unsigned char card_number;
|
||||
} SDLA_BLOCKOP;
|
||||
|
||||
typedef struct {
|
||||
unsigned char cardnumber;
|
||||
unsigned char rcode;
|
||||
} CARD_TRANSACTION;
|
||||
|
||||
|
||||
#define MAX_IOCTL_DATA_LEN 4096
|
||||
typedef struct{
|
||||
|
||||
unsigned long command;
|
||||
unsigned long buffer_length;
|
||||
unsigned char return_code;
|
||||
unsigned char data[MAX_IOCTL_DATA_LEN];
|
||||
}SDLA_CTL_BLOCK;
|
||||
|
||||
|
||||
typedef struct{
|
||||
|
||||
void* ndis_adapter;
|
||||
|
||||
}SDLA_DEV_EXTENSION;
|
||||
|
||||
//RESULT MESSAGES
|
||||
|
||||
#define SDLAR_NOT_REGISTERED 0L
|
||||
#define SDLAR_DEREGISTERED 1L
|
||||
#define SDLAR_RELEASED 2L
|
||||
#define SDLAR_REGISTERED 1L
|
||||
#define SDLAR_ALLOCATED 2L
|
||||
|
||||
#define SDLAR_CARD_BLOCKED 0L
|
||||
#define SDLAR_PREPARED 2L
|
||||
#define SDLAR_NOT_PREPARED 0L
|
||||
#define SDLAR_ERROR_PREPARING 3L
|
||||
|
||||
#define DRV_NAME "EduKit"
|
||||
|
||||
#endif //#if !defined(BUILD_FOR_UNIX)
|
||||
|
||||
#endif //_SDLA_EDU_H
|
||||
|
||||
|
|
@ -0,0 +1,551 @@
|
|||
/*****************************************************************************
|
||||
* sdla_fr.h Sangoma frame relay firmware API definitions.
|
||||
*
|
||||
* Author: Gideon Hack
|
||||
* Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2000 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Oct 04, 1999 Gideon Hack Updated API structures
|
||||
* Jun 02, 1999 Gideon Hack Modifications for S514 support
|
||||
* Oct 12, 1997 Jaspreet Singh Added FR_READ_DLCI_IB_MAPPING
|
||||
* Jul 21, 1997 Jaspreet Singh Changed FRRES_TOO_LONG and FRRES_TOO_MANY to
|
||||
* 0x05 and 0x06 respectively.
|
||||
* Dec 23, 1996 Gene Kozin v2.0
|
||||
* Apr 29, 1996 Gene Kozin v1.0 (merged version S502 & S508 definitions).
|
||||
* Sep 26, 1995 Gene Kozin Initial version.
|
||||
*****************************************************************************/
|
||||
#ifndef _SDLA_FR_H
|
||||
#define _SDLA_FR_H
|
||||
|
||||
#include "wanpipe_fr_iface.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Notes:
|
||||
* ------
|
||||
* 1. All structures defined in this file are byte-alined.
|
||||
*
|
||||
* Compiler Platform
|
||||
* -------- --------
|
||||
* GNU C Linux
|
||||
*/
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
|
||||
/* Adapter memory layout */
|
||||
#define FR_MB_VECTOR 0xE000 /* mailbox window vector */
|
||||
#define FR502_RX_VECTOR 0xA000 /* S502 direct receive window vector */
|
||||
#define FR502_MBOX_OFFS 0xF60 /* S502 mailbox offset */
|
||||
#define FR508_MBOX_OFFS 0 /* S508 mailbox offset */
|
||||
#define FR502_FLAG_OFFS 0x1FF0 /* S502 status flags offset */
|
||||
#define FR508_FLAG_OFFS 0x1000 /* S508 status flags offset */
|
||||
#define FR502_RXMB_OFFS 0x900 /* S502 direct receive mailbox offset */
|
||||
#define FR508_TXBC_OFFS 0x1100 /* S508 Tx buffer info offset */
|
||||
#define FR508_RXBC_OFFS 0x1120 /* S508 Rx buffer info offset */
|
||||
|
||||
/* Important constants */
|
||||
#define FR502_MAX_DATA 4096 /* maximum data buffer length */
|
||||
#define FR508_MAX_DATA 4080 /* maximum data buffer length */
|
||||
#define MIN_LGTH_FR_DATA_CFG 300 /* min Information frame length
|
||||
(for configuration purposes) */
|
||||
#define FR_MAX_NO_DATA_BYTES_IN_FRAME 15354 /* max Information frame length */
|
||||
|
||||
#define HIGHEST_VALID_DLCI 991
|
||||
|
||||
/****** Data Structures *****************************************************/
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Frame relay command block.
|
||||
*/
|
||||
typedef struct fr_cmd
|
||||
{
|
||||
unsigned char command ; /* command code */
|
||||
unsigned short length ; /* length of data buffer */
|
||||
unsigned char result ; /* return code */
|
||||
unsigned short dlci ; /* DLCI number */
|
||||
unsigned char attr ; /* FECN, BECN, DE and C/R bits */
|
||||
unsigned short rxlost1 ; /* frames discarded at int. level */
|
||||
unsigned int rxlost2 ; /* frames discarded at app. level */
|
||||
unsigned char rsrv[2] ; /* reserved for future use */
|
||||
} fr_cmd_t;
|
||||
|
||||
|
||||
/* Special UDP drivers management commands */
|
||||
#define FPIPE_ENABLE_TRACING 0x41
|
||||
#define FPIPE_DISABLE_TRACING 0x42
|
||||
#define FPIPE_GET_TRACE_INFO 0x43
|
||||
#define FPIPE_FT1_READ_STATUS 0x44
|
||||
#define FPIPE_DRIVER_STAT_IFSEND 0x45
|
||||
#define FPIPE_DRIVER_STAT_INTR 0x46
|
||||
#define FPIPE_DRIVER_STAT_GEN 0x47
|
||||
#define FPIPE_FLUSH_DRIVER_STATS 0x48
|
||||
#define FPIPE_ROUTER_UP_TIME 0x49
|
||||
#define FPIPE_TE1_56K_STAT 0x50 /* TE1_56K */
|
||||
#define FPIPE_GET_MEDIA_TYPE 0x51 /* TE1_56K */
|
||||
#define FPIPE_FLUSH_TE1_PMON 0x52 /* TE1 */
|
||||
#define FPIPE_READ_REGISTER 0x53 /* TE1_56K */
|
||||
#define FPIPE_TE1_CFG 0x54 /* TE1 */
|
||||
|
||||
/* 'result' field defines */
|
||||
#define FRRES_OK 0x00 /* command executed successfully */
|
||||
#define FRRES_DISABLED 0x01 /* communications not enabled */
|
||||
#define FRRES_INOPERATIVE 0x02 /* channel inoperative */
|
||||
#define FRRES_DLCI_INACTIVE 0x03 /* DLCI is inactive */
|
||||
#define FRRES_DLCI_INVALID 0x04 /* DLCI is not configured */
|
||||
#define FRRES_TOO_LONG 0x05
|
||||
#define FRRES_TOO_MANY 0x06
|
||||
#define FRRES_CIR_OVERFLOW 0x07 /* Tx throughput has exceeded CIR */
|
||||
#define FRRES_BUFFER_OVERFLOW 0x08
|
||||
#define FRRES_MODEM_FAILURE 0x10 /* DCD and/or CTS dropped */
|
||||
#define FRRES_CHANNEL_DOWN 0x11 /* channel became inoperative */
|
||||
#define FRRES_CHANNEL_UP 0x12 /* channel became operative */
|
||||
#define FRRES_DLCI_CHANGE 0x13 /* DLCI status (or number) changed */
|
||||
#define FRRES_DLCI_MISMATCH 0x14
|
||||
#define FRRES_INVALID_CMD 0x1F /* invalid command */
|
||||
|
||||
/* 'attr' field defines */
|
||||
#define FRATTR_
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* S502 frame relay status flags.
|
||||
* This structure is located at offset FR502_FLAG_OFFS into FR_MB_VECTOR.
|
||||
*/
|
||||
typedef struct fr502_flags
|
||||
{
|
||||
unsigned char rsrv1[1] ; /* 00h: */
|
||||
unsigned char tx_ready ; /* 01h: Tx buffer available */
|
||||
unsigned char rx_ready ; /* 02h: Rx frame available */
|
||||
unsigned char event ; /* 03h: asynchronous event */
|
||||
unsigned char mstatus ; /* 04h: modem status */
|
||||
unsigned char rsrv2[8] ; /* 05h: */
|
||||
unsigned char iflag ; /* 0Dh: interrupt flag */
|
||||
unsigned char imask ; /* 0Eh: interrupt mask */
|
||||
} fr502_flags_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* S508 frame relay status flags.
|
||||
* This structure is located at offset FR508_FLAG_OFFS into FR_MB_VECTOR.
|
||||
*/
|
||||
typedef struct fr508_flags
|
||||
{
|
||||
unsigned char rsrv1[3] ; /* 00h: reserved */
|
||||
unsigned char event ; /* 03h: asynchronous event */
|
||||
unsigned char mstatus ; /* 04h: modem status */
|
||||
unsigned char rsrv2[11] ; /* 05h: reserved */
|
||||
unsigned char iflag ; /* 10h: interrupt flag */
|
||||
unsigned char imask ; /* 11h: interrupt mask */
|
||||
unsigned int tse_offs ; /* 12h: Tx status element */
|
||||
unsigned short dlci ; /* 16h: DLCI NUMBER */
|
||||
} fr508_flags_t;
|
||||
|
||||
/* 'event' field defines */
|
||||
#define FR_EVENT_STATUS 0x01 /* channel status change */
|
||||
#define FR_EVENT_DLC_STATUS 0x02 /* DLC status change */
|
||||
#define FR_EVENT_BAD_DLCI 0x04 /* FSR included wrong DLCI */
|
||||
#define FR_EVENT_LINK_DOWN 0x40 /* DCD or CTS low */
|
||||
|
||||
/* 'mstatus' field defines */
|
||||
#define FR_MDM_DCD 0x08 /* mdm_status: DCD */
|
||||
#define FR_MDM_CTS 0x20 /* mdm_status: CTS */
|
||||
|
||||
/* 'iflag' & 'imask' fields defines */
|
||||
#define FR_INTR_RXRDY 0x01 /* Rx ready */
|
||||
#define FR_INTR_TXRDY 0x02 /* Tx ready */
|
||||
#define FR_INTR_MODEM 0x04 /* modem status change (DCD, CTS) */
|
||||
#define FR_INTR_READY 0x08 /* interface command completed */
|
||||
#define FR_INTR_DLC 0x10 /* DLC status change */
|
||||
#define FR_INTR_TIMER 0x20 /* millisecond timer */
|
||||
#define FR_INTR_TX_MULT_DLCIs 0x80 /* Tx interrupt on multiple DLCIs */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Receive Buffer Configuration Info. S508 only!
|
||||
* This structure is located at offset FR508_RXBC_OFFS into FR_MB_VECTOR.
|
||||
*/
|
||||
typedef struct fr_buf_info
|
||||
{
|
||||
unsigned short rse_num ; /* 00h: number of status elements */
|
||||
unsigned int rse_base ; /* 02h: receive status array base */
|
||||
unsigned int rse_next ; /* 06h: next status element */
|
||||
unsigned int buf_base ; /* 0Ah: rotational buffer base */
|
||||
unsigned short reserved ; /* 0Eh: */
|
||||
unsigned int buf_top ; /* 10h: rotational buffer top */
|
||||
} fr_buf_info_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Buffer Status Element. S508 only!
|
||||
* Array of structures of this type is located at offset defined by the
|
||||
* 'rse_base' field of the frBufInfo_t structure into absolute adapter
|
||||
* memory address space.
|
||||
*/
|
||||
typedef struct fr_rx_buf_ctl
|
||||
{
|
||||
unsigned char flag ; /* 00h: ready flag */
|
||||
unsigned short length ; /* 01h: frame length */
|
||||
unsigned short dlci ; /* 03h: DLCI */
|
||||
unsigned char attr ; /* 05h: FECN/BECN/DE/CR */
|
||||
unsigned short tmstamp ; /* 06h: time stamp */
|
||||
unsigned short rsrv[2] ; /* 08h: */
|
||||
unsigned int offset ; /* 0Ch: buffer absolute address */
|
||||
} fr_rx_buf_ctl_t;
|
||||
|
||||
typedef struct fr_tx_buf_ctl
|
||||
{
|
||||
unsigned char flag ; /* 00h: ready flag */
|
||||
unsigned short rsrv0[2] ; /* 01h: */
|
||||
unsigned short length ; /* 05h: frame length */
|
||||
unsigned short dlci ; /* 07h: DLCI */
|
||||
unsigned char attr ; /* 09h: FECN/BECN/DE/CR */
|
||||
unsigned short rsrv1 ; /* 0Ah: */
|
||||
unsigned int offset ; /* 0Ch: buffer absolute address */
|
||||
} fr_tx_buf_ctl_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Configuration Block. Passed to FR_SET_CONFIG command when dlci == 0.
|
||||
*/
|
||||
typedef struct fr_conf
|
||||
{
|
||||
unsigned short station ; /* 00h: CPE/Node */
|
||||
unsigned short options ; /* 02h: configuration options */
|
||||
unsigned short kbps ; /* 04h: baud rate in kbps */
|
||||
unsigned short port ; /* 06h: RS-232/V.35 */
|
||||
unsigned short mtu ; /* 08h: max. transmit length */
|
||||
unsigned short t391 ; /* 0Ah: */
|
||||
unsigned short t392 ; /* 0Ch: */
|
||||
unsigned short n391 ; /* 0Eh: */
|
||||
unsigned short n392 ; /* 10h: */
|
||||
unsigned short n393 ; /* 12h: */
|
||||
unsigned short cir_fwd ; /* 14h: */
|
||||
unsigned short bc_fwd ; /* 16h: */
|
||||
unsigned short be_fwd ; /* 18h: */
|
||||
unsigned short cir_bwd ; /* 1Ah: */
|
||||
unsigned short bc_bwd ; /* 1Ch: */
|
||||
unsigned short be_bwd ; /* 1Eh: */
|
||||
unsigned short dlci[0] ; /* 20h: */
|
||||
} fr_conf_t;
|
||||
|
||||
/* 'station_type' defines */
|
||||
#define FRCFG_STATION_CPE 0
|
||||
#define FRCFG_STATION_NODE 1
|
||||
|
||||
/* 'conf_flags' defines */
|
||||
#define FRCFG_IGNORE_TX_CIR 0x0001
|
||||
#define FRCFG_IGNORE_RX_CIR 0x0002
|
||||
#define FRCFG_DONT_RETRANSMIT 0x0004
|
||||
#define FRCFG_IGNORE_CBS 0x0008
|
||||
#define FRCFG_THROUGHPUT 0x0010 /* enable throughput calculation */
|
||||
#define FRCFG_DIRECT_RX 0x0080 /* enable direct receive buffer */
|
||||
#define FRCFG_AUTO_CONFIG 0x8000 /* enable auto DLCI configuration */
|
||||
|
||||
/* 'baud_rate' defines */
|
||||
#define FRCFG_BAUD_1200 12
|
||||
#define FRCFG_BAUD_2400 24
|
||||
#define FRCFG_BAUD_4800 48
|
||||
#define FRCFG_BAUD_9600 96
|
||||
#define FRCFG_BAUD_19200 19
|
||||
#define FRCFG_BAUD_38400 38
|
||||
#define FRCFG_BAUD_56000 56
|
||||
#define FRCFG_BAUD_64000 64
|
||||
#define FRCFG_BAUD_128000 128
|
||||
|
||||
/* 'port_mode' defines */
|
||||
#define FRCFG_MODE_EXT_CLK 0x0000
|
||||
#define FRCFG_MODE_INT_CLK 0x0001
|
||||
#define FRCFG_MODE_V35 0x0000 /* S508 only */
|
||||
#define FRCFG_MODE_RS232 0x0002 /* S508 only */
|
||||
|
||||
/* defines for line tracing */
|
||||
|
||||
/* the line trace status element presented by the frame relay code */
|
||||
typedef struct {
|
||||
unsigned char flag ; /* ready flag */
|
||||
unsigned short length ; /* trace length */
|
||||
unsigned char rsrv0[2] ; /* reserved */
|
||||
unsigned char attr ; /* trace attributes */
|
||||
unsigned short tmstamp ; /* time stamp */
|
||||
unsigned char rsrv1[4] ; /* reserved */
|
||||
unsigned int offset ; /* buffer absolute address */
|
||||
} fr_trc_el_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned char status ; /* status flag */
|
||||
unsigned char data_passed ; /* 0 if no data passed, 1 if */
|
||||
/* data passed */
|
||||
unsigned short length ; /* frame length */
|
||||
unsigned short tmstamp ; /* time stamp */
|
||||
} fpipemon_trc_hdr_t;
|
||||
|
||||
typedef struct {
|
||||
fpipemon_trc_hdr_t fpipemon_trc_hdr ;
|
||||
unsigned char data[FR_MAX_NO_DATA_BYTES_IN_FRAME] ;
|
||||
} fpipemon_trc_t;
|
||||
|
||||
/* bit settings for the 'status' byte - note that bits 1, 2 and 3 are used */
|
||||
/* for returning the number of frames being passed to fpipemon */
|
||||
#define TRC_INCOMING_FRM 0x00
|
||||
#define TRC_OUTGOING_FRM 0x01
|
||||
#define TRC_ABORT_ERROR 0x10
|
||||
#define TRC_CRC_ERROR 0x20
|
||||
#define TRC_OVERRUN_ERROR 0x40
|
||||
#define MORE_TRC_DATA 0x80
|
||||
|
||||
#define MAX_FRMS_TRACED 0x07
|
||||
|
||||
#define NO_TRC_ELEMENTS_OFF 0x9000
|
||||
#define BASE_TRC_ELEMENTS_OFF 0x9002
|
||||
#define TRC_ACTIVE 0x01
|
||||
#define FLUSH_TRC_BUFFERS 0x02
|
||||
#define FLUSH_TRC_STATISTICS 0x04
|
||||
#define TRC_SIGNALLING_FRMS 0x10
|
||||
#define TRC_INFO_FRMS 0x20
|
||||
#define ACTIVATE_TRC (TRC_ACTIVE | TRC_SIGNALLING_FRMS | TRC_INFO_FRMS)
|
||||
#define RESET_TRC (FLUSH_TRC_BUFFERS | FLUSH_TRC_STATISTICS)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Channel configuration.
|
||||
* This structure is passed to the FR_SET_CONFIG command when dlci != 0.
|
||||
*/
|
||||
typedef struct fr_dlc_conf
|
||||
{
|
||||
unsigned short conf_flags ; /* 00h: configuration bits */
|
||||
unsigned short cir_fwd ; /* 02h: */
|
||||
unsigned short bc_fwd ; /* 04h: */
|
||||
unsigned short be_fwd ; /* 06h: */
|
||||
unsigned short cir_bwd ; /* 08h: */
|
||||
unsigned short bc_bwd ; /* 0Ah: */
|
||||
unsigned short be_bwd ; /* 0Ch: */
|
||||
} fr_dlc_conf_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* S502 interrupt mode control block.
|
||||
* This structure is passed to the FR_SET_INTR_FLAGS and returned by the
|
||||
* FR_READ_INTR_FLAGS commands.
|
||||
*/
|
||||
typedef struct fr502_intr_ctl
|
||||
{
|
||||
unsigned char mode ; /* 00h: interrupt enable flags */
|
||||
unsigned short tx_len ; /* 01h: required Tx buffer size */
|
||||
} fr502_intr_ctl_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* S508 interrupt mode control block.
|
||||
* This structure is passed to the FR_SET_INTR_FLAGS and returned by the
|
||||
* FR_READ_INTR_FLAGS commands.
|
||||
*/
|
||||
typedef struct fr508_intr_ctl
|
||||
{
|
||||
unsigned char mode ; /* 00h: interrupt enable flags */
|
||||
unsigned short tx_len ; /* 01h: required Tx buffer size */
|
||||
unsigned char irq ; /* 03h: IRQ level to activate */
|
||||
unsigned char flags ; /* 04h: ?? */
|
||||
unsigned short timeout ; /* 05h: ms, for timer interrupt */
|
||||
} fr508_intr_ctl_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Channel status.
|
||||
* This structure is returned by the FR_READ_STATUS command.
|
||||
*/
|
||||
typedef struct fr_dlc_Status
|
||||
{
|
||||
unsigned char status ; /* 00h: link/DLCI status */
|
||||
struct
|
||||
{
|
||||
unsigned short dlci ; /* 01h: DLCI number */
|
||||
unsigned char status ; /* 03h: DLCI status */
|
||||
} circuit[1] ;
|
||||
} fr_dlc_status_t;
|
||||
|
||||
/* 'status' defines */
|
||||
#define FR_LINK_INOPER 0x00 /* for global status (DLCI == 0) */
|
||||
#define FR_LINK_OPER 0x01
|
||||
|
||||
#define FR_DLCI_INOPER 0x00
|
||||
#define FR_DLCI_DELETED 0x01 /* for circuit status (DLCI != 0) */
|
||||
#define FR_DLCI_ACTIVE 0x02
|
||||
#define FR_DLCI_WAITING 0x04
|
||||
#define FR_DLCI_NEW 0x08
|
||||
#define FR_DLCI_REPORT 0x40
|
||||
|
||||
#if 0
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Statistics Block.
|
||||
* This structure is returned by the FR_READ_STATISTICS command when
|
||||
* dcli == 0.
|
||||
*/
|
||||
typedef struct fr_link_stat
|
||||
{
|
||||
unsigned short rx_too_long ; /* 00h: */
|
||||
unsigned short rx_dropped ; /* 02h: */
|
||||
unsigned short rx_dropped2 ; /* 04h: */
|
||||
unsigned short rx_bad_dlci ; /* 06h: */
|
||||
unsigned short rx_bad_format ; /* 08h: */
|
||||
unsigned short retransmitted ; /* 0Ah: */
|
||||
unsigned short cpe_tx_FSE ; /* 0Ch: */
|
||||
unsigned short cpe_tx_LIV ; /* 0Eh: */
|
||||
unsigned short cpe_rx_FSR ; /* 10h: */
|
||||
unsigned short cpe_rx_LIV ; /* 12h: */
|
||||
unsigned short node_rx_FSE ; /* 14h: */
|
||||
unsigned short node_rx_LIV ; /* 16h: */
|
||||
unsigned short node_tx_FSR ; /* 18h: */
|
||||
unsigned short node_tx_LIV ; /* 1Ah: */
|
||||
unsigned short rx_ISF_err ; /* 1Ch: */
|
||||
unsigned short rx_unsolicited ; /* 1Eh: */
|
||||
unsigned short rx_SSN_err ; /* 20h: */
|
||||
unsigned short rx_RSN_err ; /* 22h: */
|
||||
unsigned short T391_timeouts ; /* 24h: */
|
||||
unsigned short T392_timeouts ; /* 26h: */
|
||||
unsigned short N392_reached ; /* 28h: */
|
||||
unsigned short cpe_SSN_RSN ; /* 2Ah: */
|
||||
unsigned short current_SSN ; /* 2Ch: */
|
||||
unsigned short current_RSN ; /* 2Eh: */
|
||||
unsigned short curreny_T391 ; /* 30h: */
|
||||
unsigned short current_T392 ; /* 32h: */
|
||||
unsigned short current_N392 ; /* 34h: */
|
||||
unsigned short current_N393 ; /* 36h: */
|
||||
} fr_link_stat_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* DLCI statistics.
|
||||
* This structure is returned by the FR_READ_STATISTICS command when
|
||||
* dlci != 0.
|
||||
*/
|
||||
typedef struct fr_dlci_stat
|
||||
{
|
||||
unsigned int tx_frames ; /* 00h: */
|
||||
unsigned int tx_bytes ; /* 04h: */
|
||||
unsigned int rx_frames ; /* 08h: */
|
||||
unsigned int rx_bytes ; /* 0Ch: */
|
||||
unsigned int rx_dropped ; /* 10h: */
|
||||
unsigned int rx_inactive ; /* 14h: */
|
||||
unsigned int rx_exceed_CIR ; /* 18h: */
|
||||
unsigned int rx_DE_set ; /* 1Ch: */
|
||||
unsigned int tx_throughput ; /* 20h: */
|
||||
unsigned int tx_calc_timer ; /* 24h: */
|
||||
unsigned int rx_throughput ; /* 28h: */
|
||||
unsigned int rx_calc_timer ; /* 2Ch: */
|
||||
} fr_dlci_stat_t;
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Communications error statistics.
|
||||
* This structure is returned by the FR_READ_ERROR_STATS command.
|
||||
*/
|
||||
typedef struct fr_comm_stat
|
||||
{
|
||||
unsigned char rx_overruns ; /* 00h: */
|
||||
unsigned char rx_bad_crc ; /* 01h: */
|
||||
unsigned char rx_aborts ; /* 02h: */
|
||||
unsigned char rx_too_long ; /* 03h: */
|
||||
unsigned char tx_aborts ; /* 04h: */
|
||||
unsigned char tx_underruns ; /* 05h: */
|
||||
unsigned char tx_missed_undr ; /* 06h: */
|
||||
unsigned char dcd_dropped ; /* 07h: */
|
||||
unsigned char cts_dropped ; /* 08h: */
|
||||
} fr_comm_stat_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Defines for the FR_ISSUE_IS_FRAME command.
|
||||
*/
|
||||
#define FR_ISF_LVE 2 /* issue Link Verification Enquiry */
|
||||
#define FR_ISF_FSE 3 /* issue Full Status Enquiry */
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Frame Relay ARP Header -- Used for Dynamic route creation with InvARP
|
||||
*/
|
||||
|
||||
typedef struct arphdr_fr
|
||||
{
|
||||
unsigned short ar_hrd ; /* format of hardware addr */
|
||||
unsigned short ar_pro ; /* format of protocol addr */
|
||||
unsigned char ar_hln ; /* length of hardware addr */
|
||||
unsigned char ar_pln ; /* length of protocol addr */
|
||||
unsigned short ar_op ; /* ARP opcode */
|
||||
unsigned short ar_sha ; /* Sender DLCI addr 2 bytes */
|
||||
unsigned int ar_sip ; /* Sender IP addr 4 bytes */
|
||||
unsigned short ar_tha ; /* Target DLCI addr 2 bytes */
|
||||
unsigned int ar_tip ; /* Target IP addr 4 bytes */
|
||||
} arphdr_fr_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Frame Relay RFC 1490 SNAP Header -- Used to check for ARP packets
|
||||
*/
|
||||
typedef struct arphdr_1490
|
||||
{
|
||||
unsigned char control ; /* UI, etc... */
|
||||
unsigned char pad ; /* Pad */
|
||||
unsigned char NLPID ; /* SNAP */
|
||||
unsigned char OUI[3] ; /* Ethertype, etc... */
|
||||
unsigned short PID ; /* ARP, IP, etc... */
|
||||
} arphdr_1490_t;
|
||||
|
||||
/* valid ip_protocol for UDP management */
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
|
||||
#define UDPMGMT_FPIPE_SIGNATURE "FPIPE8ND"
|
||||
#define UDPMGMT_DRVRSTATS_SIGNATURE "DRVSTATS"
|
||||
|
||||
/* values for request/reply byte */
|
||||
#define UDPMGMT_REQUEST 0x01
|
||||
#define UDPMGMT_REPLY 0x02
|
||||
#define UDP_OFFSET 12
|
||||
|
||||
typedef struct {
|
||||
unsigned int if_send_entry;
|
||||
unsigned int if_send_skb_null;
|
||||
unsigned int if_send_broadcast;
|
||||
unsigned int if_send_multicast;
|
||||
unsigned int if_send_critical_ISR;
|
||||
unsigned int if_send_critical_non_ISR;
|
||||
unsigned int if_send_busy;
|
||||
unsigned int if_send_busy_timeout;
|
||||
unsigned int if_send_DRVSTATS_request;
|
||||
unsigned int if_send_FPIPE_request;
|
||||
unsigned int if_send_wan_disconnected;
|
||||
unsigned int if_send_dlci_disconnected;
|
||||
unsigned int if_send_no_bfrs;
|
||||
unsigned int if_send_adptr_bfrs_full;
|
||||
unsigned int if_send_bfrs_passed_to_adptr;
|
||||
unsigned int if_send_consec_send_fail;
|
||||
} drvstats_if_send_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned int rx_intr_no_socket;
|
||||
unsigned int rx_intr_dev_not_started;
|
||||
unsigned int rx_intr_DRVSTATS_request;
|
||||
unsigned int rx_intr_FPIPE_request;
|
||||
unsigned int rx_intr_bfr_not_passed_to_stack;
|
||||
unsigned int rx_intr_bfr_passed_to_stack;
|
||||
} drvstats_rx_intr_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned int UDP_FPIPE_mgmt_kmalloc_err;
|
||||
unsigned int UDP_FPIPE_mgmt_direction_err;
|
||||
unsigned int UDP_FPIPE_mgmt_adptr_type_err;
|
||||
unsigned int UDP_FPIPE_mgmt_adptr_cmnd_OK;
|
||||
unsigned int UDP_FPIPE_mgmt_adptr_cmnd_timeout;
|
||||
unsigned int UDP_FPIPE_mgmt_adptr_send_passed;
|
||||
unsigned int UDP_FPIPE_mgmt_adptr_send_failed;
|
||||
unsigned int UDP_FPIPE_mgmt_not_passed_to_stack;
|
||||
unsigned int UDP_FPIPE_mgmt_passed_to_stack;
|
||||
unsigned int UDP_FPIPE_mgmt_no_socket;
|
||||
unsigned int UDP_DRVSTATS_mgmt_kmalloc_err;
|
||||
unsigned int UDP_DRVSTATS_mgmt_adptr_cmnd_OK;
|
||||
unsigned int UDP_DRVSTATS_mgmt_adptr_cmnd_timeout;
|
||||
unsigned int UDP_DRVSTATS_mgmt_adptr_send_passed;
|
||||
unsigned int UDP_DRVSTATS_mgmt_adptr_send_failed;
|
||||
unsigned int UDP_DRVSTATS_mgmt_not_passed_to_stack;
|
||||
unsigned int UDP_DRVSTATS_mgmt_passed_to_stack;
|
||||
unsigned int UDP_DRVSTATS_mgmt_no_socket;
|
||||
} drvstats_gen_t;
|
||||
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* _SDLA_FR_H */
|
||||
|
|
@ -0,0 +1,657 @@
|
|||
/*
|
||||
*************************************************************************************
|
||||
* *
|
||||
* sdla_front_end.h - the 'C' header file for the Sangoma S508/S514 adapter front-end API. *
|
||||
* *
|
||||
*************************************************************************************
|
||||
*/
|
||||
#ifndef _SDLA_FRONT_END_H_
|
||||
#define _SDLA_FRONT_END_H_
|
||||
|
||||
|
||||
# include "sdla_56k.h"
|
||||
# include "sdla_te1.h"
|
||||
# include "sdla_te3.h"
|
||||
# include "sdla_remora.h"
|
||||
# include "sdla_bri.h"
|
||||
# include "sdla_serial.h"
|
||||
# include "sdla_gsm.h"
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
* DEFINES AND MACROS *
|
||||
*************************************************************************
|
||||
*/
|
||||
/* Front-End media type */
|
||||
#define WAN_MEDIA_NONE 0x00
|
||||
#define WAN_MEDIA_T1 0x01
|
||||
#define WAN_MEDIA_E1 0x02
|
||||
#define WAN_MEDIA_56K 0x03
|
||||
#define WAN_MEDIA_DS3 0x04
|
||||
#define WAN_MEDIA_E3 0x05
|
||||
#define WAN_MEDIA_STS1 0x06
|
||||
#define WAN_MEDIA_J1 0x07
|
||||
#define WAN_MEDIA_FXOFXS 0x08
|
||||
#define WAN_MEDIA_BRI 0x09
|
||||
#define WAN_MEDIA_SERIAL 0x0A
|
||||
#define WAN_MEDIA_GSM 0x0B
|
||||
|
||||
/*The line code */
|
||||
#define WAN_LCODE_NONE 0x00
|
||||
#define WAN_LCODE_AMI 0x01 /* T1/E1/DS3/E3 */
|
||||
#define WAN_LCODE_B8ZS 0x02 /* T1 */
|
||||
#define WAN_LCODE_HDB3 0x03 /* E1/E3 */
|
||||
#define WAN_LCODE_B3ZS 0x04 /* DS3 */
|
||||
|
||||
/* Framing modes */
|
||||
#define WAN_FR_NONE 0x00
|
||||
#define WAN_FR_ESF 0x01
|
||||
#define WAN_FR_D4 0x02
|
||||
#define WAN_FR_ESF_JAPAN 0x03
|
||||
#define WAN_FR_CRC4 0x04
|
||||
#define WAN_FR_NCRC4 0x05
|
||||
#define WAN_FR_UNFRAMED 0x06
|
||||
#define WAN_FR_E3_G751 0x07
|
||||
#define WAN_FR_E3_G832 0x08
|
||||
#define WAN_FR_DS3_Cbit 0x09
|
||||
#define WAN_FR_DS3_M13 0x0A
|
||||
#define WAN_FR_SLC96 0x0B
|
||||
|
||||
/* Clocking Master/Normal */
|
||||
#define WAN_NORMAL_CLK 0x01
|
||||
#define WAN_MASTER_CLK 0x02
|
||||
|
||||
/* Serial Card FE options */
|
||||
#define WAN_FE_V35 0x01
|
||||
#define WAN_FE_RS232 0x02
|
||||
|
||||
/* Front-End DEBUG flags */
|
||||
#define WAN_FE_DEBUG_NONE 0x00
|
||||
#define WAN_FE_DEBUG_RBS 0x01
|
||||
#define WAN_FE_DEBUG_ALARM 0x02
|
||||
#define WAN_FE_DEBUG_VOLTAGE 0x03
|
||||
#define WAN_FE_DEBUG_RECONFIG 0x04
|
||||
#define WAN_FE_DEBUG_REG 0x05
|
||||
#define WAN_FE_DEBUG_CONFIG_VERIFY 0x06
|
||||
#define WAN_FE_DEBUG_HOOK 0x07
|
||||
|
||||
/* Front-End DEBUG sub-flags */
|
||||
/* Sub-flags for RBS debugging */
|
||||
#define WAN_FE_DEBUG_RBS_RX_ENABLE 0x01
|
||||
#define WAN_FE_DEBUG_RBS_TX_ENABLE 0x02
|
||||
#define WAN_FE_DEBUG_RBS_RX_DISABLE 0x03
|
||||
#define WAN_FE_DEBUG_RBS_TX_DISABLE 0x04
|
||||
#define WAN_FE_DEBUG_RBS_READ 0x05
|
||||
#define WAN_FE_DEBUG_RBS_SET 0x06
|
||||
#define WAN_FE_DEBUG_RBS_PRINT 0x07
|
||||
#define WAN_FE_DEBUG_RBS_DECODE(mode) \
|
||||
((mode) == WAN_FE_DEBUG_RBS_RX_ENABLE) ? "Enable RBS RX" : \
|
||||
((mode) == WAN_FE_DEBUG_RBS_TX_ENABLE) ? "Enable RBS TX" : \
|
||||
((mode) == WAN_FE_DEBUG_RBS_RX_DISABLE) ? "Disable RBS RX" : \
|
||||
((mode) == WAN_FE_DEBUG_RBS_TX_DISABLE) ? "Disable RBS TX" : \
|
||||
((mode) == WAN_FE_DEBUG_RBS_READ) ? "Read RBS" : \
|
||||
((mode) == WAN_FE_DEBUG_RBS_SET) ? "Set RBS" : \
|
||||
((mode) == WAN_FE_DEBUG_RBS_PRINT) ? "Print RBS" : "Unknown"
|
||||
|
||||
/* Sub-flags for ALARM debugging */
|
||||
#define WAN_FE_DEBUG_ALARM_AIS_ENABLE 0x01
|
||||
#define WAN_FE_DEBUG_ALARM_AIS_DISABLE 0x02
|
||||
#define WAN_FE_DEBUG_ALARM_DECODE(mode) \
|
||||
((mode) == WAN_FE_DEBUG_ALARM_AIS_ENABLE) ? "Enable TX AIS" : \
|
||||
((mode) == WAN_FE_DEBUG_ALARM_AIS_DISABLE) ? "Disable TX AIS" : \
|
||||
"Unknown"
|
||||
|
||||
/* Front-End TX tri-state mode flags */
|
||||
#define WAN_FE_TXMODE_ENABLE 0x01
|
||||
#define WAN_FE_TXMODE_DISABLE 0x02
|
||||
|
||||
/* Read alarm flag */
|
||||
#define WAN_FE_ALARM_NONE 0x00
|
||||
#define WAN_FE_ALARM_READ 0x01
|
||||
#define WAN_FE_ALARM_PRINT 0x02
|
||||
#define WAN_FE_ALARM_UPDATE 0x04
|
||||
#define IS_FE_ALARM_READ(action) ((action) & WAN_FE_ALARM_READ)
|
||||
#define IS_FE_ALARM_PRINT(action) ((action) & WAN_FE_ALARM_PRINT)
|
||||
#define IS_FE_ALARM_UPDATE(action) ((action) & WAN_FE_ALARM_UPDATE)
|
||||
|
||||
/* Read pmon flag */
|
||||
#define WAN_FE_PMON_UPDATE 0x01
|
||||
#define WAN_FE_PMON_PRINT 0x02
|
||||
#define WAN_FE_PMON_READ 0x04
|
||||
#define IS_FE_PMON_UPDATE(action) ((action) & WAN_FE_PMON_UPDATE)
|
||||
#define IS_FE_PMON_PRINT(action) ((action) & WAN_FE_PMON_PRINT)
|
||||
#define IS_FE_PMON_READ(action) ((action) & WAN_FE_PMON_READ)
|
||||
|
||||
/* FE interrupt action command */
|
||||
#define WAN_FE_INTR_ENABLE 0x01
|
||||
#define WAN_FE_INTR_MASK 0x02
|
||||
|
||||
/* FE event action command */
|
||||
#define WAN_FE_EVENT_ENABLE 0x01
|
||||
#define WAN_FE_EVENT_MASK 0x02
|
||||
|
||||
/* Alaw/Mulaw */
|
||||
#define WAN_TDMV_ALAW 0x01
|
||||
#define WAN_TDMV_MULAW 0x02
|
||||
#define WAN_TDMV_HDLC 0x03
|
||||
|
||||
#define FE_MEDIA(fe_cfg) ((fe_cfg)->media)
|
||||
#define FE_SUBMEDIA(fe_cfg) ((fe_cfg)->sub_media)
|
||||
#define FE_LCODE(fe_cfg) ((fe_cfg)->lcode)
|
||||
#define FE_FRAME(fe_cfg) ((fe_cfg)->frame)
|
||||
#define FE_LINENO(fe_cfg) ((fe_cfg)->line_no)
|
||||
#define FE_TXTRISTATE(fe_cfg) ((fe_cfg)->tx_tristate_mode)
|
||||
#define FE_TDMV_LAW(fe_cfg) ((fe_cfg)->tdmv_law)
|
||||
#define FE_NETWORK_SYNC(fe_cfg) ((fe_cfg)->network_sync)
|
||||
|
||||
#define IS_T1_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_T1)
|
||||
#define IS_E1_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_E1)
|
||||
#define IS_J1_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_T1 && \
|
||||
FE_SUBMEDIA(fe_cfg) == WAN_MEDIA_J1)
|
||||
#define IS_TE1_MEDIA(fe_cfg) (IS_T1_MEDIA(fe_cfg) || \
|
||||
IS_E1_MEDIA(fe_cfg) || \
|
||||
IS_J1_MEDIA(fe_cfg))
|
||||
#define IS_56K_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_56K)
|
||||
#define IS_TE1_56K_MEDIA(fe_cfg)(IS_TE1_MEDIA(fe_cfg) || \
|
||||
IS_56K_MEDIA(fe_cfg)
|
||||
#define IS_DS3_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_DS3)
|
||||
#define IS_E3_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_E3)
|
||||
#define IS_FXOFXS_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_FXOFXS)
|
||||
#define IS_BRI_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_BRI)
|
||||
#define IS_GSM_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_GSM)
|
||||
#define IS_SERIAL_MEDIA(fe_cfg) (FE_MEDIA(fe_cfg) == WAN_MEDIA_SERIAL)
|
||||
|
||||
#define IS_TXTRISTATE(fe_cfg) (FE_TXTRISTATE(fe_cfg) == WANOPT_YES)
|
||||
|
||||
#define IS_FR_UNFRAMED(fe_cfg) (FE_FRAME(fe_cfg) == WAN_FR_UNFRAMED)
|
||||
|
||||
#define MEDIA_DECODE(fe_cfg) \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_T1 && \
|
||||
FE_SUBMEDIA(fe_cfg)==WAN_MEDIA_J1)?"J1" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_T1) ? "T1" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_E1) ? "E1" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_J1) ? "J1" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_56K) ? "56K" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_DS3) ? "DS3" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_E3) ? "E3" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_FXOFXS) ? "FXO/FXS" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_BRI) ? "BRI" : \
|
||||
(FE_MEDIA(fe_cfg) == WAN_MEDIA_SERIAL) ? "V35/RS232" : \
|
||||
"Unknown"
|
||||
|
||||
#define LCODE_DECODE(fe_cfg) \
|
||||
(FE_LCODE(fe_cfg) == WAN_LCODE_AMI) ? "AMI" : \
|
||||
(FE_LCODE(fe_cfg) == WAN_LCODE_B8ZS) ? "B8ZS" : \
|
||||
(FE_LCODE(fe_cfg) == WAN_LCODE_HDB3) ? "HDB3" : \
|
||||
(FE_LCODE(fe_cfg) == WAN_LCODE_B3ZS) ? "B3ZS" : "Unknown"
|
||||
|
||||
#define FRAME_DECODE(fe_cfg) \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_ESF) ? "ESF" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_D4) ? "D4" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_CRC4) ? "CRC4" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_NCRC4) ? "non-CRC4" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_UNFRAMED) ? "Unframed" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_E3_G751) ? "G.751" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_E3_G832) ? "G.832" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_DS3_Cbit) ? "C-bit" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_DS3_M13) ? "M13" : \
|
||||
(FE_FRAME(fe_cfg) == WAN_FR_SLC96) ? "SLC-96" : "Unknown"
|
||||
|
||||
|
||||
|
||||
/* front-end configuration and access interface commands */
|
||||
#define READ_FRONT_END_REGISTER (WAN_FE_CMD_START+0) /* 0x90 read from front-end register */
|
||||
#define WRITE_FRONT_END_REGISTER (WAN_FE_CMD_START+1) /* 0x91 write to front-end register */
|
||||
#define READ_FRONT_END_STATISTICS (WAN_FE_CMD_START+2) /* 0x92 read the front-end statistics */
|
||||
#define FLUSH_FRONT_END_STATISTICS (WAN_FE_CMD_START+3) /* 0x93 flush the front-end statistics */
|
||||
|
||||
typedef struct {
|
||||
unsigned char media; /* must be first !!! */
|
||||
unsigned char sub_media;
|
||||
unsigned char chip_id;
|
||||
unsigned char max_ports;
|
||||
|
||||
} wan_femedia_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned char media;
|
||||
unsigned char sub_media;
|
||||
unsigned char lcode;
|
||||
unsigned char frame;
|
||||
unsigned int line_no;
|
||||
unsigned char tx_tristate_mode;
|
||||
unsigned int tdmv_law;
|
||||
unsigned char poll_mode;
|
||||
int network_sync;
|
||||
|
||||
union {
|
||||
sdla_te_cfg_t te_cfg;
|
||||
sdla_te3_cfg_t te3_cfg;
|
||||
sdla_remora_cfg_t remora;
|
||||
sdla_bri_cfg_t bri;
|
||||
} cfg;
|
||||
} sdla_fe_cfg_t;
|
||||
|
||||
typedef struct {
|
||||
u_int32_t alarms;
|
||||
union {
|
||||
sdla_te_stats_t te1_stats;
|
||||
/*sdla_te_pmon_t te_pmon;*/
|
||||
sdla_te3_pmon_t te3_pmon;
|
||||
} u;
|
||||
u_int32_t tx_alarms;
|
||||
u_int32_t tx_maint_alarms;
|
||||
#define te_pmon u.te1_stats.pmon
|
||||
} sdla_fe_stats_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned char type;
|
||||
unsigned char mode;
|
||||
int mod_no; /* A200/A400 */
|
||||
union{
|
||||
struct {
|
||||
int channel;
|
||||
unsigned char abcd;
|
||||
} rbs;
|
||||
struct {
|
||||
int read;
|
||||
int reg;
|
||||
unsigned char value;
|
||||
} reg;
|
||||
struct {
|
||||
int offhook;
|
||||
}hook;
|
||||
} fe_debug_un;
|
||||
#define fe_debug_rbs fe_debug_un.rbs
|
||||
#define fe_debug_reg fe_debug_un.reg
|
||||
#define fe_debug_hook fe_debug_un.hook
|
||||
} sdla_fe_debug_t;
|
||||
|
||||
#define WAN_FE_LBMODE_CMD_POLL 0x00
|
||||
#define WAN_FE_LBMODE_CMD_SET 0x01
|
||||
#define WAN_FE_LBMODE_CMD_GET 0x02
|
||||
|
||||
#define WAN_FE_LBMODE_RC_SUCCESS 0x00
|
||||
#define WAN_FE_LBMODE_RC_PENDING 0x01
|
||||
#define WAN_FE_LBMODE_RC_FAILED 0x02
|
||||
#define WAN_FE_LBMODE_RC_LINKDOWN 0x03
|
||||
#define WAN_FE_LBMODE_RC_TXBUSY 0x04
|
||||
#define WAN_FE_LBMODE_RC_DECODE(rc) \
|
||||
((rc) == WAN_FE_LBMODE_RC_SUCCESS) ? "Done" : \
|
||||
((rc) == WAN_FE_LBMODE_RC_PENDING) ? "In progress" : \
|
||||
((rc) == WAN_FE_LBMODE_RC_FAILED) ? "Failed" : \
|
||||
((rc) == WAN_FE_LBMODE_RC_LINKDOWN) ? "Failed (Link Down)" : \
|
||||
((rc) == WAN_FE_LBMODE_RC_TXBUSY) ? "Failed (Busy)" : "Internal Error"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u_int8_t cmd;
|
||||
u_int8_t type;
|
||||
u_int8_t mode;
|
||||
u_int32_t chan_map;
|
||||
u_int32_t type_map; /* out: bit-map of loopbacks */
|
||||
u_int8_t rc; /* out: */
|
||||
|
||||
} sdla_fe_lbmode_t;
|
||||
|
||||
/* Front-End status */
|
||||
#define FE_STATUS_DECODE(fe_status) \
|
||||
(fe_status == FE_UNITIALIZED) ? "uninitialized" : \
|
||||
(fe_status == FE_DISCONNECTED) ? "disconnected": \
|
||||
(fe_status == FE_CONNECTED) ? "connected" : \
|
||||
(fe_status == FE_CONNECTING) ? "connecting" : \
|
||||
(fe_status == FE_DISCONNECTING) ? "disconnecting" : \
|
||||
"unknown"
|
||||
|
||||
#define WAN_FE_STATUS_DECODE(fe) FE_STATUS_DECODE((fe)->fe_status)
|
||||
#define LINK_STATUS_DECODE(fe_status) FE_STATUS_DECODE(fe_status)
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
#define FE_ASSERT(val) if (val) return;
|
||||
#define FE_ASSERT1(val) if (val) return 1;
|
||||
|
||||
#define WAN_FECALL(dev, func, x) \
|
||||
((dev)->fe_iface.func) ? (dev)->fe_iface.func x : -EINVAL
|
||||
|
||||
#define IS_T1_FEMEDIA(fe) IS_T1_MEDIA(&((fe)->fe_cfg))
|
||||
#define IS_E1_FEMEDIA(fe) IS_E1_MEDIA(&((fe)->fe_cfg))
|
||||
#define IS_TE1_FEMEDIA(fe) IS_TE1_MEDIA(&((fe)->fe_cfg))
|
||||
#define IS_56K_FEMEDIA(fe) IS_56K_MEDIA(&((fe)->fe_cfg))
|
||||
#define IS_J1_FEMEDIA(fe) IS_J1_MEDIA(&((fe)->fe_cfg))
|
||||
#define IS_FXOFXS_FEMEDIA(fe) IS_FXOFXS_MEDIA(&((fe)->fe_cfg))
|
||||
#define IS_GSM_FEMEDIA(fe) IS_GSM_MEDIA(&((fe)->fe_cfg))
|
||||
#define IS_FE_TXTRISTATE(fe) IS_TXTRISTATE(&((fe)->fe_cfg))
|
||||
#define IS_FR_FEUNFRAMED(fe) IS_FR_UNFRAMED(&((fe)->fe_cfg))
|
||||
#define IS_BRI_FEMEDIA(fe) IS_BRI_MEDIA(&((fe)->fe_cfg))
|
||||
#define IS_SERIAL_FEMEDIA(fe) IS_SERIAL_MEDIA(&((fe)->fe_cfg))
|
||||
|
||||
#define WAN_FE_MEDIA(fe) FE_MEDIA(&((fe)->fe_cfg))
|
||||
#define WAN_FE_LCODE(fe) FE_LCODE(&((fe)->fe_cfg))
|
||||
#define WAN_FE_FRAME(fe) FE_FRAME(&((fe)->fe_cfg))
|
||||
#define WAN_FE_LINENO(fe) FE_LINENO(&((fe)->fe_cfg))
|
||||
#define WAN_FE_TXTRISTATE(fe) FE_TXTRISTATE(&((fe)->fe_cfg))
|
||||
#define WAN_FE_TDMV_LAW(fe) FE_TDMV_LAW(&((fe)->fe_cfg))
|
||||
|
||||
#define WAN_FE_NETWORK_SYNC(fe) FE_NETWORK_SYNC(&((fe)->fe_cfg))
|
||||
|
||||
#define FE_MEDIA_DECODE(fe) MEDIA_DECODE(&((fe)->fe_cfg))
|
||||
#define FE_LCODE_DECODE(fe) LCODE_DECODE(&((fe)->fe_cfg))
|
||||
#define FE_FRAME_DECODE(fe) FRAME_DECODE(&((fe)->fe_cfg))
|
||||
|
||||
#define WAN_FE_START_CHANNEL(fe) \
|
||||
(IS_TE1_FEMEDIA(fe)) ? GET_TE_START_CHANNEL(fe) : \
|
||||
(IS_FXOFXS_FEMEDIA(fe)) ? WAN_RM_START_CHANNEL: \
|
||||
(IS_BRI_FEMEDIA(fe)) ? WAN_BRI_START_CHANNEL: 0
|
||||
|
||||
#define WAN_FE_MAX_CHANNELS(fe) \
|
||||
(IS_TE1_FEMEDIA(fe)) ? GET_TE_CHANNEL_RANGE(fe) : \
|
||||
(IS_FXOFXS_FEMEDIA(fe)) ? MAX_FXOFXS_CHANNELS : \
|
||||
(IS_GSM_FEMEDIA(fe)) ? MAX_GSM_CHANNELS : \
|
||||
(IS_BRI_FEMEDIA(fe)) ? MAX_BRI_CHANNELS : 0
|
||||
|
||||
#if 0
|
||||
enum fe_status {
|
||||
FE_UNITIALIZED = 0x00,
|
||||
FE_DISCONNECTED,
|
||||
FE_CONNECTED
|
||||
};
|
||||
#endif
|
||||
|
||||
/* adapter configuration interface commands */
|
||||
#define SET_ADAPTER_CONFIGURATION (WAN_INTERFACE_CMD_START+0) /* 0xA0 set adapter configuration */
|
||||
#define READ_ADAPTER_CONFIGURATION (WAN_INTERFACE_CMD_START+1) /* 0xA1 read adapter configuration */
|
||||
|
||||
/* return codes from interface commands */
|
||||
#define LGTH_FE_CFG_DATA_INVALID 0x91 /* the length of the FE_RX_DISC_TX_IDLE_STRUCT is invalid */
|
||||
#define LGTH_ADAPTER_CFG_DATA_INVALID 0x91 /* the length of the passed configuration data is invalid */
|
||||
#define INVALID_FE_CFG_DATA 0x92 /* the passed SET_FE_RX_DISC_TX_IDLE_CFG data is invalid */
|
||||
#define ADPTR_OPERATING_FREQ_INVALID 0x92 /* an invalid adapter operating frequency was selected */
|
||||
#define PROT_CFG_BEFORE_FE_CFG 0x93 /* set the protocol-level configuration before setting the FE configuration */
|
||||
|
||||
#define SET_FE_RX_DISC_TX_IDLE_CFG 0x98 /* set the front-end Rx discard/Tx idle configuration */
|
||||
#define READ_FE_RX_DISC_TX_IDLE_CFG 0x99 /* read the front-end Rx discard/Tx idle configuration */
|
||||
#define SET_TE1_SIGNALING_CFG 0x9A /* set the T1/E1 signaling configuration */
|
||||
#define READ_TE1_SIGNALING_CFG 0x9B /* read the T1/E1 signaling configuration */
|
||||
|
||||
|
||||
#define COMMAND_INVALID_FOR_ADAPTER 0x9F /* the command is invalid for the adapter type */
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------------
|
||||
* Constants for the SET_FE_RX_DISC_TX_IDLE_CFG/READ_FE_RX_DISC_TX_IDLE_CFG commands
|
||||
* --------------------------------------------------------------------------------*/
|
||||
|
||||
#define NO_ACTIVE_RX_TIME_SLOTS_T1 24 /* T1 - no active time slots used for reception */
|
||||
#define NO_ACTIVE_TX_TIME_SLOTS_T1 24 /* T1 - no active time slots used for transmission */
|
||||
#define NO_ACTIVE_RX_TIME_SLOTS_E1 32 /* E1 - no active time slots used for reception */
|
||||
#define NO_ACTIVE_TX_TIME_SLOTS_E1 31 /* E1 - no active time slots used for transmission (channel 0 reserved for framing) */
|
||||
|
||||
/* the structure used for the SET_FE_RX_DISC_TX_IDLE_CFG/READ_FE_RX_DISC_TX_IDLE_CFG command */
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned short lgth_Rx_disc_bfr; /* the length of the Rx discard buffer */
|
||||
unsigned short lgth_Tx_idle_bfr; /* the length of the Tx idle buffer */
|
||||
/* the transmit idle data buffer */
|
||||
unsigned char Tx_idle_data_bfr[NO_ACTIVE_TX_TIME_SLOTS_E1];
|
||||
} FE_RX_DISC_TX_IDLE_STRUCT;
|
||||
#pragma pack()
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Constants for front-end access
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
/* the structure used for the READ_FRONT_END_REGISTER/WRITE_FRONT_END_REGISTER command */
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned short register_number; /* the register number to be read from or written to */
|
||||
unsigned char register_value; /* the register value read/written */
|
||||
} FRONT_END_REG_STRUCT;
|
||||
#pragma pack()
|
||||
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned char opp_flag; /* opp flag */
|
||||
|
||||
union {
|
||||
struct {
|
||||
unsigned char RR8_56k; /* register #8 value - 56K CSU/DSU */
|
||||
unsigned char RR9_56k; /* register #9 value - 56K CSU/DSU */
|
||||
unsigned char RRA_56k; /* register #A value - 56K CSU/DSU */
|
||||
unsigned char RRB_56k; /* register #B value - 56K CSU/DSU */
|
||||
unsigned char RRC_56k; /* register #C value - 56K CSU/DSU */
|
||||
} stat_56k;
|
||||
} FE_U;
|
||||
|
||||
} FRONT_END_STATUS_STRUCT;
|
||||
#pragma pack()
|
||||
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
* Constants for the READ_FRONT_END_STATISTICS command
|
||||
* ---------------------------------------------------------------------------*/
|
||||
|
||||
/* the front-end statistics structure */
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned int FE_interrupt_count; /* the number of front-end interrupts generated */
|
||||
unsigned int FE_app_timeout_count; /* the number of front-end interrupt application timeouts */
|
||||
} FE_STATISTICS_STRUCT;
|
||||
#pragma pack()
|
||||
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------------------
|
||||
* Constants for the SET_ADAPTER_CONFIGURATION/READ_ADAPTER_CONFIGURATION commands
|
||||
* -------------------------------------------------------------------------------*/
|
||||
|
||||
/* the adapter configuration structure */
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned short adapter_type; /* type of adapter */
|
||||
unsigned short adapter_config; /* miscellaneous adapter configuration options */
|
||||
unsigned int operating_frequency; /* adapter operating frequency */
|
||||
} ADAPTER_CONFIGURATION_STRUCT;
|
||||
#pragma pack()
|
||||
|
||||
typedef int (WRITE_FRONT_END_REG_T)(void*, ...);
|
||||
typedef unsigned char (READ_FRONT_END_REG_T)(void*, ...);
|
||||
|
||||
enum {
|
||||
AFT_LED_ON,
|
||||
AFT_LED_OFF,
|
||||
AFT_LED_TOGGLE
|
||||
};
|
||||
|
||||
typedef struct sdla_fe_swirq_ {
|
||||
unsigned int pending;
|
||||
unsigned char subtype;
|
||||
int delay;
|
||||
wan_ticks_t start;
|
||||
} sdla_fe_swirq_t;
|
||||
|
||||
typedef struct sdla_fe_timer_event_ {
|
||||
unsigned char type;
|
||||
u_int8_t mode;
|
||||
int delay;
|
||||
wan_ticks_t start;
|
||||
union{
|
||||
#define te_event u_fe.te
|
||||
#define rm_event u_fe.rm
|
||||
sdla_te_event_t te;
|
||||
sdla_rm_event_t rm;
|
||||
} u_fe;
|
||||
WAN_LIST_ENTRY(sdla_fe_timer_event_) next;
|
||||
} sdla_fe_timer_event_t;
|
||||
|
||||
#define WAN_FE_MAX_QEVENT_LEN 20
|
||||
typedef struct {
|
||||
char *name;
|
||||
void *card;
|
||||
sdla_fe_cfg_t fe_cfg;
|
||||
/* FIXME: Remove the following parameters from wandev_t */
|
||||
unsigned char fe_status;
|
||||
unsigned int fe_prev_alarm;
|
||||
unsigned char fe_chip_id;
|
||||
unsigned char fe_max_ports;
|
||||
unsigned char fe_debug;
|
||||
/* ^^^ */
|
||||
union {
|
||||
#define te_param fe_param.te
|
||||
#define te3_param fe_param.te3
|
||||
#define rm_param fe_param.remora
|
||||
#define bri_param fe_param.bri
|
||||
sdla_te_param_t te;
|
||||
sdla_56k_param_t k56_param;
|
||||
sdla_te3_param_t te3;
|
||||
sdla_remora_param_t remora;
|
||||
sdla_bri_param_t bri;
|
||||
sdla_gsm_param_t gsm;
|
||||
} fe_param;
|
||||
#define fe_alarm fe_stats.alarms
|
||||
sdla_fe_stats_t fe_stats;
|
||||
|
||||
wan_spinlock_t lockirq;
|
||||
wan_timer_t timer;
|
||||
#if defined(__WINDOWS__)
|
||||
WAN_LIST_HEAD(fe_timer_event_list_head, sdla_fe_timer_event_) event;
|
||||
#else
|
||||
WAN_LIST_HEAD(, sdla_fe_timer_event_) event;
|
||||
#endif
|
||||
unsigned int event_map;
|
||||
|
||||
sdla_fe_swirq_t *swirq;
|
||||
unsigned int swirq_map;
|
||||
|
||||
int (*write_cpld)(void*, unsigned short, unsigned char);
|
||||
int (*read_cpld)(void*, unsigned short, unsigned char);
|
||||
int (*write_fe_cpld)(void*, unsigned short, unsigned char);
|
||||
int (*read_fe_cpld)(void*, unsigned short, unsigned char);
|
||||
int (*write_framer)(void*,unsigned short,unsigned short);
|
||||
unsigned int (*read_framer)(void*,unsigned short);
|
||||
void (*reset_fe)(void*);
|
||||
WRITE_FRONT_END_REG_T *write_fe_reg;
|
||||
READ_FRONT_END_REG_T *read_fe_reg;
|
||||
READ_FRONT_END_REG_T *__read_fe_reg;
|
||||
} sdla_fe_t;
|
||||
|
||||
/*
|
||||
** Sangoma Front-End interface structure
|
||||
*/
|
||||
#if 0
|
||||
typedef struct {
|
||||
/* In-Service or Not (T1/E1/56K) */
|
||||
unsigned int (*get_fe_service_status)(void*);
|
||||
/* Print Front-End alarm (T1/E1/56K) */
|
||||
void (*print_fe_alarm)(void*,unsigned int);
|
||||
/* Print Front-End alarm (T1/E1/56K) */
|
||||
char* (*print_fe_act_channels)(void*);
|
||||
/* Set Front-End alarm (T1/E1) */
|
||||
void (*set_fe_alarm)(void*,unsigned int);
|
||||
/* Set extra interrupt type (after link get connected)) */
|
||||
int (*set_fe_sigcfg)(void*, unsigned int);
|
||||
} sdla_fe_iface_t;
|
||||
#endif
|
||||
|
||||
#include "wanpipe_events.h"
|
||||
|
||||
/*
|
||||
** Sangoma Front-End interface structure (new version)
|
||||
** FIXME: replace sdla_fe_iface_t with the new version! */
|
||||
typedef struct {
|
||||
int (*reset)(void *fe, int, int);
|
||||
int (*global_config)(void *fe);
|
||||
int (*global_unconfig)(void *fe);
|
||||
int (*chip_config)(void *fe);
|
||||
int (*config)(void *fe);
|
||||
int (*post_init)(void*);
|
||||
/* Set extra T1/E1 configuration */
|
||||
int (*reconfig)(sdla_fe_t*);
|
||||
int (*unconfig)(void *fe);
|
||||
int (*post_unconfig)(void*);
|
||||
int (*if_config)(void *fe, u32, u8);
|
||||
int (*if_unconfig)(void *fe, u32, u8);
|
||||
int (*disable_irq)(void *fe);
|
||||
int (*polling)(sdla_fe_t *fe);
|
||||
int (*add_timer)(sdla_fe_t *fe, unsigned long);
|
||||
int (*isr)(sdla_fe_t *fe);
|
||||
int (*process_udp)(sdla_fe_t *fe, void*, unsigned char*);
|
||||
u_int32_t (*read_alarm)(sdla_fe_t *fe, int);
|
||||
|
||||
int (*read_pmon)(sdla_fe_t *fe, int);
|
||||
int (*flush_pmon)(sdla_fe_t *fe);
|
||||
/* Set Front-End alarm (T1/E1) */
|
||||
int (*set_fe_alarm)(sdla_fe_t *fe, unsigned int);
|
||||
/* Set extra interrupt type (after link get connected)) */
|
||||
int (*set_fe_sigctrl)(sdla_fe_t*, int, unsigned long, int);
|
||||
/* Print Front-End alarm (T1/E1/56K) */
|
||||
char* (*print_fe_act_channels)(sdla_fe_t*);
|
||||
/* Print Front-End alarm (T1/E1/56K) */
|
||||
int (*print_fe_alarm)(sdla_fe_t*,unsigned int);
|
||||
/* Get front end status: Connected/Disconnected */
|
||||
/* added mod_no to get status of individual fxo (mod_no only used for Analog/FXO cards) */
|
||||
int (*get_fe_status)(sdla_fe_t *fe, unsigned char*, int mod_no);
|
||||
/* Set front end status: Connected/Disconnected only ISDN BRI */
|
||||
int (*set_fe_status)(sdla_fe_t *fe, unsigned char);
|
||||
/* Get front end media type */
|
||||
unsigned char (*get_fe_media)(sdla_fe_t *fe);
|
||||
/* Get front end media type string */
|
||||
char* (*get_fe_media_string)(void);
|
||||
/* Set Line-loopback modes */
|
||||
int (*set_fe_lbmode)(sdla_fe_t*, u_int8_t, u_int8_t, u_int32_t);
|
||||
/* Update Alarm Status for proc file system */
|
||||
int (*update_alarm_info)(sdla_fe_t*, struct seq_file*, int*);
|
||||
/* Update PMON Status for proc file system */
|
||||
int (*update_pmon_info)(sdla_fe_t*, struct seq_file*, int*);
|
||||
/* AFT T1/E1 cards only */
|
||||
int (*led_ctrl)(sdla_fe_t*, int mode);
|
||||
/* Check RBS bits (T1/E1 cards) */
|
||||
int (*check_rbsbits)(sdla_fe_t*, int, unsigned int, int);
|
||||
/* Read RBS bits (T1/E1 cards) */
|
||||
unsigned char (*read_rbsbits)(sdla_fe_t*, int, int);
|
||||
/* Set RBS bits (T1/E1 cards, voice) */
|
||||
int (*set_rbsbits)(sdla_fe_t*, int, unsigned char);
|
||||
/* Report RBS bits (T1/E1 cards) */
|
||||
int (*report_rbsbits)(sdla_fe_t*);
|
||||
/* Get Front-End SNMP data */
|
||||
int (*get_snmp_data)(sdla_fe_t*, void*, void*);
|
||||
/* Check if the interrupt is for this port */
|
||||
int (*check_isr)(sdla_fe_t *fe);
|
||||
/* Available front-end map */
|
||||
/* BRI addition - one Wanpipe may have two lines, provide the 'line_no' when
|
||||
getting the active channels map.
|
||||
*/
|
||||
unsigned int (*active_map)(sdla_fe_t *fe, unsigned char line_no);
|
||||
/* Transmit DTMF number */
|
||||
int (*set_dtmf)(sdla_fe_t*, int, unsigned char);
|
||||
/* Enable/Disable FE interrupt */
|
||||
int (*intr_ctrl)(sdla_fe_t*, int, u_int8_t, u_int8_t, unsigned int);
|
||||
/* Event Control */
|
||||
int (*event_ctrl)(sdla_fe_t*, wan_event_ctrl_t*);
|
||||
/* Front-End watchdog */
|
||||
int (*watchdog)(void * card);
|
||||
/* Transmit ISDN BRI D-chan data */
|
||||
int (*isdn_bri_dchan_tx)(sdla_fe_t*, void*, unsigned int);
|
||||
/* Receive ISDN BRI D-chan data */
|
||||
int (*isdn_bri_dchan_rx)(sdla_fe_t*, void*, unsigned int);
|
||||
/* Enable/Disable Clock recovery from the line */
|
||||
int (*clock_ctrl)(sdla_fe_t*, u_int8_t /* WANOPT_NO/WANOPT_YES */);
|
||||
u_int32_t (*read_tx_alarm)(sdla_fe_t *fe, int);
|
||||
int (*force_unconfig) (void*);
|
||||
int (*force_config) (void*);
|
||||
} sdla_fe_iface_t;
|
||||
|
||||
/*
|
||||
** Sangoma Front-End interface structure (new version)
|
||||
** FIXME: replace sdla_fe_iface_t with the new version! */
|
||||
typedef struct {
|
||||
|
||||
int (*check_hook_state)(sdla_fe_t *, int);
|
||||
int (*hook_state)(sdla_fe_t *, int, int);
|
||||
|
||||
} sdla_fe_notify_iface_t;
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#endif
|
|
@ -0,0 +1,192 @@
|
|||
/******************************************************************************
|
||||
* sdla_gsm.h
|
||||
*
|
||||
* Author: Moises Silva <moy@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2011 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Oct 06, 2011 Moises Silva Initial Version
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __SDLA_GSM_H
|
||||
#define __SDLA_GSM_H
|
||||
|
||||
#if (defined __WINDOWS__)
|
||||
# define inline __inline
|
||||
#endif
|
||||
/* W400 has 4 GSM modules. Each module has one voice channel and one fake D-channel */
|
||||
#define MAX_GSM_MODULES 4
|
||||
|
||||
/* All modules masked (4 modules, 1111) */
|
||||
#define AFT_GSM_ALL_MODULES_MASK 0x000F
|
||||
|
||||
/* Assumed the last channel is the HDLC channel */
|
||||
#define MAX_GSM_CHANNELS 2
|
||||
#define MAX_GSM_TIMESLOTS 32
|
||||
|
||||
/* where in the span channel array indexes we have voice and data */
|
||||
#define GSM_VOICE_CHANNEL 0
|
||||
#define GSM_UART_CHANNEL 1
|
||||
|
||||
/* 31th chan (zero-based) will have the dchan */
|
||||
#define GSM_DCHAN_LOGIC_CHAN 31
|
||||
|
||||
#define IS_GSM_CARD(card) IS_GSM_FEMEDIA(&(card)->fe)
|
||||
|
||||
/* Global register */
|
||||
#define AFT_GSM_GLOBAL_REG 0x1400
|
||||
|
||||
/* Starting configuration register (incremented by AFT_GSM_REG_OFFSET for each module) */
|
||||
#define AFT_GSM_CONFIG_REG 0x1200
|
||||
|
||||
/* UART tx/rx data and status registers (incremented by AFT_GSM_REG_OFFSET for each module) */
|
||||
#define AFT_GSM_UART_TX_REG 0x1300
|
||||
#define AFT_GSM_UART_RX_REG 0x1310
|
||||
#define AFT_GSM_UART_STAT_REG 0x1320
|
||||
|
||||
/* Per module register offset */
|
||||
#define AFT_GSM_REG_OFFSET 0x0004
|
||||
|
||||
/* Our FIFO size for the UART */
|
||||
#define AFT_GSM_UART_TX_FIFO_SIZE 15
|
||||
#define AFT_GSM_UART_RX_FIFO_SIZE 66
|
||||
|
||||
/* UART status */
|
||||
#define AFT_GSM_UART_TX_FIFO_DATA_COUNT_MASK 0x0F
|
||||
#define AFT_GSM_UART_RX_FIFO_DATA_COUNT_MASK 0x7F
|
||||
#define AFT_GSM_UART_RX_FIFO_DATA_COUNT_OFFSET 8
|
||||
#define AFT_GSM_UART_TX_FIFO_OVERFLOW_BIT 16
|
||||
#define AFT_GSM_UART_RX_FIFO_OVERFLOW_BIT 17
|
||||
|
||||
/* PLL status bits in the global register */
|
||||
#define AFT_GSM_PLL_RESET_BIT 0
|
||||
#define AFT_GSM_PLL_PHASE_SHIFT_OVERFLOW_BIT 1
|
||||
#define AFT_GSM_PLL_INPUT_CLOCK_LOST_BIT 2
|
||||
#define AFT_GSM_PLL_OUTPUT_CLOCK_STOPPED_BIT 3
|
||||
#define AFT_GSM_PLL_LOCKED_BIT 4
|
||||
|
||||
/* SIM muxing error in the global register */
|
||||
#define AFT_GSM_SIM_MUXING_ERROR_BIT 5
|
||||
|
||||
/* PCM audio loop, all audio going towards the Digital Voiceband Interface (DVI) will be looped back,
|
||||
* this is only useful for debugging purposes */
|
||||
#define AFT_GSM_GLOBAL_PCM_LOOPBACK_BIT 30
|
||||
|
||||
/* Shutdown 3.8v for all modules (active 0) in the global register */
|
||||
#define AFT_GSM_GLOBAL_SHUTDOWN_BIT 31
|
||||
|
||||
/*!< Retrieve the register address for a module */
|
||||
#define AFT_GSM_MOD_REG(mod_no, reg) (reg + ((mod_no-1) * AFT_GSM_REG_OFFSET))
|
||||
|
||||
/*!< GSM module configuration (bit numbers are zero-based) */
|
||||
#define AFT_GSM_MOD_POWER_BIT 0x0
|
||||
#define AFT_GSM_MOD_RESET_BIT 0x1
|
||||
#define AFT_GSM_MOD_POWER_MONITOR_BIT 0x2
|
||||
#define AFT_GSM_MOD_TX_MONITOR_BIT 0x3
|
||||
#define AFT_GSM_MOD_SIM_INSERTED_BIT 0x4
|
||||
|
||||
/*!< The high order last 3 bits of first byte of the module configuration register select the SIM */
|
||||
#define AFT_GSM_MOD_SIM_BIT_OFFSET 5
|
||||
#define AFT_GSM_MOD_SIM_MASK (0x7 << AFT_GSM_MOD_SIM_BIT_OFFSET)
|
||||
|
||||
/*!< The first 3 bits of the second byte select the UART baud rate */
|
||||
#define AFT_GSM_MOD_UART_BAUD_RATE_BIT_OFFSET 0x8
|
||||
#define AFT_GSM_MOD_UART_BAUD_RATE_MASK (0x7 << AFT_GSM_MOD_UART_BAUD_RATE_BIT_OFFSET)
|
||||
|
||||
/*!< The fourth bit of the second byte report if there is service or not */
|
||||
#define AFT_GSM_MOD_SERVICE_BIT 0xB
|
||||
|
||||
/*!< The fifth bit of the second byte report if there is a module (cell phone) present or not */
|
||||
#define AFT_GSM_MOD_PRESENT_BIT 0xC
|
||||
|
||||
/*! Absolute timeout to power on/off a module
|
||||
* Telit data sheet suggests 2 seconds, in real life for W400
|
||||
* I've seen power off take more than that, 3-4 seconds, so
|
||||
* I decided to boost this to 10 seconds to be ultra-safe
|
||||
* The only down-side of this will be if we ever need to
|
||||
* use the "slow hwprobe" mechanism that attempts to power on/off
|
||||
* the modules the first time hwprobe is run, because a timeout
|
||||
* of 10 seconds will slow down a lot the first hwprobe in cases where
|
||||
* the module is not present (see sdladrv.c slow hw probe define)
|
||||
* since currently we do not use the "slow hwprobe" mode and rely
|
||||
* instead on the GSM hw FPGA register to tell us if the module
|
||||
* is present or not, we should be fine ...
|
||||
* */
|
||||
#define AFT_GSM_MODULE_POWER_TOGGLE_TIMEOUT_MS 10000
|
||||
|
||||
/*!< How often to check if the module is already on/off during startup/shutdown */
|
||||
#define AFT_GSM_MODULE_POWER_TOGGLE_CHECK_INTERVAL_MS 10
|
||||
|
||||
/*! Absolute timeout to enable PLL */
|
||||
#define AFT_GSM_PLL_ENABLE_TIMEOUT_MS 2000
|
||||
|
||||
/*!< How often to check if the PLL is already enabled on startup */
|
||||
#define AFT_GSM_PLL_ENABLE_CHECK_INTERVAL_MS 10
|
||||
|
||||
/*! How much to wait between power registry writes
|
||||
* Telit data sheet says input command for switch off/on must be equal or bigger to 1 second,
|
||||
* we give it 100ms more in case the host scheduling is somewhat faster */
|
||||
#define AFT_GSM_MODULE_POWER_TOGGLE_DELAY_MS 1100
|
||||
|
||||
/* Transform from module index to bit index in bit map */
|
||||
#define AFT_GSM_MOD_BIT(mod_no) (mod_no - 1)
|
||||
|
||||
static inline int aft_gsm_get_sim_no(int reg)
|
||||
{
|
||||
reg &= AFT_GSM_MOD_SIM_MASK;
|
||||
return (reg >> AFT_GSM_MOD_SIM_BIT_OFFSET);
|
||||
}
|
||||
|
||||
static inline void aft_gsm_set_sim_no(int *reg, int sim_no)
|
||||
{
|
||||
sim_no <<= AFT_GSM_MOD_SIM_BIT_OFFSET;
|
||||
*reg |= (sim_no & AFT_GSM_MOD_SIM_MASK);
|
||||
}
|
||||
|
||||
static inline int aft_gsm_get_uart_baud_rate(int reg)
|
||||
{
|
||||
reg &= AFT_GSM_MOD_UART_BAUD_RATE_MASK;
|
||||
return (reg >> AFT_GSM_MOD_UART_BAUD_RATE_BIT_OFFSET);
|
||||
}
|
||||
|
||||
int wp_gsm_iface_init(void*, void*);
|
||||
int wp_gsm_uart_rx_fifo(void *card, unsigned char *rx_buff, int reqlen);
|
||||
int wp_gsm_uart_check_tx_fifo(void *card);
|
||||
int wp_gsm_uart_tx_fifo(void *card, unsigned char *tx_buff, int len);
|
||||
int wp_gsm_pll_reset(void *card);
|
||||
int wp_gsm_update_sim_status(void *card);
|
||||
|
||||
typedef struct wan_gsm_udp {
|
||||
union {
|
||||
char uart_debug;
|
||||
} u;
|
||||
} wan_gsm_udp_t;
|
||||
|
||||
/* used by gsm front end code to store GSM-specific data */
|
||||
#define GSM_MAX_UART_FRAME_LEN 300
|
||||
typedef struct sdla_gsm_param {
|
||||
unsigned char uart_txbuf[GSM_MAX_UART_FRAME_LEN];
|
||||
int uart_txbuf_len;
|
||||
int uart_tx_cnt;
|
||||
} sdla_gsm_param_t;
|
||||
|
||||
/* Front-End UDP command */
|
||||
#define WAN_GSM_REGDUMP (WAN_FE_UDP_CMD_START + 0)
|
||||
#define WAN_GSM_UART_DEBUG (WAN_FE_UDP_CMD_START + 1)
|
||||
#define WAN_GSM_AUDIO_DEBUG (WAN_FE_UDP_CMD_START + 2)
|
||||
#define WAN_GSM_PLL_RESET (WAN_FE_UDP_CMD_START + 3)
|
||||
#define WAN_GSM_POWER_TOGGLE (WAN_FE_UDP_CMD_START + 4)
|
||||
#define WAN_GSM_UPDATE_SIM_STATUS (WAN_FE_UDP_CMD_START + 5)
|
||||
#define WAN_GSM_PCM_LOOPBACK (WAN_FE_UDP_CMD_START + 6)
|
||||
|
||||
#define AFT_GSM_UART_DEBUG_ENABLED_BIT 1
|
||||
#define AFT_GSM_AUDIO_DEBUG_TOGGLE_BIT 2
|
||||
|
||||
#endif /* __SDLA_GSM_H */
|
||||
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,113 @@
|
|||
/******************************************************************************
|
||||
* sdla_gsm_inline.h
|
||||
*
|
||||
* Author: Moises Silva <moy@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2011 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Dec 09, 2011 Moises Silva Initial Version
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __SDLA_GSM_INLINE_H
|
||||
#define __SDLA_GSM_INLINE_H
|
||||
|
||||
/* XXX This mess was brought to you by <moy@sangoma.com> ... XXX
|
||||
* I could not find a way to abstract the module power on/off code in a way could be used
|
||||
* by sdladrv.c for hardware probe, aft_gsm.c for port start/stop, and sdla_gsm.c
|
||||
* for wanpipemon handling of fixed start/stop of the modules without messing with the build
|
||||
* in such a painful way that I'd rather die first, so I added this function here,
|
||||
* in a way can be included by each file that uses it ... */
|
||||
static __inline int wp_gsm_toggle_power(void *phw, int mod_map, int turn_on)
|
||||
{
|
||||
u32 reg[MAX_GSM_MODULES+1]; /* mod_no is not zero-based */
|
||||
int timeout_loops = 0;
|
||||
int mod_no = 1;
|
||||
sdlahw_t *hw = phw;
|
||||
const char *devname = hw->devname;
|
||||
|
||||
/*
|
||||
* Power toggle sequence as described by the Telit documentation
|
||||
* We have a power monitor pin that tells us whether the module is on/off
|
||||
* We have a power pin that is equivalent to the power on/off button on your cell phone
|
||||
* In order to turn on/off we hold high the power pin for at least one second and then
|
||||
* set it low. Then we monitor the power monitor pin until goes high/low depending on
|
||||
* whether we're turning on or off the module
|
||||
*
|
||||
* Note that in the Telit documentation you will see the high/low order inversed, there
|
||||
* is an inversor in our hardware doing that, ask our hw engineers why? :-)
|
||||
*/
|
||||
for (mod_no = 1; mod_no <= MAX_GSM_MODULES; mod_no++) {
|
||||
if (!wan_test_bit(AFT_GSM_MOD_BIT(mod_no), &mod_map)) {
|
||||
continue;
|
||||
}
|
||||
|
||||
reg[mod_no] = 0;
|
||||
__sdla_bus_read_4(hw, AFT_GSM_MOD_REG(mod_no, AFT_GSM_CONFIG_REG), ®[mod_no]);
|
||||
/* if we were asked to turn the module on and is on, we're done */
|
||||
if (turn_on && wan_test_bit(AFT_GSM_MOD_POWER_MONITOR_BIT, ®[mod_no])) {
|
||||
DEBUG_EVENT("%s: GSM module %d is already on, skipping power toggle ...\n", devname, mod_no);
|
||||
wan_clear_bit(AFT_GSM_MOD_BIT(mod_no), &mod_map);
|
||||
continue;
|
||||
}
|
||||
/* if we were asked to turn the module off and is off, we're done */
|
||||
if (!turn_on && !wan_test_bit(AFT_GSM_MOD_POWER_MONITOR_BIT, ®[mod_no])) {
|
||||
DEBUG_EVENT("%s: GSM module %d is already off, skipping power toggle ...\n", devname, mod_no);
|
||||
wan_clear_bit(AFT_GSM_MOD_BIT(mod_no), &mod_map);
|
||||
continue;
|
||||
}
|
||||
DEBUG_EVENT("%s: Turning GSM module %d %s ...\n", devname, mod_no, turn_on ? "on" : "off");
|
||||
wan_set_bit(AFT_GSM_MOD_POWER_BIT, ®[mod_no]);
|
||||
__sdla_bus_write_4(hw, AFT_GSM_MOD_REG(mod_no, AFT_GSM_CONFIG_REG), reg[mod_no]);
|
||||
}
|
||||
|
||||
/* no modules to toggle */
|
||||
if (!mod_map) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
WP_DELAY(AFT_GSM_MODULE_POWER_TOGGLE_DELAY_MS * 1000);
|
||||
|
||||
/* restore the power bit in all modules */
|
||||
for (mod_no = 1; mod_no <= MAX_GSM_MODULES; mod_no++) {
|
||||
if (!wan_test_bit(AFT_GSM_MOD_BIT(mod_no), &mod_map)) {
|
||||
continue;
|
||||
}
|
||||
wan_clear_bit(AFT_GSM_MOD_POWER_BIT, ®[mod_no]);
|
||||
__sdla_bus_write_4(hw, AFT_GSM_MOD_REG(mod_no, AFT_GSM_CONFIG_REG), reg[mod_no]);
|
||||
}
|
||||
|
||||
/* monitor the modules to see if they power on/off */
|
||||
for (timeout_loops = (AFT_GSM_MODULE_POWER_TOGGLE_TIMEOUT_MS / AFT_GSM_MODULE_POWER_TOGGLE_CHECK_INTERVAL_MS);
|
||||
(timeout_loops && mod_map);
|
||||
timeout_loops--) {
|
||||
WP_DELAY(AFT_GSM_MODULE_POWER_TOGGLE_CHECK_INTERVAL_MS * 1000);
|
||||
for (mod_no = 1; mod_no <= MAX_GSM_MODULES; mod_no++) {
|
||||
if (!wan_test_bit(AFT_GSM_MOD_BIT(mod_no), &mod_map)) {
|
||||
continue;
|
||||
}
|
||||
reg[mod_no] = 0;
|
||||
__sdla_bus_read_4(hw, AFT_GSM_MOD_REG(mod_no, AFT_GSM_CONFIG_REG), ®[mod_no]);
|
||||
/* if we were asked to turn the module on and is on, we're done */
|
||||
if (turn_on && wan_test_bit(AFT_GSM_MOD_POWER_MONITOR_BIT, ®[mod_no])) {
|
||||
DEBUG_EVENT("%s: GSM module %d is now on ...\n", devname, mod_no);
|
||||
wan_clear_bit(AFT_GSM_MOD_BIT(mod_no), &mod_map);
|
||||
}
|
||||
/* if we were asked to turn the module off and is off, we're done */
|
||||
if (!turn_on && !wan_test_bit(AFT_GSM_MOD_POWER_MONITOR_BIT, ®[mod_no])) {
|
||||
DEBUG_EVENT("%s: GSM module %d is now off ...\n", devname, mod_no);
|
||||
wan_clear_bit(AFT_GSM_MOD_BIT(mod_no), &mod_map);
|
||||
}
|
||||
}
|
||||
}
|
||||
/* return a map of the modules that failed to turn on/off (if any) */
|
||||
return mod_map;
|
||||
}
|
||||
|
||||
#endif /* __SDLA_GSM_INLINE_H */
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
/******************************************************************************
|
||||
* sdla_gsm_tdmv.h
|
||||
*
|
||||
* Author: Moises Silva <moy@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2011 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Oct 11, 2011 Moises Silva Initial Version
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "wanpipe_defines.h"
|
||||
#include "sdla_tdmv.h"
|
||||
#include "zapcompat.h" /* Map of Zaptel -> DAHDI definitions */
|
||||
|
||||
typedef struct wp_tdmv_gsm_ {
|
||||
/*! Wanpipe card structre */
|
||||
sdla_t *card;
|
||||
/*! Shortcut to card->devname */
|
||||
char *devname;
|
||||
/*! Wanpipe GSM span number */
|
||||
int num;
|
||||
/*! Sanity check flags */
|
||||
int flags;
|
||||
/* DAHDI span number (as assigned in Wanpipe configuration) */
|
||||
int spanno;
|
||||
/*! DAHDI span and channels */
|
||||
#if defined(CONFIG_PRODUCT_WANPIPE_TDM_VOICE)
|
||||
struct zt_span span;
|
||||
#ifdef DAHDI_ISSUES
|
||||
struct zt_chan *chans_ptrs[MAX_GSM_CHANNELS];
|
||||
#endif
|
||||
struct zt_chan chans[MAX_GSM_CHANNELS];
|
||||
|
||||
#ifdef DAHDI_26
|
||||
struct dahdi_device *ddev;
|
||||
struct device dev;
|
||||
#endif
|
||||
#endif
|
||||
/*! Number of users of this span (for sanity checks) */
|
||||
int usecount;
|
||||
/*! Debug audio buffer index */
|
||||
int audio_debug_i;
|
||||
unsigned char ec_chunk[ZT_CHUNKSIZE];
|
||||
|
||||
} wp_tdmv_gsm_t;
|
||||
|
|
@ -0,0 +1,759 @@
|
|||
/*****************************************************************************
|
||||
* sdla_hdlc.h HDLC API header file.
|
||||
*
|
||||
* Author: Jaspreet Singh <jaspreet@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1998-1997 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Oct 14, 1998 Jaspreet Singh o Initial Version.
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __SDLA_HDLC_H__
|
||||
#define __SDLA_HDLC_H__
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
|
||||
/* Status flag for determining whether to perform a check on socket receive * queue.
|
||||
*/
|
||||
#define NO_SK_RX_CHECK 0x00
|
||||
#define TOP_CHECK_SK_RX_Q 0x01
|
||||
#define BTM_CHECK_SK_RX_Q 0x02
|
||||
|
||||
|
||||
#define NO_READ_CMD 0x00
|
||||
#define READ_CMD 0x01
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants defining the shared memory control block (mailbox)
|
||||
*/
|
||||
|
||||
/* the base address of the HDLC mailbox structure on the adapter */
|
||||
#define HDLC_MB_STRUCT_OFFSET 0x0000
|
||||
/* the number of reserved bytes in the mailbox header area */
|
||||
#define NUMBER_HDLC_MB_RES_BYTES 0x0A
|
||||
/* the size of the actual mailbox data area */
|
||||
#define SIZEOF_HDLC_MB_DATA_BFR 1008
|
||||
#define MAX_NO_DATA_BYTES_IN_I_FRAME 4099 /* maximum length of the HDLC I-field */
|
||||
|
||||
/* Just the header, excluding the data area */
|
||||
#define MAILBOX_SIZE 30
|
||||
/*
|
||||
* the control block mailbox structure for API purposes.
|
||||
*/
|
||||
typedef struct {
|
||||
|
||||
unsigned char opp_flag ; /* the opp flag */
|
||||
unsigned char command ; /* the command code */
|
||||
unsigned short buffer_length ; /* the data length */
|
||||
unsigned char return_code ; /* the return code */
|
||||
unsigned char PF_bit ; /* the HDLC P/F bit */
|
||||
char MB_reserved[NUMBER_HDLC_MB_RES_BYTES] ; /* for later use */
|
||||
char data[MAX_NO_DATA_BYTES_IN_I_FRAME] ; /* the data area */
|
||||
|
||||
} HDLC_MAILBOX_STRUCT;
|
||||
|
||||
|
||||
/* The following structure definition is for driver use ONLY */
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char opp_flag ; /* the opp flag */
|
||||
unsigned char command ; /* the command code */
|
||||
unsigned short buffer_length ; /* the data length */
|
||||
unsigned char return_code ; /* the return code */
|
||||
unsigned char PF_bit ; /* the HDLC P/F bit */
|
||||
char MB_reserved[NUMBER_HDLC_MB_RES_BYTES] ; /* for later use */
|
||||
char data[SIZEOF_HDLC_MB_DATA_BFR] ; /* the data area */
|
||||
|
||||
} TRUE_HDLC_MAILBOX_STRUCT;
|
||||
|
||||
|
||||
typedef struct {
|
||||
pid_t pid_num ;
|
||||
HDLC_MAILBOX_STRUCT cmdarea ;
|
||||
|
||||
} CMDBLOCK_STRUCT;
|
||||
|
||||
/*
|
||||
* Interface commands
|
||||
*/
|
||||
|
||||
/*
|
||||
* global interface commands
|
||||
*/
|
||||
|
||||
#define READ_GLOBAL_EXCEPTION_CONDITION 0x01 /* read a global exception condition from the adapter */
|
||||
#define SET_GLOBAL_CONFIGURATION 0x02 /* set the global operational configuration */
|
||||
#define READ_GLOBAL_CONFIGURATION 0x03 /* read the global configuration */
|
||||
#define READ_GLOBAL_STATISTICS 0x04 /* retrieve the global statistics */
|
||||
#define FLUSH_GLOBAL_STATISTICS 0x05 /* flush the global statistics */
|
||||
#define SET_MODEM_STATUS 0x06 /* set the status of DTR and/or RTS */
|
||||
#define READ_MODEM_STATUS 0x07 /* read the current status of CTS and DCD */
|
||||
#define READ_COMMS_ERROR_STATS 0x08 /* read the communication error statistics */
|
||||
#define FLUSH_COMMS_ERROR_STATS 0x09 /* flush the communication error statistics */
|
||||
#define SET_TRACE_CONFIGURATION 0x0A /* set the line trace configuration */
|
||||
#define READ_TRACE_CONFIGURATION 0x0B /* read the line trace configuration */
|
||||
#define READ_TRACE_STATISTICS 0x0C /* read the trace statistics */
|
||||
#define FLUSH_TRACE_STATISTICS 0x0D /* flush the trace statistics */
|
||||
#define FT1_MONITOR_STATUS_CTRL 0x1E /* set the status of the S508/FT1 monitoring */
|
||||
#define SET_FT1_MODE 0x1F /* set the operational mode of the S508/FT1 module */
|
||||
|
||||
/*
|
||||
* HDLC-level interface commands
|
||||
*/
|
||||
|
||||
#define READ_HDLC_CODE_VERSION 0x20 /* read the HDLC code version */
|
||||
#define READ_HDLC_EXCEPTION_CONDITION 0x21 /* read an HDLC exception condition from the adapter */
|
||||
#define SET_HDLC_CONFIGURATION 0x22 /* set the HDLC operational configuration */
|
||||
#define READ_HDLC_CONFIGURATION 0x23 /* read the current HDLC operational configuration */
|
||||
#define ENABLE_HDLC_COMMUNICATIONS 0x24 /* enable HDLC communications */
|
||||
#define DISABLE_HDLC_COMMUNICATIONS 0x25 /* disable HDLC communications */
|
||||
#define HDLC_CONNECT 0x26 /* enter the HDLC ABM state */
|
||||
#define HDLC_DISCONNECT 0x27 /* enter the HDLC disconnected state */
|
||||
#define READ_HDLC_LINK_STATUS 0x28 /* read the HDLC link status */
|
||||
#define READ_HDLC_OPERATIONAL_STATS 0x29 /* retrieve the HDLC operational statistics */
|
||||
#define FLUSH_HDLC_OPERATIONAL_STATS 0x2A /* flush the HDLC operational statistics */
|
||||
#define SET_HDLC_BUSY_CONDITION 0x2B /* force the HDLC code into a busy condition */
|
||||
#define SEND_UI_FRAME 0x2C /* transmit an Unnumbered Information frame */
|
||||
#define SET_HDLC_INTERRUPT_TRIGGERS 0x30 /* set the HDLC application interrupt triggers */
|
||||
#define READ_HDLC_INTERRUPT_TRIGGERS 0x31 /* read the HDLC application interrupt trigger configuration */
|
||||
|
||||
|
||||
#define HDLC_SEND_NO_WAIT 0xE0 /* send I frames : Poll */
|
||||
#define HDLC_SEND_WAIT 0xE1 /* send I frames : Interrupt*/
|
||||
#define HDLC_READ_NO_WAIT 0xE2 /* receive I frames : Poll */
|
||||
#define HDLC_READ_WAIT 0xE3 /* receive I frames : Interrupt*/
|
||||
#define HDLC_READ_TRACE_DATA 0xE4 /* receive Trace data */
|
||||
|
||||
|
||||
/*
|
||||
* Return codes from interface commands
|
||||
*/
|
||||
|
||||
#define OK 0x00 /* the interface command was successfull */
|
||||
|
||||
/*
|
||||
* return codes from global interface commands
|
||||
*/
|
||||
|
||||
#define NO_GLOBAL_EXCEP_COND_TO_REPORT 0x01 /* there is no HDLC exception condition to report */
|
||||
#define LGTH_GLOBAL_CFG_DATA_INVALID 0x01 /* the length of the passed global configuration data is invalid */
|
||||
#define LGTH_TRACE_CFG_DATA_INVALID 0x01 /* the length of the passed trace configuration data is invalid */
|
||||
#define IRQ_TIMEOUT_VALUE_INVALID 0x02 /* an invalid application IRQ timeout value was selected */
|
||||
#define TRACE_CONFIG_INVALID 0x02 /* the passed line trace configuration is invalid */
|
||||
#define ADAPTER_OPERATING_FREQ_INVALID 0x03 /* an invalid adapter operating frequency was selected */
|
||||
#define TRC_DEAC_TMR_INVALID 0x03 /* the trace deactivation timer is invalid */
|
||||
#define S508_FT1_ADPTR_NOT_PRESENT 0x0E /* the S508/FT1 adapter is not present */
|
||||
#define S508_FT1_MODE_SELECTION_BUSY 0x0F /* the S508/FT1 adapter is busy selecting the operational mode */
|
||||
|
||||
/*
|
||||
* return codes from command READ_GLOBAL_EXCEPTION_CONDITION
|
||||
*/
|
||||
#define EXCEP_MODEM_STATUS_CHANGE 0x10 /* a modem status change occurred */
|
||||
#define EXCEP_TRC_DISABLED 0x11 /* the trace has been disabled */
|
||||
|
||||
/*
|
||||
* return codes from HDLC-level interface commands
|
||||
*/
|
||||
#define NO_HDLC_EXCEP_COND_TO_REPORT 0x21 /* there is no HDLC exception condition to report */
|
||||
#define HDLC_COMMS_DISABLED 0x21 /* communications are not currently enabled */
|
||||
#define HDLC_COMMS_ENABLED 0x21 /* communications are currently enabled */
|
||||
#define DISABLE_HDLC_COMMS_BEFORE_CFG 0x21 /* HDLC communications must be disabled before setting the configuration */
|
||||
#define ENABLE_HDLC_COMMS_BEFORE_CONN 0x21 /* communications must be enabled before using the HDLC_CONNECT conmmand */
|
||||
#define HDLC_CFG_BEFORE_COMMS_ENABLED 0x22 /* perform a SET_HDLC_CONFIGURATION before enabling comms */
|
||||
#define SET_TRACE_CFG 0x22 /* perform a SET_TRACE_CONFIGURATION */
|
||||
#define LGTH_HDLC_CFG_DATA_INVALID 0x22 /* the length of the passed HDLC configuration data is invalid */
|
||||
#define LGTH_HDLC_INT_DATA_INVALID 0x22 /* the length of the passed interrupt trigger data is invalid */
|
||||
#define HDLC_LINK_NOT_IN_ABM 0x22 /* the HDLC link is not currently in the ABM */
|
||||
#define HDLC_LINK_CURRENTLY_IN_ABM 0x22 /* the HDLC link is currently in the ABM */
|
||||
#define NO_TX_BFRS_AVAILABLE 0x23 /* no buffers available for transmission */
|
||||
#define INVALID_HDLC_APP_IRQ_SELECTED 0x23 /* in invalid IRQ was selected in the SET_HDLC_INTERRUPT_TRIGGERS */
|
||||
#define INVALID_HDLC_CFG_DATA 0x23 /* the passed HDLC configuration data is invalid */
|
||||
#define UI_FRM_TX_BFR_IN_USE 0x23 /* the buffer used for UI frame transmission is currently in use */
|
||||
#define T3_LESS_THAN_T1 0x24 /* the configured T3 value is less than T1 */
|
||||
#define HDLC_IRQ_TMR_VALUE_INVALID 0x24 /* an invalid application IRQ timer value was selected */
|
||||
#define UI_FRM_TX_LGTH_INVALID 0x24 /* the length of the UI frame to be transmitted is invalid */
|
||||
#define T4_LESS_THAN_T1 0x25 /* the configured T4 value is less than T1 */
|
||||
#define BFR_LGTH_EXCESSIVE_FOR_BFR_CFG 0x26 /* the configured buffer length is excessive for the configuration */
|
||||
#define INVALID_HDLC_COMMAND 0x4F /* the defined HDLC interface command is invalid */
|
||||
|
||||
/*
|
||||
* return codes from command READ_HDLC_EXCEPTION_CONDITION
|
||||
*/
|
||||
#define EXCEP_SABM_RX 0x30 /* a SABM frame was recvd in the ABM */
|
||||
#define EXCEP_DISC_RX 0x31 /* a DISC frame was recvd in the ABM */
|
||||
#define EXCEP_DM_RX 0x32 /* a DM frame was recvd in the ABM */
|
||||
#define EXCEP_UA_RX 0x33 /* a UA frame was recvd in the ABM */
|
||||
#define EXCEP_FRMR_RX 0x34 /* a FRMR frame was recvd in the ABM */
|
||||
#define EXCEP_UI_RX 0x37 /* a UI frame was received */
|
||||
#define EXCEP_SABM_TX_DM_RX 0x38 /* a SABM frame was transmitted due to the reception of a DM */
|
||||
#define EXCEP_SABM_TX_UA_RX 0x39 /* a SABM frame was transmitted due to the reception of a UA */
|
||||
/* while the link was in the ABM */
|
||||
#define EXCEP_SABM_TX_FRMR_RX 0x3A /* a SABM frame was transmitted due to the reception of a FRMR */
|
||||
/* while the link was in the ABM */
|
||||
#define EXCEP_SABM_TX_UNSOLIC_RESP_RX 0x3B /* a SABM frame was transmitted due to the reception of an */
|
||||
/* unsolicited response with the F bit set */
|
||||
#define EXCEP_SABM_TX_N2_EXPIRY 0x3C /* a SABM frame was transmitted due to an N2 count expiry */
|
||||
#define EXCEP_FRMR_TX 0x3F /* a FRMR frame was transmitted */
|
||||
#define EXCEP_SABM_RETRY_LIM_EXCEEDED 0x40 /* the SABM retry limit was exceeded */
|
||||
#define EXCEP_DISC_RETRY_LIM_EXCEEDED 0x41 /* the DISC retry limit was exceeded */
|
||||
#define EXCEP_FRMR_RETRY_LIM_EXCEEDED 0x42 /* the FRMR retry limit was exceeded */
|
||||
#define EXCEP_T3_TIMEOUT_EXCEEDED 0x45 /* the T3 timeout limit has been exceeded */
|
||||
|
||||
#define NO_TRACE_BUFFERS 0x60 /* No trace buffers are avail */
|
||||
#define TRACE_BUFFER_TOO_BIG 0x61
|
||||
#define TRACE_BUFFER_NOT_STORED 0x62
|
||||
|
||||
/*
|
||||
* Constants for the SET_GLOBAL_CONFIGURATION/READ_GLOBAL_CONFIGURATION
|
||||
* commands
|
||||
*/
|
||||
|
||||
/*
|
||||
* the global configuration structure
|
||||
*/
|
||||
typedef struct {
|
||||
|
||||
unsigned short adapter_config_options; /* configuration options */
|
||||
unsigned short app_IRQ_timeout; /* application IRQ timeout */
|
||||
unsigned long adapter_operating_frequency; /* operating frequency*/
|
||||
|
||||
} GLOBAL_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'app_IRQ_timeout' */
|
||||
#define MAX_APP_IRQ_TIMEOUT_VALUE 5000 /* the maximum permitted IRQ
|
||||
timeout */
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants for the READ_GLOBAL_STATISTICS command
|
||||
*/
|
||||
|
||||
/*
|
||||
* the global statistics structure
|
||||
*/
|
||||
typedef struct {
|
||||
|
||||
unsigned short app_IRQ_timeout_count;
|
||||
|
||||
} GLOBAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants for the READ_COMMS_ERROR_STATS command
|
||||
*/
|
||||
|
||||
/*
|
||||
* the communications error statistics structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char Rx_overrun_err_count; /* receiver overrun error count */
|
||||
unsigned char CRC_err_count; /* receiver CRC error count */
|
||||
unsigned char Rx_abort_count; /* abort frames received count */
|
||||
unsigned char Rx_dis_pri_bfrs_full_count; /* receiver disabled count */
|
||||
unsigned char comms_err_stat_reserved_1; /* reserved for later use */
|
||||
unsigned char comms_err_stat_reserved_2; /* reserved for later use */
|
||||
unsigned char missed_Tx_und_int_count;/* missed tx underrun intr count*/
|
||||
unsigned char comms_err_stat_reserved_3; /* reserved for later use */
|
||||
unsigned char DCD_state_change_count; /* DCD state change count */
|
||||
unsigned char CTS_state_change_count; /* CTS state change count */
|
||||
|
||||
} COMMS_ERROR_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants used for line tracing
|
||||
*/
|
||||
|
||||
/*
|
||||
* the trace configuration structure (SET_TRACE_CONFIGURATION/
|
||||
* READ_TRACE_CONFIGURATION commands)
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char trace_config ; /* trace configuration */
|
||||
unsigned short trace_deactivation_timer ; /* trace deactivation timer */
|
||||
unsigned long ptr_trace_stat_el_cfg_struct ; /* a pointer to the line trace element configuration structure */
|
||||
|
||||
} LINE_TRACE_CONFIG_STRUCT;
|
||||
|
||||
/* 'trace_config' bit settings */
|
||||
#define TRACE_INACTIVE 0x00 /* trace is inactive */
|
||||
#define TRACE_ACTIVE 0x01 /* trace is active */
|
||||
#define TRACE_DELAY_MODE 0x04 /* operate the trace in the
|
||||
delay mode */
|
||||
#define TRACE_I_FRAMES 0x08 /* trace I-frames */
|
||||
#define TRACE_SUPERVISORY_FRAMES 0x10 /* trace Supervisory frames */
|
||||
#define TRACE_UNNUMBERED_FRAMES 0x20 /* trace Unnumbered frames */
|
||||
|
||||
/*
|
||||
* the line trace status element configuration structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned short number_trace_status_elements ; /* number of line trace elements */
|
||||
unsigned long base_addr_trace_status_elements ;/* base address of the trace element list */
|
||||
unsigned long next_trace_element_to_use ; /* pointer to the next trace element to be used */
|
||||
unsigned long base_addr_trace_buffer ; /* base address of the trace data buffer */
|
||||
unsigned long end_addr_trace_buffer ; /* end address of the trace data buffer */
|
||||
|
||||
} TRACE_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/*
|
||||
* the line trace status element structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char opp_flag ; /* opp flag */
|
||||
unsigned short trace_length ; /* trace length */
|
||||
unsigned char trace_type ; /* trace type */
|
||||
unsigned short trace_time_stamp ;/* time stamp */
|
||||
unsigned short trace_reserved_1 ;/* reserved for later use */
|
||||
unsigned long trace_reserved_2 ; /* reserved for later use */
|
||||
unsigned long ptr_data_bfr ; /* pointer to the trace data buffer */
|
||||
|
||||
} TRACE_STATUS_ELEMENT_STRUCT;
|
||||
|
||||
/*
|
||||
* the line trace statistics structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned long frames_traced_count; /* number of frames traced*/
|
||||
unsigned long trc_frms_not_recorded_count; /* number of trace frames
|
||||
discarded */
|
||||
unsigned short trc_disabled_internally_count; /* number of times the
|
||||
trace was disabled
|
||||
internally */
|
||||
|
||||
} LINE_TRACE_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants for the SET_HDLC_CONFIGURATION command
|
||||
*/
|
||||
|
||||
/*
|
||||
* the HDLC configuration structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned long baud_rate ; /* the baud rate */
|
||||
unsigned short line_config_options ; /* line configuration options */
|
||||
unsigned short modem_config_options ; /* modem configuration options */
|
||||
unsigned short HDLC_API_options ; /* HDLC API options */
|
||||
unsigned short HDLC_protocol_options ; /* HDLC protocol options */
|
||||
unsigned short HDLC_buffer_config_options ; /* HDLC buffer configuration options */
|
||||
unsigned short HDLC_statistics_options ; /* HDLC operational statistics options */
|
||||
unsigned short configured_as_DTE ; /* DTE or DCE configuration */
|
||||
unsigned short max_HDLC_I_field_length ; /* the maximum length of the HDLC I-field */
|
||||
unsigned short HDLC_I_frame_window ; /* k - the I-frame window (maximum number of outstanding I-frames) */
|
||||
unsigned short HDLC_T1_timer ; /* the HDLC T1 timer */
|
||||
unsigned short HDLC_T2_timer ; /* the HDLC T2 timer */
|
||||
unsigned short HDLC_T3_timer ; /* the HDLC T3 timer */
|
||||
unsigned short HDLC_T4_timer ; /* the HDLC T4 timer */
|
||||
unsigned short HDLC_N2_counter ; /* the HDLC N2 counter */
|
||||
unsigned long ptr_shared_mem_info_struct ;/* a pointer to the shared memory area information structure */
|
||||
unsigned long ptr_HDLC_Tx_stat_el_cfg_struct ;/* a pointer to the transmit status element configuration structure */
|
||||
unsigned long ptr_HDLC_Rx_stat_el_cfg_struct ;/* a pointer to the receive status element configuration structure */
|
||||
|
||||
} HDLC_CONFIGURATION_STRUCT;
|
||||
|
||||
/* settings for the 'line_config_options' */
|
||||
#define INTERFACE_LEVEL_V35 0x0000 /* use V.35 interface level */
|
||||
#define INTERFACE_LEVEL_RS232 0x0001 /* use RS-232 interface level */
|
||||
|
||||
/* settings for the 'modem_config_options' */
|
||||
#define DONT_RAISE_DTR_RTS_ON_EN_COMMS 0x0001 /* don't automatically raise DTR and RTS when performing an */
|
||||
|
||||
/* ENABLE_HDLC_COMMUNICATIONS command */
|
||||
|
||||
#define DONT_REPORT_CHG_IN_MODEM_STAT 0x0002 /* don't report changes in modem status to the application */
|
||||
#define DISABLE_DCD_CTS_INTERRUPTS 0x0004 /* ignore DCD and CTS interrupts on the adapter */
|
||||
|
||||
/* bit settings for the 'HDLC_API_options' */
|
||||
#define PERMIT_HDLC_CONNECT_IN_ABM 0x0001 /* allow the use of the HDLC_CONNECT command while in the ABM */
|
||||
|
||||
/* bit settings for the 'HDLC_protocol_options' byte */
|
||||
#define MOD_8_SELECTED 0x0000 /* use modulo 8 operation */
|
||||
#define MOD_128_SELECTED 0x0001 /* use modulo 128 (extended) operation */
|
||||
#define AUTO_MODULO_DETECTION 0x0002 /* use automatic modulus detection */
|
||||
#define PASSIVE_LINK_SETUP 0x0004 /* no SABMs should be issued when setting up the link */
|
||||
#define ENTER_DISC_PHASE_AFTR_DISC_SNT 0x0008 /* enter the disconnnected phase after issuing a DISC command */
|
||||
|
||||
/* settings for the 'HDLC_buffer_config_options' */
|
||||
#define HDLC_I_FRM_RX_HYSTERESIS 0x000F /* the HDLC I-frame receive hysteresis */
|
||||
#define HDLC_I_FRM_BFRS_3rd_LVL_PROT 0x0010 /* the HDLC I-frame buffers are to be used by a 3rd level protocol */
|
||||
|
||||
/* settings for the 'HDLC_statistics_options' */
|
||||
#define HDLC_TX_I_FRM_BYTE_COUNT_STAT 0x0001 /* compute the number of I-frame bytes transmitted */
|
||||
#define HDLC_RX_I_FRM_BYTE_COUNT_STAT 0x0002 /* compute the number of I-frame bytes received */
|
||||
#define HDLC_TX_THROUGHPUT_STAT 0x0004 /* compute the I-frame transmit throughput */
|
||||
#define HDLC_RX_THROUGHPUT_STAT 0x0008 /* compute the I-frame receive throughput */
|
||||
|
||||
/* permitted minimum and maximum values for setting the HDLC configuration */
|
||||
#define MAX_BAUD_RATE 2666000 /* maximum baud rate */
|
||||
#define MIN_NO_DATA_BYTES_IN_I_FRAME 300 /* minimum length of the configured HDLC I-field */
|
||||
#define MIN_PERMITTED_k_VALUE 0 /* minimum I-frame window size */
|
||||
#define MAX_PERMITTED_k_VALUE 127 /* maximum I-frame window size */
|
||||
#define MIN_PERMITTED_T1_VALUE 1 /* minimum T1 */
|
||||
#define MAX_PERMITTED_T1_VALUE 60000 /* maximum T1 */
|
||||
#define MIN_PERMITTED_T2_VALUE 0 /* minimum T2 */
|
||||
#define MAX_PERMITTED_T2_VALUE 60000 /* maximum T2 */
|
||||
#define MIN_PERMITTED_T3_VALUE 0 /* minimum T3 */
|
||||
#define MAX_PERMITTED_T3_VALUE 60000 /* maximum T3 */
|
||||
#define MIN_PERMITTED_T4_VALUE 0 /* minimum T4 */
|
||||
#define MAX_PERMITTED_T4_VALUE 60000 /* maximum T4 */
|
||||
#define MIN_PERMITTED_N2_VALUE 1 /* minimum N2 */
|
||||
#define MAX_PERMITTED_N2_VALUE 30 /* maximum N2 */
|
||||
|
||||
|
||||
/*
|
||||
* Constants for the READ_HDLC_LINK_STATUS command
|
||||
*/
|
||||
|
||||
/*
|
||||
* the HDLC status structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char HDLC_link_status; /* HDLC link status (disconnect/ABM) */
|
||||
unsigned char modulus_type; /* configured modulus type */
|
||||
unsigned char no_I_frms_for_app;/* number of I-frames available for the application */
|
||||
unsigned char receiver_status; /* receiver status (enabled/disabled) */
|
||||
unsigned char LAPB_state; /* internal LAPB state */
|
||||
unsigned char rotating_SUP_frm_count; /* count of Supervisory frames received */
|
||||
|
||||
} HDLC_LINK_STATUS_STRUCT;
|
||||
|
||||
/* settings for the 'HDLC_link_status' variable */
|
||||
#define HDLC_LINK_DISCONNECTED 0x00 /* the HDLC link is disconnected */
|
||||
#define HDLC_LINK_IN_AB 0x01 /* the HDLC link is in the ABM (connected) */
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants for the READ_HDLC_OPERATIONAL_STATS command
|
||||
*/
|
||||
|
||||
/*
|
||||
* the HDLC operational statistics structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
/* Information frame transmission statistics */
|
||||
unsigned long I_frames_Tx_ack_count; /* I-frames transmitted (and acknowledged) count */
|
||||
unsigned long I_bytes_Tx_ack_count; /* I-bytes transmitted (and acknowledged) count */
|
||||
unsigned long I_frm_Tx_throughput; /* I-frame transmit throughput */
|
||||
unsigned long no_ms_for_HDLC_Tx_thruput_comp;/* millisecond time used for Tx throughput computation */
|
||||
unsigned long I_frames_retransmitted_count; /* I-frames re-transmitted count */
|
||||
unsigned long I_bytes_retransmitted_count; /* I-bytes re-transmitted count */
|
||||
unsigned short I_frms_not_Tx_lgth_err_count; /* number of I-frames not transmitted (length error) */
|
||||
unsigned short Tx_I_frms_disc_st_chg_count; /* the number of I-frames discarded (change in the LAPB state) */
|
||||
unsigned long reserved_I_frm_Tx_stat; /* reserved for later use */
|
||||
|
||||
/* Information frame reception statistics */
|
||||
unsigned long I_frames_Rx_buffered_count; /* I-frames received (and buffered) count */
|
||||
unsigned long I_bytes_Rx_buffered_count; /* I-bytes received (and buffered) count */
|
||||
unsigned long I_frm_Rx_throughput; /* I-frame receive throughput */
|
||||
unsigned long no_ms_for_HDLC_Rx_thruput_comp;/* millisecond time used for Rx throughput computation */
|
||||
unsigned short I_frms_Rx_too_long_count; /* I-frames received of excessive length count */
|
||||
unsigned short I_frms_Rx_seq_err_count; /* out of sequence I-frames received count */
|
||||
unsigned long reserved_I_frm_Rx_stat1; /* reserved for later use */
|
||||
unsigned long reserved_I_frm_Rx_stat2; /* reserved for later use */
|
||||
unsigned long reserved_I_frm_Rx_stat3; /* reserved for later use */
|
||||
|
||||
/* Supervisory frame transmission/reception statistics */
|
||||
unsigned short RR_Tx_count; /* RR frames transmitted count */
|
||||
unsigned short RR_Rx_count; /* RR frames received count */
|
||||
unsigned short RNR_Tx_count; /* RNR frames transmitted count */
|
||||
unsigned short RNR_Rx_count; /* RNR frames received count */
|
||||
unsigned short REJ_Tx_count; /* REJ frames transmitted count */
|
||||
unsigned short REJ_Rx_count; /* REJ frames received count */
|
||||
|
||||
/* Unnumbered frame transmission/reception statistics */
|
||||
unsigned short SABM_Tx_count; /* SABM frames transmitted count */
|
||||
unsigned short SABM_Rx_count; /* SABM frames received count */
|
||||
unsigned short SABME_Tx_count; /* SABME frames transmitted count */
|
||||
unsigned short SABME_Rx_count; /* SABME frames received count */
|
||||
unsigned short DISC_Tx_count; /* DISC frames transmitted count */
|
||||
unsigned short DISC_Rx_count; /* DISC frames received count */
|
||||
unsigned short DM_Tx_count; /* DM frames transmitted count */
|
||||
unsigned short DM_Rx_count; /* DM frames received count */
|
||||
unsigned short UA_Tx_count; /* UA frames transmitted count */
|
||||
unsigned short UA_Rx_count; /* UA frames received count */
|
||||
unsigned short FRMR_Tx_count; /* FRMR frames transmitted count */
|
||||
unsigned short FRMR_Rx_count; /* FRMR frames received count */
|
||||
unsigned short UI_Tx_count; /* UI frames transmitted count */
|
||||
unsigned short UI_Rx_buffered_count;/* UI frames received and buffered count */
|
||||
unsigned long reserved_Sup_Unnum_stat1; /* reserved for later use */
|
||||
unsigned long reserved_Sup_Unnum_stat2; /* reserved for later use */
|
||||
|
||||
/* Incomming frames with a format error statistics */
|
||||
unsigned short Rx_frm_shorter_32_bits_count; /* frames received of less than 32 bits in length count */
|
||||
unsigned short Rx_I_fld_Sup_Unnum_frm_count; /* Supervisory/Unnumbered frames received with */
|
||||
|
||||
/* illegal I-fields count */
|
||||
unsigned short Rx_frms_invld_HDLC_addr_count;/* frames received with an invalid HDLC address count */
|
||||
unsigned short Rx_invld_HDLC_ctrl_fld_count; /* frames received of an invalid/unsupported */
|
||||
/* control field count */
|
||||
unsigned long reserved_frm_format_err1; /* reserved for later use */
|
||||
unsigned long reserved_frm_format_err2; /* reserved for later use */
|
||||
|
||||
/* FRMR/UI reception error statistics */
|
||||
unsigned short Rx_FRMR_frms_discard_count;/* incomming FRMR frames discarded count */
|
||||
unsigned short Rx_UI_frms_discard_count;/* incomming UI frames discarded count */
|
||||
unsigned short UI_frms_Rx_invld_lgth_count;/* UI frames of invalid length received count */
|
||||
unsigned short reserved_Rx_err_stat1; /* reserved for later use */
|
||||
unsigned long reserved_Rx_err_stat2; /* reserved for later use */
|
||||
unsigned long reserved_Rx_err_stat3; /* reserved for later use */
|
||||
|
||||
/* HDLC timeout/retry statistics */
|
||||
unsigned short T1_timeout_count; /* T1 timeouts count */
|
||||
unsigned short T3_timeout_count; /* T3 timeouts count */
|
||||
unsigned short T4_timeout_count; /* T4 timeouts count */
|
||||
unsigned short reserved_timeout_stat; /* reserved for later use */
|
||||
unsigned short N2_threshold_reached_count;/* N2 threshold reached count */
|
||||
unsigned short reserved_threshold_stat; /* reserved for later use */
|
||||
unsigned long To_retry_reserved_stat; /* reserved for later use */
|
||||
|
||||
/* miscellaneous statistics */
|
||||
unsigned long reserved_misc_stat1; /* reserved for later use */
|
||||
unsigned long reserved_misc_stat2; /* reserved for later use */
|
||||
unsigned long reserved_misc_stat3; /* reserved for later use */
|
||||
unsigned long reserved_misc_stat4; /* reserved for later use */
|
||||
|
||||
} HDLC_OPERATIONAL_STATS_STRUCT;
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants for the SEND_UI_FRAME command
|
||||
*/
|
||||
|
||||
#define MAX_LENGTH_UI_DATA 512 /* maximum UI frame data length */
|
||||
|
||||
/*
|
||||
* the structure used for UI frame transmission/reception
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
unsigned char HDLC_address; /* HDLC address in the frame */
|
||||
unsigned char UI_reserved; /* reserved for internal use */
|
||||
char data[MAX_LENGTH_UI_DATA]; /* UI data area */
|
||||
} UI_FRAME_STRUCT;
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants for using application interrupts
|
||||
*/
|
||||
|
||||
/*
|
||||
* the structure used for the SET_HDLC_INTERRUPT_TRIGGERS/
|
||||
* READ_HDLC_INTERRUPT_TRIGGERS command
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char HDLC_interrupt_triggers; /* HDLC interrupt trigger configuration */
|
||||
unsigned char IRQ; /* IRQ to be used */
|
||||
unsigned short interrupt_timer; /* interrupt timer */
|
||||
|
||||
} HDLC_INT_TRIGGERS_STRUCT;
|
||||
|
||||
/* 'HDLC_interrupt_triggers' bit settings */
|
||||
#define APP_INT_ON_RX_FRAME 0x01 /* interrupt on I-frame reception */
|
||||
#define APP_INT_ON_TX_FRAME 0x02 /* interrupt when an I-frame may be transmitted */
|
||||
#define APP_INT_ON_COMMAND_COMPLETE 0x04 /* interrupt when an interface command is complete */
|
||||
#define APP_INT_ON_TIMER 0x08 /* interrupt on a defined millisecond timeout */
|
||||
#define APP_INT_ON_GLOBAL_EXCEP_COND 0x10 /* interrupt on a global exception condition */
|
||||
#define APP_INT_ON_HDLC_EXCEP_COND 0x20 /* interrupt on an HDLC exception condition */
|
||||
#define APP_INT_ON_TRACE_DATA_AVAIL 0x80 /* interrupt when trace data is available */
|
||||
|
||||
|
||||
/*
|
||||
* the HDLC interrupt information structure
|
||||
*/
|
||||
typedef struct {
|
||||
|
||||
unsigned char interrupt_type ; /* type of interrupt triggered */
|
||||
unsigned char interrupt_permission ; /* interrupt permission mask */
|
||||
unsigned char int_info_reserved[14] ; /* reserved */
|
||||
|
||||
} HDLC_INTERRUPT_INFO_STRUCT;
|
||||
|
||||
/* interrupt types indicated at 'interrupt_type' byte of the
|
||||
HDLC_INTERRUPT_INFO_STRUCT */
|
||||
#define NO_APP_INTS_PEND 0x00 /* no interrups are pending */
|
||||
#define RX_APP_INT_PEND 0x01 /*receive interrupt is pending */
|
||||
#define TX_APP_INT_PEND 0x02 /* a transmit interrupt is pending */
|
||||
#define COMMAND_COMPLETE_APP_INT_PEND 0x04 /* a 'command complete' interrupt is pending */
|
||||
#define TIMER_APP_INT_PEND 0x08 /* a timer interrupt is pending */
|
||||
#define GLOBAL_EXCEP_COND_APP_INT_PEND 0x10 /* a global exception condition interrupt is pending */
|
||||
#define HDLC_EXCEP_COND_APP_INT_PEND 0x20 /* an HDLC exception condition interrupt is pending */
|
||||
#define TRACE_DATA_AVAIL_APP_INT_PEND 0x80 /* a trace data available interrupt is pending */
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants for Information frame transmission
|
||||
*/
|
||||
|
||||
/*
|
||||
* the I-frame transmit status element configuration structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned short number_Tx_status_elements ; /* number of transmit status elements */
|
||||
unsigned long base_addr_Tx_status_elements ; /* base address of the transmit element list */
|
||||
unsigned long next_Tx_status_element_to_use ; /* pointer to the next transmit element to be used */
|
||||
|
||||
} HDLC_TX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/*
|
||||
* the I-frame transmit status element structure
|
||||
*/
|
||||
typedef struct {
|
||||
|
||||
unsigned char opp_flag ; /* opp flag */
|
||||
unsigned short I_frame_length ; /* length of the frame*/
|
||||
unsigned char P_bit ; /* P-bit setting in the frame */
|
||||
unsigned long reserved_1 ; /* reserved for internal use */
|
||||
unsigned long reserved_2 ; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr ; /* pointer to the data area */
|
||||
|
||||
} HDLC_I_FRM_TX_STATUS_EL_STRUCT;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants for Information frame reception
|
||||
*/
|
||||
|
||||
/*
|
||||
* the I-frame receive status element configuration structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned short number_Rx_status_elements ; /* number of receive status elements */
|
||||
unsigned long base_addr_Rx_status_elements ; /* base address of the receive element list */
|
||||
unsigned long next_Rx_status_element_to_use ; /* pointer to the next receive element to be used */
|
||||
unsigned long base_addr_Rx_buffer ; /* base address of the receive data buffer */
|
||||
unsigned long end_addr_Rx_buffer ; /* end address of the receive data buffer */
|
||||
} HDLC_RX_STATUS_EL_CFG_STRUCT;
|
||||
|
||||
/*
|
||||
* the I-frame receive status element structure
|
||||
*/
|
||||
typedef struct {
|
||||
|
||||
unsigned char opp_flag ; /* opp flag */
|
||||
unsigned short I_frame_length ; /*length of the recvd frame */
|
||||
unsigned char P_bit ; /* P-bit setting in the frame */
|
||||
unsigned long reserved_1 ; /* reserved for internal use */
|
||||
unsigned long reserved_2 ; /* reserved for internal use */
|
||||
unsigned long ptr_data_bfr ; /* pointer to the data area */
|
||||
|
||||
} HDLC_I_FRM_RX_STATUS_EL_STRUCT;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Constants defining the shared memory information area
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* the global information structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char global_status ; /* global status */
|
||||
unsigned char modem_status ;/* current modem status*/
|
||||
unsigned char global_excep_conditions ; /* global exception conditions */
|
||||
unsigned char glob_info_reserved[5] ; /* reserved */
|
||||
unsigned char code_name[4] ; /* code name */
|
||||
unsigned char code_version[4] ; /* code version */
|
||||
|
||||
} GLOBAL_INFORMATION_STRUCT;
|
||||
|
||||
|
||||
/*
|
||||
* the S508/FT1 information structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char parallel_port_A_input ; /* input - parallel port A */
|
||||
unsigned char parallel_port_B_input ; /* input - parallel port B */
|
||||
unsigned char FT1_info_reserved[14] ; /* reserved */
|
||||
|
||||
} FT1_INFORMATION_STRUCT;
|
||||
|
||||
/*
|
||||
* the HDLC information structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char HDLC_status ; /* HDLC status */
|
||||
unsigned char HDLC_excep_frms_Rx ; /* HDLC exception conditions - received frames */
|
||||
unsigned char HDLC_excep_frms_Tx ; /* HDLC exception conditions - transmitted frames */
|
||||
unsigned char HDLC_excep_miscellaneous ; /* HDLC exception conditions - miscellaneous */
|
||||
unsigned char rotating_SUP_frm_count ; /* rotating Supervisory frame count */
|
||||
unsigned char LAPB_status ; /* internal LAPB status */
|
||||
unsigned char internal_HDLC_status ; /* internal HDLC status */
|
||||
unsigned char HDLC_info_reserved[9] ; /* reserved */
|
||||
|
||||
} HDLC_INFORMATION_STRUCT;
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* the HDLC shared memory area information structure
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
|
||||
GLOBAL_INFORMATION_STRUCT global_info ; /* the global information structure */
|
||||
FT1_INFORMATION_STRUCT FT1_info ; /* the S508/FT1 information structure */
|
||||
HDLC_INFORMATION_STRUCT HDLC_info ; /* the HDLC information structure */
|
||||
HDLC_INTERRUPT_INFO_STRUCT HDLC_interrupt_info ; /* the HDLC interrupt information structure */
|
||||
|
||||
} HDLC_SHARED_MEMORY_INFO_STRUCT;
|
||||
|
||||
#pragma pack()
|
||||
#endif
|
|
@ -0,0 +1,157 @@
|
|||
#ifndef __WANPIPE_MFR__
|
||||
#define __WANPIPE_MFR__
|
||||
|
||||
#define HDLC_PROT_ONLY
|
||||
#include <linux/sdla_chdlc.h>
|
||||
#include <linux/sdla_fr.h>
|
||||
|
||||
#undef MAX_FR_CHANNELS
|
||||
#undef HIGHEST_VALID_DLCI
|
||||
|
||||
#define MAX_FR_CHANNELS 1023
|
||||
#define HIGHEST_VALID_DLCI MAX_FR_CHANNELS-1
|
||||
|
||||
typedef struct {
|
||||
unsigned ea1 : 1;
|
||||
unsigned cr : 1;
|
||||
unsigned dlcih: 6;
|
||||
|
||||
unsigned ea2 : 1;
|
||||
unsigned de : 1;
|
||||
unsigned becn : 1;
|
||||
unsigned fecn : 1;
|
||||
unsigned dlcil: 4;
|
||||
}__attribute__ ((packed)) fr_hdr;
|
||||
|
||||
|
||||
#define FR_HEADER_LEN 8
|
||||
|
||||
#define LINK_STATE_RELIABLE 0x01
|
||||
#define LINK_STATE_REQUEST 0x02 /* full stat sent (DCE) / req pending (DTE) */
|
||||
#define LINK_STATE_CHANGED 0x04 /* change in PVCs state, send full report */
|
||||
#define LINK_STATE_FULLREP_SENT 0x08 /* full report sent */
|
||||
|
||||
#define FR_UI 0x03
|
||||
#define FR_PAD 0x00
|
||||
|
||||
#define NLPID_IP 0xCC
|
||||
#define NLPID_IPV6 0x8E
|
||||
#define NLPID_SNAP 0x80
|
||||
#define NLPID_PAD 0x00
|
||||
#define NLPID_Q933 0x08
|
||||
|
||||
|
||||
|
||||
/* 'status' defines */
|
||||
#define FR_LINK_INOPER 0x00 /* for global status (DLCI == 0) */
|
||||
#define FR_LINK_OPER 0x01
|
||||
|
||||
#if 0
|
||||
#define FR_DLCI_INOPER 0x00
|
||||
#define FR_DLCI_DELETED 0x01 /* for circuit status (DLCI != 0) */
|
||||
#define FR_DLCI_ACTIVE 0x02
|
||||
#define FR_DLCI_WAITING 0x04
|
||||
#define FR_DLCI_NEW 0x08
|
||||
#define FR_DLCI_REPORT 0x40
|
||||
#endif
|
||||
|
||||
#define PVC_STATE_NEW 0x01
|
||||
#define PVC_STATE_ACTIVE 0x02
|
||||
#define PVC_STATE_FECN 0x08 /* FECN condition */
|
||||
#define PVC_STATE_BECN 0x10 /* BECN condition */
|
||||
|
||||
|
||||
#define LMI_ANSI_DLCI 0
|
||||
#define LMI_LMI_DLCI 1023
|
||||
|
||||
#define LMI_PROTO 0x08
|
||||
#define LMI_CALLREF 0x00 /* Call Reference */
|
||||
#define LMI_ANSI_LOCKSHIFT 0x95 /* ANSI lockshift */
|
||||
#define LMI_REPTYPE 1 /* report type */
|
||||
#define LMI_CCITT_REPTYPE 0x51
|
||||
#define LMI_ALIVE 3 /* keep alive */
|
||||
#define LMI_CCITT_ALIVE 0x53
|
||||
#define LMI_PVCSTAT 7 /* pvc status */
|
||||
#define LMI_CCITT_PVCSTAT 0x57
|
||||
#define LMI_FULLREP 0 /* full report */
|
||||
#define LMI_INTEGRITY 1 /* link integrity report */
|
||||
#define LMI_SINGLE 2 /* single pvc report */
|
||||
#define LMI_STATUS_ENQUIRY 0x75
|
||||
#define LMI_STATUS 0x7D /* reply */
|
||||
|
||||
#define LMI_REPT_LEN 1 /* report type element length */
|
||||
#define LMI_INTEG_LEN 2 /* link integrity element length */
|
||||
|
||||
#define LMI_LENGTH 13 /* standard LMI frame length */
|
||||
#define LMI_ANSI_LENGTH 14
|
||||
|
||||
#define HDLC_MAX_MTU 1500 /* Ethernet 1500 bytes */
|
||||
#define HDLC_MAX_MRU (HDLC_MAX_MTU + 10) /* max 10 bytes for FR */
|
||||
|
||||
#define MAX_TRACE_QUEUE 100
|
||||
#define TRACE_QUEUE_LIMIT 1001
|
||||
#define MAX_TRACE_TIMEOUT (HZ*10)
|
||||
|
||||
static __inline__ u16 status_to_dlci(u8 *status, u8 *state)
|
||||
{
|
||||
*state &= ~(PVC_STATE_ACTIVE | PVC_STATE_NEW);
|
||||
if (status[2] & 0x08)
|
||||
*state |= PVC_STATE_NEW;
|
||||
else if (status[2] & 0x02)
|
||||
*state |= PVC_STATE_ACTIVE;
|
||||
|
||||
return ((status[0] & 0x3F)<<4) | ((status[1] & 0x78)>>3);
|
||||
}
|
||||
|
||||
|
||||
|
||||
static __inline__ u16 q922_to_dlci(u8 *hdr)
|
||||
{
|
||||
return ((hdr[0] & 0xFC)<<2) | ((hdr[1] & 0xF0)>>4);
|
||||
}
|
||||
|
||||
|
||||
static inline u8 fr_lmi_nextseq(u8 x)
|
||||
{
|
||||
x++;
|
||||
return x ? x : 1;
|
||||
}
|
||||
|
||||
static __inline__ void dlci_to_q922(u8 *hdr, u16 dlci)
|
||||
{
|
||||
hdr[0] = (dlci>>2) & 0xFC;
|
||||
hdr[1] = ((dlci<<4) & 0xF0) | 0x01;
|
||||
}
|
||||
|
||||
|
||||
typedef struct {
|
||||
|
||||
struct tasklet_struct wanpipe_task;
|
||||
unsigned long tq_working;
|
||||
netdevice_t *dlci_to_dev_map[MAX_FR_CHANNELS];
|
||||
unsigned char global_dlci_map[MAX_FR_CHANNELS];
|
||||
wan_fr_conf_t cfg;
|
||||
unsigned char station;
|
||||
struct sk_buff_head rx_free;
|
||||
struct sk_buff_head rx_used;
|
||||
struct sk_buff_head lmi_queue;
|
||||
struct sk_buff_head trace_queue;
|
||||
unsigned long last_rx_poll;
|
||||
unsigned int txseq, rxseq;
|
||||
unsigned char state;
|
||||
unsigned long n391cnt;
|
||||
unsigned int last_errors;
|
||||
struct timer_list timer;
|
||||
unsigned short lmi_dlci;
|
||||
netdevice_t *tx_dev;
|
||||
|
||||
fr_link_stat_t link_stats;
|
||||
void *update_dlci;
|
||||
unsigned long tracing_enabled;
|
||||
int max_trace_queue;
|
||||
unsigned long trace_timeout;
|
||||
|
||||
unsigned int max_rx_queue;
|
||||
} fr_prot_t;
|
||||
|
||||
#endif
|
|
@ -0,0 +1,221 @@
|
|||
/*****************************************************************************
|
||||
* POSAPI.H - Sangoma POS Adapter. Application Program Interface definitions.
|
||||
* (c) Sangoma Technologies Inc., 1993-1994
|
||||
* ----------------------------------------------------------------------------
|
||||
* Date: Revision: By:
|
||||
* May 25, 1994 2.32 - CONFIGSTRUC has been changed. If half_duplex is
|
||||
* non-zero then half-duplex ASYNCH mode is
|
||||
* selected. Zero selects full-duplex mode. Default
|
||||
* mode is half-duplex (defined as DFT_HALFDUPLEX). EK
|
||||
*
|
||||
* Jan.19, 1994 2.10 - POSSETUPSTRUC has been changed to accomodate EK
|
||||
* 2-byte address field.
|
||||
*
|
||||
* Jan.11, 1994 2.00 - Initial. EK
|
||||
*****************************************************************************/
|
||||
|
||||
/****** GENERAL DATA TYPES DEFINITIONS **************************************/
|
||||
|
||||
#ifndef __SDLA_POS_H_
|
||||
#define __SDLA_POS_H_
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/*----- General Purpose Constants ------------------------------------------*/
|
||||
#define TRUE 1 /* values for BOOL data type */
|
||||
#define FALSE 0
|
||||
#ifndef NULL
|
||||
#define NULL 0
|
||||
#endif
|
||||
|
||||
/*----- POS and ASYNC Mode Definitions -------------------------------------*/
|
||||
#define SDLC_ALL 0 /* Pass all received frames */
|
||||
#define SDLC_INFO 1 /* Pass all I-frames (default) */
|
||||
#define SDLC_SELECT 2 /* Pass only I-frames with matching address */
|
||||
#define ASYNC_4800 0 /* RS485 line speed: 4800 bps */
|
||||
#define ASYNC_9600 1 /* RS485 line speed: 9600 bps */
|
||||
#define ASYNC_19200 2 /* RS485 line speed: 19200 bps */
|
||||
#define ASYNC_38400 3 /* RS485 line speed: 38400 bps */
|
||||
#define ASYNC_MAXSPEED ASYNC_38400
|
||||
#define PRIMARY_ATTR 0 /* frame belongs to primary station */
|
||||
#define SECONDARY_ATTR 1 /* frame belongs to secondary station */
|
||||
|
||||
/*----- Default Configuration and Setup Parameters -------------------------*/
|
||||
#define WINDOW_SIZE 0x2000 /* size of shared memory window */
|
||||
#define TIME_OUT 2 /* board response time-out, sec */
|
||||
#define MAX_DATA 1030 /* maximum I-frame data field length */
|
||||
#define MIN_DATA 128 /* minimum I-frame data field length */
|
||||
#define DFT_POSDATA 265 /* default I-frame data field length */
|
||||
#define DFT_SDLCLINES 1 /* default number of monitored POS lines */
|
||||
#define DFT_SDLCMODE SDLC_INFO
|
||||
#define DFT_ASYNCLINES 1 /* default number of monitored asynch lines */
|
||||
#define DFT_ASYNCSPEED ASYNC_19200
|
||||
#define DFT_HALFDUPLEX TRUE /* default asynch mode */
|
||||
|
||||
/*----- Mailbox interface constants ----------------------------------------*/
|
||||
#define CLEAR 0x00 /* no activity */
|
||||
#define EXE_CMD 0x01 /* execute mailbox command flag */
|
||||
#define SDLC1_RXRDY 0x01 /* bit 0 - POS#1 frames available */
|
||||
#define SDLC2_RXRDY 0x02 /* bit 1 - POS#2 frames available */
|
||||
#define ASYNC1_RXRDY 0x01 /* bit 0 - ASYNC#1 data available */
|
||||
#define ASYNC1_TXRDY 0x02 /* bit 1 - ASYNC#1 transmit buffer empty */
|
||||
#define ASYNC2_RXRDY 0x04 /* bit 2 - ASYNC#2 data available */
|
||||
#define ASYNC2_TXRDY 0x08 /* bit 3 - ASYNC#2 transmit buffer empty */
|
||||
|
||||
/*----- POS Commands -------------------------------------------------------*/
|
||||
#define CONFIGURE 0x01 /* Configure POS */
|
||||
#define SEND_ASYNC 0x02 /* Send block of data through ASYNC port */
|
||||
#define RECEIVE_ASYNC 0x03 /* Receive block of bata through ASYNC port */
|
||||
#define ENABLE_POS 0x04 /* Start listening on a POS loop */
|
||||
#define DISABLE_POS 0x05 /* Stop listening on a POS loop */
|
||||
#define RECEIVE_POS 0x06 /* Receive a frame buffered from POS loop */
|
||||
#define READ_ERR_STATS 0x07 /* Retrieve POS communic. error statistics */
|
||||
#define FLUSH_ERRORS 0x08 /* Reset all error counters */
|
||||
#define SEND_RECV_STATE 0x09 /* Get transmit/receive buffers state */
|
||||
#define POS_SETUP 0x0A /* Set POS loop monitoring mode */
|
||||
#define RESET_CARD 0x0B /* Clear all buffers, set all default modes */
|
||||
|
||||
/*----- POS Return Codes ---------------------------------------------------*/
|
||||
#define POS_OK 0x00 /* Command executed successfully */
|
||||
#define POS_BADPORT 0x01 /* Invalid port number */
|
||||
#define POS_WASDONE 0x02 /* Command has already been executed */
|
||||
#define POS_DISABLED 0x03 /* Port is disabled */
|
||||
#define POS_DENIED 0x33 /* Board temporarily unaccessable */
|
||||
#define INVALID_CMD 0x80 /* Unrecognized command code */
|
||||
#define INVALID_PAR 0x81 /* Invalid parameter value */
|
||||
#define POS_FAULT 0x0A /* Board hung */
|
||||
#define POS_INIT_OK 0xF0 /* Board initialized */
|
||||
|
||||
#define BYTE unsigned char
|
||||
#define WORD unsigned short
|
||||
/****** DATA STRUCTURES *****************************************************/
|
||||
|
||||
/*----- Command Control Block ------------------------------------------------
|
||||
* This structure is used for microcode command execution.
|
||||
*--------------------------------------------------------------------------*/
|
||||
|
||||
typedef struct {
|
||||
BYTE command; /* disp.00h: Command code */
|
||||
WORD buf_len; /* disp.01h: Length of data buffer */
|
||||
BYTE ret_code; /* disp.03h: Result of previous command */
|
||||
BYTE port_num; /* disp.04h: Port number (0 - general) */
|
||||
BYTE prim_sec; /* disp.05h: Primary/Secondary attribute */
|
||||
BYTE reserved [10]; /* disp.06h .. 0Fh: reserved for later use */
|
||||
BYTE data [MAX_DATA]; /* disp.10h: data transfer buffer */
|
||||
} PIPCBSTRUC;
|
||||
|
||||
|
||||
/*----- Mailbox Structure ---------------------------------------------------
|
||||
* This structure is used for microcode application program interface.
|
||||
*--------------------------------------------------------------------------*/
|
||||
|
||||
typedef struct {
|
||||
BYTE exe_flag; /* disp.00h: '1' - enable command execution */
|
||||
BYTE sdlc_flags; /* disp.01h: POS SDLC channels status */
|
||||
BYTE async_flags; /* disp.02h: ASYNC channels status */
|
||||
BYTE reserved [13]; /* disp.03 .. 0Fh - reserved for later use */
|
||||
PIPCBSTRUC pipcb; /* disp.10h: PIP Control Block */
|
||||
} POSMBSTRUC;
|
||||
|
||||
|
||||
/*----- Card Configuration Data Block ----------------------------------------
|
||||
* Used for CONFIGURE command.
|
||||
*--------------------------------------------------------------------------*/
|
||||
|
||||
typedef struct {
|
||||
BYTE sdlc_lines; /* disp.00h: number of active SDLC lines */
|
||||
WORD sdlc_maxdata; /* disp.01h: maximum length of the I-frame */
|
||||
BYTE async_lines; /* disp.03h: number of active ASYNC lines */
|
||||
BYTE async_speed; /* disp.04h: asynchronous line(s) speed */
|
||||
BYTE half_duplex; /* disp.05h: half/full-duplex configuration */
|
||||
} CONFIGSTRUC;
|
||||
|
||||
|
||||
/*----- SDLC Communications Error Statistics Data Block ----------------------
|
||||
* Used for READ_ERR_STATS command.
|
||||
*--------------------------------------------------------------------------*/
|
||||
|
||||
typedef struct {
|
||||
WORD overrun_err; /* disp.00h: receiver overrun error count */
|
||||
WORD CRC_err; /* disp.02h: receiver CRC error count */
|
||||
WORD abort_err; /* disp.04h: aborted frames count */
|
||||
WORD lost_err; /* disp.06h: buffer overflow error count */
|
||||
WORD excess_err; /* disp.08h: excessive frame length count */
|
||||
} ERRSTATSTRUC;
|
||||
|
||||
|
||||
/*----- POS Send/Receive State Data Block ------------------------------------
|
||||
* Used for SEND_RECV_STATE command.
|
||||
*--------------------------------------------------------------------------*/
|
||||
|
||||
typedef struct {
|
||||
WORD POS1_received; /* disp.00h: POS#1 queued frames count */
|
||||
WORD POS2_received; /* disp.02h: POS#2 queued frames count */
|
||||
WORD async1_recvd; /* disp.04h: bytes in ASYNC#1 receive buffer*/
|
||||
WORD async1_transm; /* disp.06h: free in ASYNC#1 transmit buffer*/
|
||||
WORD async2_recvd; /* disp.08h: bytes in ASYNC#2 receive buffer*/
|
||||
WORD async2_transm; /* disp.0Ah: free in ASYNC#2 transmit buffer*/
|
||||
} POSSTATESTRUC;
|
||||
|
||||
|
||||
/*----- POS Setup Data Block -------------------------------------------------
|
||||
* Used for POS_SETUP command.
|
||||
*--------------------------------------------------------------------------*/
|
||||
|
||||
typedef struct {
|
||||
BYTE mode; /* disp.00h: POS operation mode */
|
||||
WORD addr; /* disp.01h: address to search for */
|
||||
} POSSETUPSTRUC;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
/**************************************************************
|
||||
*
|
||||
* TEMPLATE
|
||||
*
|
||||
*************************************************************/
|
||||
|
||||
#define CONFIGURATION_STRUCT CONFIGSTRUC
|
||||
|
||||
#define WANCONFIG_FRMW WANCONFIG_ATM
|
||||
|
||||
#define OK 0
|
||||
#define COMMAND_OK OK
|
||||
|
||||
enum {
|
||||
ROUTER_UP_TIME = 0x50,
|
||||
FT1_READ_STATUS,
|
||||
ENABLE_TRACING,
|
||||
FT1_MONITOR_STATUS_CTRL,
|
||||
ENABLE_READ_FT1_STATUS,
|
||||
ENABLE_READ_FT1_OP_STATS
|
||||
};
|
||||
|
||||
#define DCD_HIGH 0x08
|
||||
#define CTS_HIGH 0x20
|
||||
|
||||
#define MIN_WP_PRI_MTU 1500
|
||||
#define MAX_WP_PRI_MTU MIN_WP_PRI_MTU
|
||||
#define DEFAULT_WP_PRI_MTU MIN_WP_PRI_MTU
|
||||
|
||||
#define MIN_WP_SEC_MTU 1500
|
||||
#define MAX_WP_SEC_MTU MIN_WP_SEC_MTU
|
||||
#define DEFAULT_WP_SEC_MTU MIN_WP_SEC_MTU
|
||||
|
||||
|
||||
/* reasons for enabling the timer interrupt on the adapter */
|
||||
#define TMR_INT_ENABLED_UDP 0x01
|
||||
#define TMR_INT_ENABLED_UPDATE 0x02
|
||||
#define TMR_INT_ENABLED_CONFIG 0x10
|
||||
#define TMR_INT_ENABLED_TE 0x20
|
||||
|
||||
#define SIOC_WANPIPE_EXEC_CMD SIOC_WANPIPE_DEVPRIVATE
|
||||
#define SIOC_WANPIPE_POS_STATUS_CMD SIOC_WANPIPE_DEVPRIVATE+1
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define PRI_BASE_ADDR_MB_STRUCT 0xE000
|
||||
|
||||
#endif
|
||||
#endif
|
|
@ -0,0 +1,374 @@
|
|||
/*****************************************************************************
|
||||
* sdla_ppp.h Sangoma PPP firmware API definitions.
|
||||
*
|
||||
* Author: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-1997 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Feb 24, 2000 Nenad Corbic v2.1.2
|
||||
* Jan 06, 1997 Gene Kozin v2.0
|
||||
* Apr 11, 1996 Gene Kozin Initial version.
|
||||
*****************************************************************************/
|
||||
#ifndef _SDLA_PPP_H
|
||||
#define _SDLA_PPP_H
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Notes:
|
||||
* ------
|
||||
* 1. All structures defined in this file are byte-alined.
|
||||
*
|
||||
* Compiler Platform
|
||||
* -------- --------
|
||||
* GNU C Linux
|
||||
*/
|
||||
|
||||
#include "wanpipe_sppp_iface.h"
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* Adapter memory layout and important constants */
|
||||
#define PPP508_MB_VECT 0xE000 /* mailbox window vector */
|
||||
#define PPP508_MB_OFFS 0 /* mailbox offset */
|
||||
#define PPP508_FLG_OFFS 0x1000 /* status flags offset */
|
||||
#define PPP508_BUF_OFFS 0x1100 /* buffer info block offset */
|
||||
#define PPP514_MB_OFFS 0xE000 /* mailbox offset */
|
||||
#define PPP514_FLG_OFFS 0xF000 /* status flags offset */
|
||||
#define PPP514_BUF_OFFS 0xF100 /* buffer info block offset */
|
||||
|
||||
#define PPP_MAX_DATA 1008 /* command block data buffer length */
|
||||
|
||||
/****** Data Structures *****************************************************/
|
||||
/*----------------------------------------------------------------------------
|
||||
* PPP Command Block.
|
||||
*/
|
||||
typedef struct ppp_cmd{
|
||||
unsigned char command ; /* command code */
|
||||
unsigned short length ; /* length of data buffer */
|
||||
unsigned char result ; /* return code */
|
||||
unsigned char rsrv[11] ; /* reserved for future use */
|
||||
} ppp_cmd_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned char status ;
|
||||
unsigned char data_avail ;
|
||||
unsigned short real_length ;
|
||||
unsigned short time_stamp ;
|
||||
unsigned char data[1] ;
|
||||
} trace_pkt_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
unsigned char opp_flag ;
|
||||
unsigned char trace_type ;
|
||||
unsigned short trace_length ;
|
||||
unsigned short trace_data_ptr ;
|
||||
unsigned short trace_time_stamp ;
|
||||
} trace_element_t;
|
||||
|
||||
|
||||
|
||||
/* 'result' field defines */
|
||||
#define PPPRES_OK 0x00 /* command executed successfully */
|
||||
#define PPPRES_INVALID_STATE 0x09 /* invalid command in this context */
|
||||
|
||||
#if 0
|
||||
/*----------------------------------------------------------------------------
|
||||
* PPP Mailbox.
|
||||
* This structure is located at offset PPP???_MB_OFFS into PPP???_MB_VECT
|
||||
*/
|
||||
typedef struct ppp_mbox
|
||||
{
|
||||
unsigned char flag ; /* 00h: command execution flag */
|
||||
ppp_cmd_t cmd ; /* 01h: command block */
|
||||
unsigned char data[1] ; /* 10h: variable length data buffer */
|
||||
} ppp_mbox_t;
|
||||
#endif
|
||||
/*----------------------------------------------------------------------------
|
||||
* PPP Status Flags.
|
||||
* This structure is located at offset PPP???_FLG_OFFS into
|
||||
* PPP???_MB_VECT.
|
||||
*/
|
||||
typedef struct ppp_flags
|
||||
{
|
||||
unsigned char iflag ; /* 00: interrupt flag */
|
||||
unsigned char imask ; /* 01: interrupt mask */
|
||||
unsigned char resrv ;
|
||||
unsigned char mstatus ; /* 03: modem status */
|
||||
unsigned char lcp_state ; /* 04: LCP state */
|
||||
unsigned char ppp_phase ; /* 05: PPP phase */
|
||||
unsigned char ip_state ; /* 06: IPCP state */
|
||||
unsigned char ipx_state ; /* 07: IPXCP state */
|
||||
unsigned char pap_state ; /* 08: PAP state */
|
||||
unsigned char chap_state ; /* 09: CHAP state */
|
||||
unsigned short disc_cause ; /* 0A: disconnection cause */
|
||||
} ppp_flags_t;
|
||||
|
||||
/* 'iflag' defines */
|
||||
#define PPP_INTR_RXRDY 0x01 /* Rx ready */
|
||||
#define PPP_INTR_TXRDY 0x02 /* Tx ready */
|
||||
#define PPP_INTR_MODEM 0x04 /* modem status change (DCD, CTS) */
|
||||
#define PPP_INTR_CMD 0x08 /* interface command completed */
|
||||
#define PPP_INTR_DISC 0x10 /* data link disconnected */
|
||||
#define PPP_INTR_OPEN 0x20 /* data link open */
|
||||
#define PPP_INTR_DROP_DTR 0x40 /* DTR drop timeout expired */
|
||||
#define PPP_INTR_TIMER 0x80 /* timer interrupt */
|
||||
|
||||
|
||||
/* 'mstatus' defines */
|
||||
#define PPP_MDM_DCD 0x08 /* mdm_status: DCD */
|
||||
#define PPP_MDM_CTS 0x20 /* mdm_status: CTS */
|
||||
|
||||
/* 'disc_cause' defines */
|
||||
#define PPP_LOCAL_TERMINATION 0x0001 /* Local Request by PPP termination phase */
|
||||
#define PPP_DCD_CTS_DROP 0x0002 /* DCD and/or CTS dropped. Link down */
|
||||
#define PPP_REMOTE_TERMINATION 0x0800 /* Remote Request by PPP termination phase */
|
||||
|
||||
/* 'misc_config_bits' defines */
|
||||
#define DONT_RE_TX_ABORTED_I_FRAMES 0x01
|
||||
#define TX_FRM_BYTE_COUNT_STATS 0x02
|
||||
#define RX_FRM_BYTE_COUNT_STATS 0x04
|
||||
#define TIME_STAMP_IN_RX_FRAMES 0x08
|
||||
#define NON_STD_ADPTR_FREQ 0x10
|
||||
#define INTERFACE_LEVEL_RS232 0x20
|
||||
#define AUTO_LINK_RECOVERY 0x100
|
||||
#define DONT_TERMINATE_LNK_MAX_CONFIG 0x200
|
||||
|
||||
/* 'authentication options' defines */
|
||||
#define NO_AUTHENTICATION 0x00
|
||||
#define INBOUND_AUTH 0x80
|
||||
#define PAP_AUTH 0x01
|
||||
#define CHAP_AUTH 0x02
|
||||
|
||||
/* 'ip options' defines */
|
||||
#define L_AND_R_IP_NO_ASSIG 0x00
|
||||
#define L_IP_LOCAL_ASSIG 0x01
|
||||
#define L_IP_REMOTE_ASSIG 0x02
|
||||
#define R_IP_LOCAL_ASSIG 0x04
|
||||
#define R_IP_REMOTE_ASSIG 0x08
|
||||
#define ENABLE_IP 0x80
|
||||
|
||||
/* 'ipx options' defines */
|
||||
#define ROUTING_PROT_DEFAULT 0x20
|
||||
#define ENABLE_IPX 0x80
|
||||
#define DISABLE_IPX 0x00
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* PPP Buffer Info.
|
||||
* This structure is located at offset PPP508_BUF_OFFS into
|
||||
* PPP508_MB_VECT.
|
||||
*/
|
||||
typedef struct ppp508_buf_info
|
||||
{
|
||||
unsigned short txb_num ; /* 00: number of transmit buffers */
|
||||
unsigned int txb_ptr ; /* 02: pointer to the buffer ctl. */
|
||||
unsigned int txb_nxt ;
|
||||
unsigned char rsrv1[22] ;
|
||||
unsigned short rxb_num ; /* 20: number of receive buffers */
|
||||
unsigned int rxb_ptr ; /* 22: pointer to the buffer ctl. */
|
||||
unsigned int rxb1_ptr ; /* 26: pointer to the first buf.ctl. */
|
||||
unsigned int rxb_base ; /* 2A: pointer to the buffer base */
|
||||
unsigned char rsrv2[2] ;
|
||||
unsigned int rxb_end ; /* 30: pointer to the buffer end */
|
||||
} ppp508_buf_info_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Transmit/Receive Buffer Control Block.
|
||||
*/
|
||||
typedef struct ppp_buf_ctl
|
||||
{
|
||||
unsigned char flag ; /* 00: 'buffer ready' flag */
|
||||
unsigned short length ; /* 01: length of data */
|
||||
unsigned char reserved1[1] ; /* 03: */
|
||||
unsigned char proto ; /* 04: protocol */
|
||||
unsigned short timestamp ; /* 05: time stamp (Rx only) */
|
||||
unsigned char reserved2[5] ; /* 07: */
|
||||
union
|
||||
{
|
||||
unsigned short o_p[2]; /* 1C: buffer offset & page (S502) */
|
||||
unsigned int ptr; /* 1C: buffer pointer (S508) */
|
||||
} buf ;
|
||||
} ppp_buf_ctl_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* S508 Adapter Configuration Block (passed to the PPP_SET_CONFIG command).
|
||||
*/
|
||||
typedef struct ppp508_conf
|
||||
{
|
||||
unsigned int line_speed ; /* 00: baud rate, bps */
|
||||
unsigned short txbuf_percent ; /* 04: % of Tx buffer */
|
||||
unsigned short conf_flags ; /* 06: configuration bits */
|
||||
unsigned short mtu_local ; /* 08: local MTU */
|
||||
unsigned short mtu_remote ; /* 0A: remote MTU */
|
||||
unsigned short restart_tmr ; /* 0C: restart timer */
|
||||
unsigned short auth_rsrt_tmr ; /* 0E: authentication timer */
|
||||
unsigned short auth_wait_tmr ; /* 10: authentication timer */
|
||||
unsigned short mdm_fail_tmr ; /* 12: modem failure timer */
|
||||
unsigned short dtr_drop_tmr ; /* 14: DTR drop timer */
|
||||
unsigned short connect_tmout ; /* 16: connection timeout */
|
||||
unsigned short conf_retry ; /* 18: max. retry */
|
||||
unsigned short term_retry ; /* 1A: max. retry */
|
||||
unsigned short fail_retry ; /* 1C: max. retry */
|
||||
unsigned short auth_retry ; /* 1E: max. retry */
|
||||
unsigned char auth_options ; /* 20: authentication opt. */
|
||||
unsigned char ip_options ; /* 21: IP options */
|
||||
unsigned int ip_local ; /* 22: local IP address */
|
||||
unsigned int ip_remote ; /* 26: remote IP address */
|
||||
unsigned char ipx_options ; /* 2A: IPX options */
|
||||
unsigned char ipx_netno[4] ; /* 2B: IPX net number */
|
||||
unsigned char ipx_local[6] ; /* 2F: local IPX node number*/
|
||||
unsigned char ipx_remote[6] ; /* 35: remote IPX node num.*/
|
||||
unsigned char ipx_router[48] ; /* 3B: IPX router name*/
|
||||
unsigned int alt_cpu_clock ; /* 6B: */
|
||||
} ppp508_conf_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* S508 Adapter Read Connection Information Block
|
||||
* Returned by the PPP_GET_CONNECTION_INFO command
|
||||
*/
|
||||
typedef struct ppp508_connect_info
|
||||
{
|
||||
unsigned short mru ; /* 00-01 Remote Max Rec' Unit */
|
||||
unsigned char ip_options ; /* 02: Negotiated ip options */
|
||||
unsigned int ip_local ; /* 03-06: local IP address */
|
||||
unsigned int ip_remote ; /* 07-0A: remote IP address */
|
||||
unsigned char ipx_options ; /* 0B: Negotiated ipx options */
|
||||
unsigned char ipx_netno[4] ; /* 0C-0F: IPX net number */
|
||||
unsigned char ipx_local[6] ; /* 10-1F: local IPX node # */
|
||||
unsigned char ipx_remote[6] ; /* 16-1B: remote IPX node # */
|
||||
unsigned char ipx_router[48] ; /* 1C-4B: IPX router name */
|
||||
unsigned char auth_status ; /* 4C: Authentication Status */
|
||||
unsigned char inbd_auth_peerID[1] ; /* 4D: variable length inbound authenticated peer ID */
|
||||
} ppp508_connect_info_t;
|
||||
|
||||
/* 'line_speed' field */
|
||||
#define PPP_BITRATE_1200 0x01
|
||||
#define PPP_BITRATE_2400 0x02
|
||||
#define PPP_BITRATE_4800 0x03
|
||||
#define PPP_BITRATE_9600 0x04
|
||||
#define PPP_BITRATE_19200 0x05
|
||||
#define PPP_BITRATE_38400 0x06
|
||||
#define PPP_BITRATE_45000 0x07
|
||||
#define PPP_BITRATE_56000 0x08
|
||||
#define PPP_BITRATE_64000 0x09
|
||||
#define PPP_BITRATE_74000 0x0A
|
||||
#define PPP_BITRATE_112000 0x0B
|
||||
#define PPP_BITRATE_128000 0x0C
|
||||
#define PPP_BITRATE_156000 0x0D
|
||||
|
||||
/* Defines for the 'conf_flags' field */
|
||||
#define PPP_IGNORE_TX_ABORT 0x01 /* don't re-transmit aborted frames */
|
||||
#define PPP_ENABLE_TX_STATS 0x02 /* enable Tx statistics */
|
||||
#define PPP_ENABLE_RX_STATS 0x04 /* enable Rx statistics */
|
||||
#define PPP_ENABLE_TIMESTAMP 0x08 /* enable timestamp */
|
||||
|
||||
/* 'ip_options' defines */
|
||||
#define PPP_LOCAL_IP_LOCAL 0x01
|
||||
#define PPP_LOCAL_IP_REMOTE 0x02
|
||||
#define PPP_REMOTE_IP_LOCAL 0x04
|
||||
#define PPP_REMOTE_IP_REMOTE 0x08
|
||||
|
||||
/* 'ipx_options' defines */
|
||||
#define PPP_REMOTE_IPX_NETNO 0x01
|
||||
#define PPP_REMOTE_IPX_LOCAL 0x02
|
||||
#define PPP_REMOTE_IPX_REMOTE 0x04
|
||||
#define PPP_IPX_ROUTE_RIP_SAP 0x08
|
||||
#define PPP_IPX_ROUTE_NLSP 0x10
|
||||
#define PPP_IPX_ROUTE_DEFAULT 0x20
|
||||
#define PPP_IPX_CONF_COMPLETE 0x40
|
||||
#define PPP_IPX_ENABLE 0x80
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* S508 Adapter Configuration Block (returned by the PPP_READ_CONFIG command).
|
||||
*/
|
||||
typedef struct ppp508_get_conf
|
||||
{
|
||||
unsigned int bps ; /* 00: baud rate, bps */
|
||||
ppp508_conf_t conf ; /* 04: requested config. */
|
||||
unsigned short txb_num ; /* 6F: number of Tx buffers */
|
||||
unsigned short rxb_num ; /* 71: number of Rx buffers */
|
||||
} ppp508_get_conf_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* S508 Operational Statistics (returned by the PPP_READ_STATISTIC command).
|
||||
*/
|
||||
typedef struct ppp508_stats
|
||||
{
|
||||
unsigned short reserved1 ; /* 00: */
|
||||
unsigned short rx_bad_len ; /* 02: */
|
||||
unsigned short reserved2 ; /* 04: */
|
||||
unsigned int tx_frames ; /* 06: */
|
||||
unsigned int tx_bytes ; /* 0A: */
|
||||
unsigned int rx_frames ; /* 0E: */
|
||||
unsigned int rx_bytes ; /* 12: */
|
||||
} ppp508_stats_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Adapter Error Statistics (returned by the PPP_READ_ERROR_STATS command).
|
||||
*/
|
||||
typedef struct ppp_err_stats
|
||||
{
|
||||
unsigned char rx_overrun ; /* 00: Rx overrun errors */
|
||||
unsigned char rx_bad_crc ; /* 01: Rx CRC errors */
|
||||
unsigned char rx_abort ; /* 02: Rx aborted frames */
|
||||
unsigned char rx_lost ; /* 03: Rx frames lost */
|
||||
unsigned char tx_abort ; /* 04: Tx aborted frames */
|
||||
unsigned char tx_underrun ; /* 05: Tx underrun errors */
|
||||
unsigned char tx_missed_intr ; /* 06: Tx underruns missed */
|
||||
unsigned char reserved ; /* 07: Tx underruns missed */
|
||||
unsigned char dcd_trans ; /* 08: DCD transitions */
|
||||
unsigned char cts_trans ; /* 09: CTS transitions */
|
||||
} ppp_err_stats_t;
|
||||
|
||||
/* Data structure for SET_TRIGGER_INTR command
|
||||
*/
|
||||
|
||||
typedef struct ppp_intr_info{
|
||||
unsigned char i_enable ; /* 0 Interrupt enable bits */
|
||||
unsigned char irq ; /* 1 Irq number */
|
||||
unsigned short timer_len ; /* 2 Timer delay */
|
||||
} ppp_intr_info_t;
|
||||
|
||||
|
||||
#define FT1_MONITOR_STATUS_CTRL 0x80
|
||||
//#define SET_FT1_MODE 0x81
|
||||
|
||||
|
||||
|
||||
/* Special UDP drivers management commands */
|
||||
#define PPIPE_ENABLE_TRACING WANPIPEMON_ENABLE_TRACING
|
||||
#define PPIPE_DISABLE_TRACING WANPIPEMON_DISABLE_TRACING
|
||||
#define PPIPE_GET_TRACE_INFO WANPIPEMON_GET_TRACE_INFO
|
||||
#define PPIPE_GET_IBA_DATA WANPIPEMON_GET_IBA_DATA
|
||||
|
||||
#define PPIPE_FT1_READ_STATUS WANPIPEMON_FT1_READ_STATUS
|
||||
#define PPIPE_DRIVER_STAT_IFSEND WANPIPEMON_DRIVER_STAT_IFSEND
|
||||
#define PPIPE_DRIVER_STAT_INTR WANPIPEMON_DRIVER_STAT_INTR
|
||||
#define PPIPE_DRIVER_STAT_GEN WANPIPEMON_DRIVER_STAT_GEN
|
||||
#define PPIPE_FLUSH_DRIVER_STATS WANPIPEMON_FLUSH_DRIVER_STATS
|
||||
#define PPIPE_ROUTER_UP_TIME WANPIPEMON_ROUTER_UP_TIME
|
||||
#define PPIPE_TE1_56K_STAT 0x40 /* TE1_56K */
|
||||
#define PPIPE_GET_MEDIA_TYPE 0x41 /* TE1_56K */
|
||||
#define PPIPE_FLUSH_TE1_PMON 0x42 /* TE1 */
|
||||
#define PPIPE_READ_REGISTER 0x43 /* TE1_56K */
|
||||
#define PPIPE_TE1_CFG 0x44 /* TE1 */
|
||||
|
||||
//#define DISABLE_TRACING 0x00
|
||||
#define TRACE_SIGNALLING_FRAMES 0x01
|
||||
#define TRACE_DATA_FRAMES 0x02
|
||||
|
||||
#ifdef UDPMGMT_SIGNATURE
|
||||
#undef UDPMGMT_SIGNATURE
|
||||
#define UDPMGMT_SIGNATURE "PTPIPEAB"
|
||||
#endif
|
||||
|
||||
#define UDPDRV_SIGNATURE "DRVSTATS"
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* _SDLA_PPP_H */
|
|
@ -0,0 +1,496 @@
|
|||
/*******************************************************************************
|
||||
** sdla_remora.h
|
||||
**
|
||||
** Author: Alex Feldman <al.feldman@sangoma.com>
|
||||
**
|
||||
** Copyright: (c) 2005 Sangoma Technologies Inc.
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or
|
||||
** modify it under the terms of the GNU General Public License
|
||||
** as published by the Free Software Foundation; either version
|
||||
** 2 of the License, or (at your option) any later version.
|
||||
** ============================================================================
|
||||
** Oct 6, 2005 Alex Feldman Initial version.
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef __SDLA_REMORA_H
|
||||
# define __SDLA_REMORA_H
|
||||
|
||||
#ifdef __SDLA_REMORA_SRC
|
||||
# define WP_EXTERN
|
||||
#else
|
||||
# define WP_EXTERN extern
|
||||
#endif
|
||||
|
||||
# include "aft_core_options.h"
|
||||
# include "sdla_a600_remora.h"
|
||||
# include "sdla_b800_remora.h"
|
||||
# include "sdla_remora_proslic.h"
|
||||
# include "wanpipe_events.h"
|
||||
|
||||
|
||||
#define DBG_FALSE_RING1 0
|
||||
#define DBG_FALSE_RING2 0
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
# define DEBUG_FALSE_RING if(0)DbgPrint
|
||||
#else
|
||||
# define DEBUG_FALSE_RING if(0)DEBUG_EVENT
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
** DEFINES and MACROS
|
||||
*******************************************************************************/
|
||||
|
||||
#define IS_FXOFXS_CARD(card) IS_FXOFXS_FEMEDIA(&(card)->fe)
|
||||
|
||||
#define IS_A200(fe) (((sdla_t*)(fe->card))->adptr_type == A200_ADPTR_ANALOG ||\
|
||||
((sdla_t*)(fe->card))->adptr_type == A400_ADPTR_ANALOG)
|
||||
|
||||
#define IS_A200_CARD(card) (card->adptr_type == A200_ADPTR_ANALOG || \
|
||||
card->adptr_type == A400_ADPTR_ANALOG)
|
||||
|
||||
#define IS_A700(fe) (((sdla_t*)(fe->card))->adptr_type == AFT_ADPTR_FLEXBRI)
|
||||
#define IS_A700_CARD(card) (card->adptr_type == AFT_ADPTR_FLEXBRI)
|
||||
|
||||
#define WAN_RM_START_CHANNEL 1
|
||||
|
||||
#define MAX_REMORA_MODULES 24
|
||||
#define MAX_FXOFXS_CHANNELS MAX_REMORA_MODULES
|
||||
#define NUM_A700_ANALOG_PORTS 2
|
||||
|
||||
#define MOD_TYPE_NONE 0
|
||||
#define MOD_TYPE_FXS 1
|
||||
#define MOD_TYPE_FXO 2
|
||||
#define MOD_TYPE_TEST 3
|
||||
#define MOD_TYPE_EMPTY 4
|
||||
#define WP_REMORA_DECODE_TYPE(type) \
|
||||
(type == MOD_TYPE_FXS) ? "FXS" : \
|
||||
(type == MOD_TYPE_FXO) ? "FXO" : \
|
||||
(type == MOD_TYPE_TEST) ? "TST" : \
|
||||
(type == MOD_TYPE_TEST) ? "EMPTY" : \
|
||||
"Unknown"
|
||||
|
||||
/* SPI interface */
|
||||
#define MOD_CHAIN_DISABLED 0
|
||||
#define MOD_CHAIN_ENABLED 1
|
||||
|
||||
#define A700_ANALOG_SPI_INTERFACE_REG 0x5C
|
||||
#define A700_ANALOG_SPI_CS_FXS_CHIP_0 0XFD
|
||||
#define A700_ANALOG_SPI_CS_FXS_CHIP_1 0XFE
|
||||
#define A700_ANALOG_SPI_MOD_START_BIT (1<<31)
|
||||
|
||||
#define SPI_INTERFACE_REG 0x54
|
||||
|
||||
#define MOD_SPI_ADDR_FXS_READ 0x80
|
||||
#define MOD_SPI_ADDR_FXS_WRITE 0x00
|
||||
|
||||
#define MOD_SPI_CS_FXS_CHIP_0 0x01
|
||||
#define MOD_SPI_CS_FXS_CHIP_1 0x02
|
||||
|
||||
#define MOD_SPI_CS_FXO_CHIP_1 0x08
|
||||
#define MOD_SPI_CS_FXO_WRITE 0x00
|
||||
#define MOD_SPI_CS_FXO_READ 0x40
|
||||
|
||||
#define MOD_SPI_CTRL_V3_START 0x08 /* bit 27 used as START in version 1-2-3 */
|
||||
#define MOD_SPI_CTRL_START 0x80
|
||||
#define MOD_SPI_CTRL_FXS 0x10
|
||||
#define MOD_SPI_CTRL_CHAIN 0x20
|
||||
|
||||
#define MOD_SPI_RESET 0x40000000
|
||||
#define MOD_SPI_BUSY 0x80000000
|
||||
#define MOD_SPI_V3_STAT 0x08000000 /* bit 27 used as START in version 1-2-3 */
|
||||
#define MOD_SPI_START 0x08000000
|
||||
|
||||
#define WAN_FXS_NUM_REGS 109
|
||||
#define WAN_FXS_NUM_INDIRECT_REGS 105
|
||||
|
||||
#define WAN_FXO_NUM_REGS 59
|
||||
|
||||
#define WAN_REMORA_READREG 0x01;
|
||||
|
||||
#define RM_FE_MAGIC 0x150D
|
||||
|
||||
#define WAN_RM_OPERMODE_LEN 20
|
||||
|
||||
/* Front-End UDP command */
|
||||
#define WAN_FE_TONES (WAN_FE_UDP_CMD_START + 0)
|
||||
#define WAN_FE_RING (WAN_FE_UDP_CMD_START + 1)
|
||||
#define WAN_FE_REGDUMP (WAN_FE_UDP_CMD_START + 2)
|
||||
#define WAN_FE_STATS (WAN_FE_UDP_CMD_START + 3)
|
||||
|
||||
#define WAN_RM_SET_ECHOTUNE _IOW (ZT_CODE, 63, struct wan_rm_echo_coefs)
|
||||
|
||||
/* RM interrupt types */
|
||||
#define WAN_RM_INTR_NONE 0x00
|
||||
#define WAN_RM_INTR_GLOBAL 0x01
|
||||
|
||||
/* Signalling types */
|
||||
#define __WAN_RM_SIG_FXO (1 << 12) /* Never use directly */
|
||||
#define __WAN_RM_SIG_FXS (1 << 13) /* Never use directly */
|
||||
|
||||
#define WAN_RM_SIG_NONE (0) /* Channel not configured */
|
||||
#define WAN_RM_SIG_FXSLS ((1 << 0) | __WAN_RM_SIG_FXS) /* FXS, Loopstart */
|
||||
#define WAN_RM_SIG_FXSGS ((1 << 1) | __WAN_RM_SIG_FXS) /* FXS, Groundstart */
|
||||
#define WAN_RM_SIG_FXSKS ((1 << 2) | __WAN_RM_SIG_FXS) /* FXS, Kewlstart */
|
||||
|
||||
#define WAN_RM_SIG_FXOLS ((1 << 3) | __WAN_RM_SIG_FXO) /* FXO, Loopstart */
|
||||
#define WAN_RM_SIG_FXOGS ((1 << 4) | __WAN_RM_SIG_FXO) /* FXO, Groupstart */
|
||||
#define WAN_RM_SIG_FXOKS ((1 << 5) | __WAN_RM_SIG_FXO) /* FXO, Kewlstart */
|
||||
|
||||
#define WAN_RM_SIG_EM (1 << 6) /* Ear & Mouth (E&M) */
|
||||
|
||||
#define MIN_OFFHOOK_THRESHOLD 5
|
||||
#define MAX_OFFHOOK_THRESHOLD 20
|
||||
|
||||
/*Analog FXO Operation mode */
|
||||
|
||||
#define WAN_RM_DEFAULT 0x00
|
||||
#define WAN_RM_TAPPING 0x01
|
||||
|
||||
/*******************************************************************************
|
||||
** TYPEDEF STRUCTURE
|
||||
*******************************************************************************/
|
||||
typedef struct sdla_remora_cfg_ {
|
||||
|
||||
int opermode;
|
||||
char opermode_name[WAN_RM_OPERMODE_LEN];
|
||||
/* int tdmv_law;*/ /* WAN_TDMV_ALAW or WAN_TDMV_MULAW */
|
||||
int reversepolarity;
|
||||
int battthresh;
|
||||
int ohthresh;
|
||||
int battdebounce;
|
||||
|
||||
u_int8_t relaxcfg; /* DEPRECATED: do not failed during config if one of
|
||||
** the modules failed to configure */
|
||||
|
||||
int fxs_rxgain;
|
||||
int fxs_txgain;
|
||||
u_int8_t fxs_fastringer;
|
||||
u_int8_t fxs_lowpower;
|
||||
u_int8_t fxs_pulsedialing;
|
||||
|
||||
int fxo_rxgain;
|
||||
int fxo_txgain;
|
||||
|
||||
int fxs_ringampl;
|
||||
u_int8_t rm_mode; /*Analog Operation mode: default or tapping */
|
||||
u_int8_t fake_polarity; /*FAKE Polarity event generation : YES or NO*/
|
||||
int fake_polarity_thres; /*Threshold value(only for Analoge cards,units defined in L16 sample value)
|
||||
to decide generation of FAKE Polarity event*/
|
||||
u_int32_t fake_polarity_cid_timer;
|
||||
u_int32_t fake_polarity_cid_timeout;
|
||||
u_int8_t rm_lcm; /*Analog Loop Current Measure (LCM) : Yes Or NO */
|
||||
int ringdebounce;
|
||||
u_int8_t fail_on_mod_error; /* Replaces relaxcfg. Default behaviour is to continue driver load */
|
||||
} sdla_remora_cfg_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned char direct[WAN_FXS_NUM_REGS];
|
||||
unsigned short indirect[WAN_FXS_NUM_INDIRECT_REGS];
|
||||
} wan_remora_fxs_regs_t;
|
||||
|
||||
typedef struct {
|
||||
unsigned char direct[WAN_FXO_NUM_REGS];
|
||||
} wan_remora_fxo_regs_t;
|
||||
|
||||
typedef struct {
|
||||
int tip_volt; /* TIP voltage (mV) (FXS) */
|
||||
int ring_volt; /* RING voltage (mV) (FXS) */
|
||||
int bat_volt; /* VBAT voltage (mV) (FXS) */
|
||||
int volt; /* Line voltage status (FXO) */
|
||||
/*u_int8_t hook; */ /* On/Off hook state */
|
||||
unsigned char status; /* Line connected/disconnecd */
|
||||
} wan_remora_stats_t;
|
||||
|
||||
typedef struct {
|
||||
int mod_no;
|
||||
int type;
|
||||
|
||||
union {
|
||||
wan_remora_fxs_regs_t regs_fxs;
|
||||
wan_remora_fxo_regs_t regs_fxo;
|
||||
wan_remora_stats_t stats;
|
||||
} u;
|
||||
} wan_remora_udp_t;
|
||||
|
||||
struct wan_rm_echo_coefs {
|
||||
unsigned char acim;
|
||||
unsigned char coef1;
|
||||
unsigned char coef2;
|
||||
unsigned char coef3;
|
||||
unsigned char coef4;
|
||||
unsigned char coef5;
|
||||
unsigned char coef6;
|
||||
unsigned char coef7;
|
||||
unsigned char coef8;
|
||||
};
|
||||
|
||||
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
#define NUM_CAL_REGS 12
|
||||
|
||||
#if !defined(WAN_DEBUG_FE)
|
||||
# define WRITE_RM_FXS_REG(mod_no,chain,reg,val) \
|
||||
fe->write_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)MOD_TYPE_FXS, \
|
||||
(int)chain, \
|
||||
(int)reg, \
|
||||
(int)val)
|
||||
# define READ_RM_FXS_REG(mod_no,chain,reg) \
|
||||
fe->read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)MOD_TYPE_FXS, \
|
||||
(int)chain, \
|
||||
(int)reg)
|
||||
# define WRITE_RM_FXO_REG(mod_no,chain,reg,val) \
|
||||
fe->write_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)MOD_TYPE_FXO, \
|
||||
(int)chain, \
|
||||
(int)reg, \
|
||||
(int)val)
|
||||
# define READ_RM_FXO_REG(mod_no,chain,reg) \
|
||||
fe->read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)MOD_TYPE_FXO, \
|
||||
(int)chain, \
|
||||
(int)reg)
|
||||
# define WRITE_RM_REG(mod_no,reg,val) \
|
||||
fe->write_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)fe->rm_param.mod[mod_no].type, \
|
||||
(int)fe->rm_param.mod[mod_no].chain, \
|
||||
(int)reg, (int)val)
|
||||
# define READ_RM_REG(mod_no,reg) \
|
||||
fe->read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)fe->rm_param.mod[mod_no].type, \
|
||||
(int)fe->rm_param.mod[mod_no].chain, \
|
||||
(int)reg)
|
||||
#else
|
||||
# define WRITE_RM_FXS_REG(mod_no,chain,reg,val) \
|
||||
fe->write_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)MOD_TYPE_FXS, \
|
||||
(int)chain, \
|
||||
(int)reg, (int)val, \
|
||||
__FILE__,(int)__LINE__)
|
||||
# define READ_RM_FXS_REG(mod_no,chain,reg) \
|
||||
fe->read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)MOD_TYPE_FXS, \
|
||||
(int)chain, \
|
||||
(int)reg, \
|
||||
__FILE__,__LINE__)
|
||||
# define WRITE_RM_FXO_REG(mod_no,chain,reg,val) \
|
||||
fe->write_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)MOD_TYPE_FXO, \
|
||||
(int)chain, \
|
||||
(int)reg,(int)val, \
|
||||
__FILE__,(int)__LINE__)
|
||||
# define READ_RM_FXO_REG(mod_no,chain,reg) \
|
||||
fe->read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)MOD_TYPE_FXO, \
|
||||
(int)chain, \
|
||||
(int)reg, \
|
||||
__FILE__,(int)__LINE__)
|
||||
# define WRITE_RM_REG(mod_no,reg,val) \
|
||||
fe->write_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)fe->rm_param.mod[mod_no].type, \
|
||||
(int)fe->rm_param.mod[mod_no].chain, \
|
||||
(int)reg, (int)val,__FILE__,(int)__LINE__)
|
||||
# define READ_RM_REG(mod_no,reg) \
|
||||
fe->read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)fe->rm_param.mod[mod_no].type, \
|
||||
(int)fe->rm_param.mod[mod_no].chain, \
|
||||
(int)reg,__FILE__,(int)__LINE__)
|
||||
#endif
|
||||
#define __READ_RM_REG(mod_no,reg) \
|
||||
fe->__read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)fe->rm_param.mod[mod_no].type, \
|
||||
(int)fe->rm_param.mod[mod_no].chain, \
|
||||
(int)reg)
|
||||
|
||||
|
||||
enum proslic_power_warn {
|
||||
PROSLIC_POWER_UNKNOWN = 0,
|
||||
PROSLIC_POWER_ON,
|
||||
PROSLIC_POWER_WARNED,
|
||||
};
|
||||
|
||||
/* Sangoma A200 event bit map */
|
||||
#define WAN_RM_EVENT_DTMF 1 /* DTMF event */
|
||||
#define WAN_RM_EVENT_LC 2 /* Loop closure event */
|
||||
#define WAN_RM_EVENT_RING_TRIP 3 /* Ring trip event */
|
||||
#define WAN_RM_EVENT_POWER 4 /* Power event */
|
||||
#define WAN_RM_EVENT_RING 5 /* Ring event */
|
||||
#define WAN_RM_EVENT_TONE 6 /* Play tone */
|
||||
#define WAN_RM_EVENT_RING_DETECT 7 /* Ring detect event */
|
||||
|
||||
typedef struct {
|
||||
unsigned char vals[NUM_CAL_REGS];
|
||||
} callregs_t;
|
||||
|
||||
typedef struct {
|
||||
int ready;
|
||||
|
||||
u8 status; /* line status (connected/disconnected) */
|
||||
int statusdebounce; /* line status debounce */
|
||||
|
||||
int ring_detect;
|
||||
|
||||
int offhook; /* Xswitch */
|
||||
int battery; /* Xswitch */
|
||||
int battdebounce; /* Xswitch */
|
||||
int i_debounce;
|
||||
int ringdebounce;
|
||||
int wasringing;
|
||||
int nobatttimer;
|
||||
int lastpol;
|
||||
int polarity;
|
||||
int polaritydebounce;
|
||||
|
||||
/* Variables required for tapper mode */
|
||||
int ohdebounce;
|
||||
int going_offhook; /* current ohdebounce is for off-hk or on-hk */
|
||||
|
||||
unsigned char imask; /* interrupt mask */
|
||||
|
||||
int readcid;
|
||||
int ring_skip;
|
||||
unsigned int cidtimer;
|
||||
|
||||
/*Additional for Zaptel mode*/
|
||||
#if defined(CONFIG_PRODUCT_WANPIPE_TDM_VOICE)
|
||||
int echotune; /* echo tune */
|
||||
struct wan_rm_echo_coefs echoregs; /* echo tune */
|
||||
#endif
|
||||
} wp_remora_fxo_t;
|
||||
|
||||
typedef struct {
|
||||
int ready;
|
||||
int idletxhookstate;
|
||||
enum proslic_power_warn proslic_power;
|
||||
callregs_t callregs;
|
||||
unsigned char imask1; /* interrupt mask 1 */
|
||||
unsigned char imask2;
|
||||
unsigned char imask3;
|
||||
|
||||
int oldrxhook; /* Xswitch */
|
||||
int lasttxhook; /* Xswitch */
|
||||
int lastrxhook;
|
||||
int ohttimer; /* Xswitch */
|
||||
int palarms; /* Xswitch */
|
||||
int debounce;
|
||||
int debouncehook;
|
||||
|
||||
/*Additional for Zaptel mode */
|
||||
int lasttxhook_update;
|
||||
/*Flash/hook timer */
|
||||
|
||||
int itimer;
|
||||
int rxflashtime;
|
||||
|
||||
} wp_remora_fxs_t;
|
||||
|
||||
typedef struct {
|
||||
int type;
|
||||
int chain;
|
||||
unsigned long events;
|
||||
unsigned long lastcmd;
|
||||
|
||||
#if 0
|
||||
#if defined(__WINDOWS__)
|
||||
wan_event_ctrl_t current_control_event;
|
||||
wan_event_ctrl_t *current_control_event_ptr;
|
||||
#else
|
||||
WAN_LIST_HEAD(, wan_event_ctrl_) event_head;
|
||||
#endif
|
||||
#endif
|
||||
/* TDM Voice applications */
|
||||
int sig;
|
||||
/* Special fxs/fxo settings */
|
||||
union {
|
||||
wp_remora_fxo_t fxo;
|
||||
wp_remora_fxs_t fxs;
|
||||
} u;
|
||||
|
||||
} wp_remora_module_t;
|
||||
|
||||
typedef struct {
|
||||
// u_int16_t type;
|
||||
unsigned int mod_no; /* A200-Remora */
|
||||
unsigned char ec_dtmf_port; /* EC DTMF: SOUT or ROUT */
|
||||
unsigned long ts_map;
|
||||
u_int8_t tone;
|
||||
int ohttimer; /* On-hook transfer */
|
||||
int polarity; /* SETPOLARITY */
|
||||
unsigned short reg; /* fe register */
|
||||
unsigned char value; /* fe register value */
|
||||
int rm_gain; /* Tx/Rx Gain */
|
||||
} sdla_rm_event_t;
|
||||
|
||||
typedef struct sdla_remora_param {
|
||||
int not_used;
|
||||
|
||||
wp_remora_module_t mod[MAX_REMORA_MODULES];
|
||||
|
||||
u32 module_map; /* Map of available module */
|
||||
u16 max_fe_channels;/* Number of available modules */
|
||||
|
||||
u8 critical;
|
||||
// wan_timer_t timer;
|
||||
// u8 timer_cmd;
|
||||
// u16 timer_mod_no;
|
||||
// u16 timer_delay;
|
||||
|
||||
u32 intcount;
|
||||
wan_ticks_t last_watchdog;
|
||||
|
||||
int reg_dbg_busy;
|
||||
int reg_dbg_ready;
|
||||
unsigned char reg_dbg_value;
|
||||
/* use REG_SHADOW in all modes */
|
||||
unsigned char reg0shadow[MAX_REMORA_MODULES]; /* read> fxs: 68 fxo: 5 */
|
||||
unsigned char reg1shadow[MAX_REMORA_MODULES]; /* read> fxs: 64 fxo: 29 */
|
||||
unsigned char reg2shadow[MAX_REMORA_MODULES]; /* read> fxs: 64 fxo: 29 */
|
||||
unsigned char reg3shadow[MAX_REMORA_MODULES]; /* read > fxs : 19 for Ring/Trip Evnet , FXO -used LCS2 (read 28) */
|
||||
unsigned char reg4shadow[MAX_REMORA_MODULES]; /* read > fxs : 20 for DTMF Evnet , FXO no use yet */
|
||||
|
||||
unsigned char reg0shadow_write[MAX_REMORA_MODULES]; /* write> fxs: 68 fxo: 5 */
|
||||
int reg0shadow_update[MAX_REMORA_MODULES];
|
||||
int battdebounce; /* global for FXO */
|
||||
int battthresh; /* global for FXO */
|
||||
int ringdebounce; /* global for FXO */
|
||||
int wp_rm_chunk_size; /* TDM API set as MTU for Zaptel set as ZT_CHUNK_SIZE */
|
||||
|
||||
#if DBG_FALSE_RING1
|
||||
u32 last_system_ticks;
|
||||
u32 last_intcount;
|
||||
u32 ticks_diff;
|
||||
u32 int_diff;
|
||||
#endif
|
||||
|
||||
} sdla_remora_param_t;
|
||||
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
/*******************************************************************************
|
||||
** FUNCTION PROTOTYPES
|
||||
*******************************************************************************/
|
||||
extern int wp_remora_iface_init(void*, void*);
|
||||
extern int wp_a700_remora_iface_init(void*, void*);
|
||||
|
||||
#undef WP_EXTERN
|
||||
#endif /* __SDLA_REMORA_H */
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
/*******************************************************************************
|
||||
** sdla_remora_analog.h
|
||||
**
|
||||
** Author: Jignesh Patel <jpatel@sangoma.com>
|
||||
**
|
||||
** Copyright: (c) 2008 Sangoma Technologies Inc.
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or
|
||||
** modify it under the terms of the GNU General Public License
|
||||
** as published by the Free Software Foundation; either version
|
||||
** 2 of the License, or (at your option) any later version.
|
||||
** ============================================================================
|
||||
** Oct 20, 2008 Initial version.
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#include "wanpipe_defines.h"
|
||||
#include "sdla_tdmv.h"
|
||||
|
||||
/*******************************************************************************
|
||||
** DEFINES and MACROS
|
||||
*******************************************************************************/
|
||||
|
||||
#define OHT_TIMER 6000
|
||||
#define FXO_LINK_DEBOUNCE 200
|
||||
#define POLARITY_DEBOUNCE 16 /* Polarity debounce (64 ms) */
|
||||
#define MAX_ALARMS 10
|
||||
#define FXO_LINK_THRESH 1 /* fxo link threshold */
|
||||
|
||||
|
||||
#define REG_SHADOW
|
||||
#define REG_WRITE_SHADOW
|
||||
#define NEW_PULSE_DIALING
|
||||
#undef PULSE_DIALING
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** FUNCTION PROTOTYPES
|
||||
*******************************************************************************/
|
||||
int wp_tdmv_remora_rx_tx_span_common(void *pcard );
|
||||
int wp_tdmv_remora_proslic_recheck_sanity(sdla_fe_t *fe, int mod_no);
|
||||
void wp_tdmv_remora_voicedaa_recheck_sanity(sdla_fe_t *fe, int mod_no);
|
||||
int wp_tdmv_remora_check_hook(sdla_fe_t *fe, int mod_no);
|
||||
int wp_remora_read_dtmf(sdla_fe_t *fe, int mod_no);
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,196 @@
|
|||
/* ProSlic Header File - sdla_remora_proslic.h */
|
||||
|
||||
#ifndef __SDLA_REMORA_PROSLIC_H__
|
||||
#define __SDLA_REMORA_PROSLIC_H__
|
||||
|
||||
typedef struct {
|
||||
unsigned char address;
|
||||
unsigned char altaddr;
|
||||
char *name;
|
||||
unsigned short initial;
|
||||
} alpha;
|
||||
|
||||
typedef struct {
|
||||
unsigned char chip_number;
|
||||
unsigned char DTMF_digit;
|
||||
unsigned char interrupt_line;
|
||||
unsigned char hook_status;
|
||||
unsigned long half_pulses[20]; /* Contains the time stamps of incomming half pulses. */
|
||||
unsigned char half_pulses_detected; /* Contains the number of half pulses detected. */
|
||||
unsigned char Pulse_digit;
|
||||
unsigned long On_Hook_time;
|
||||
unsigned long Off_Hook_time;
|
||||
} chipStruct;
|
||||
|
||||
/* Defines */
|
||||
#define LPT 0X378
|
||||
|
||||
#define IDA_LO 28
|
||||
#define IDA_HI 29
|
||||
|
||||
#define IAA 30
|
||||
#define ID_ACCES_STATUS 31
|
||||
#define IAS_BIT 1
|
||||
|
||||
#define I_STATUS 31
|
||||
|
||||
#define SPI_MODE 0
|
||||
#define PCM_MODE 1
|
||||
#define PCM_XMIT_START_COUNT_LSB 2
|
||||
#define PCM_XMIT_START_COUNT_MSB 3
|
||||
#define PCM_RCV_START_COUNT_LSB 4
|
||||
#define PCM_RCV_START_COUNT_MSB 5
|
||||
#define DIO 6
|
||||
|
||||
#define AUDIO_LOOPBACK 8
|
||||
#define AUDIO_GAIN 9
|
||||
#define LINE_IMPEDANCE 10
|
||||
#define HYBRID 11
|
||||
#define RESERVED12 12
|
||||
#define RESERVED13 13
|
||||
#define PWR_DOWN1 14
|
||||
#define PWR_DOWN2 15
|
||||
#define RESERVED16 16
|
||||
#define RESERVED17 17
|
||||
#define INTRPT_STATUS1 18
|
||||
#define INTRPT_STATUS2 19
|
||||
#define INTRPT_STATUS3 20
|
||||
#define INTRPT_MASK1 21
|
||||
#define INTRPT_MASK2 22
|
||||
#define INTRPT_MASK3 23
|
||||
#define DTMF_DIGIT 24
|
||||
#define RESERVED25 25
|
||||
#define RESERVED26 26
|
||||
#define RESERVED27 27
|
||||
#define I_DATA_LOW 28
|
||||
#define I_DATA_HIGH 29
|
||||
#define I_ADDRESS 30
|
||||
#define I_STATUS 31
|
||||
#define OSC1 32
|
||||
#define OSC2 33
|
||||
#define RING_OSC_CTL 34
|
||||
#define PULSE_OSC 35
|
||||
#define OSC1_ON__LO 36
|
||||
#define OSC1_ON_HI 37
|
||||
#define OSC1_OFF_LO 38
|
||||
#define OSC1_OFF_HI 39
|
||||
#define OSC2_ON__LO 40
|
||||
#define OSC2_ON_HI 41
|
||||
#define OSC2_OFF_LO 42
|
||||
#define OSC2_OFF_HI 43
|
||||
#define PULSE_ON__LO 44
|
||||
#define PULSE_ON_HI 45
|
||||
#define PULSE_OFF_LO 46
|
||||
#define PULSE_OFF_HI 47
|
||||
#define RING_ON__LO 48
|
||||
#define RING_ON_HI 49
|
||||
#define RING_OFF_LO 50
|
||||
#define RING_OFF_HI 51
|
||||
#define RESERVED52 52
|
||||
#define RESERVED53 53
|
||||
#define RESERVED54 54
|
||||
#define RESERVED55 55
|
||||
#define RESERVED56 56
|
||||
#define RESERVED57 57
|
||||
#define RESERVED58 58
|
||||
#define RESERVED59 59
|
||||
#define RESERVED60 60
|
||||
#define RESERVED61 61
|
||||
#define RESERVED62 62
|
||||
#define RESERVED63 63
|
||||
#define LINE_STATE 64
|
||||
#define ACTIVATE_LINE 0x11
|
||||
#define RING_LINE 0x44
|
||||
#define BIAS_SQUELCH 65
|
||||
#define BAT_FEED 66
|
||||
#define AUTO_STATE 67
|
||||
#define LOOP_STAT 68
|
||||
#define LOOP_DEBOUCE 69
|
||||
#define RT_DEBOUCE 70
|
||||
#define LOOP_I_LIMIT 71
|
||||
#define OFF_HOOK_V 72
|
||||
#define COMMON_V 73
|
||||
#define BAT_V_HI 74
|
||||
#define BAT_V_LO 75
|
||||
#define PWR_STAT_DEV 76
|
||||
#define PWR_STAT 77
|
||||
#define LOOP_V_SENSE 78
|
||||
#define LOOP_I_SENSE 79
|
||||
#define TIP_V_SENSE 80
|
||||
#define RING_V_SENSE 81
|
||||
#define BAT_V_HI_SENSE 82
|
||||
#define BAT_V_LO_SENSE 83
|
||||
#define IQ1 84
|
||||
#define IQ2 85
|
||||
#define IQ3 86
|
||||
#define IQ4 87
|
||||
#define IQ5 88
|
||||
#define IQ6 89
|
||||
#define RESERVED90 90
|
||||
#define RESERVED91 91
|
||||
#define DCDC_PWM_OFF 92
|
||||
#define DCDC 93
|
||||
#define DCDC_PW_OFF 94
|
||||
#define RESERVED95 95
|
||||
#define CALIBR1 96
|
||||
#define CALIBRATE_LINE 0x78
|
||||
#define NORMAL_CALIBRATION_COMPLETE 0x20
|
||||
#define CALIBR2 97
|
||||
#define RING_GAIN_CAL 98
|
||||
#define TIP_GAIN_CAL 99
|
||||
#define DIFF_I_CAL 100
|
||||
#define COMMON_I_CAL 101
|
||||
#define I_LIMIT_GAIN_CAL 102
|
||||
#define ADC_OFFSET_CAL 103
|
||||
#define DAC_ADC_OFFSET 104
|
||||
#define DAC_OFFSET_CAL 105
|
||||
#define COMMON_BAL_CAL 106
|
||||
#define DC_PEAK_CAL 107
|
||||
|
||||
/* Indirect Register (decimal) */
|
||||
#define DTMF_ROW_0_PEAK 0
|
||||
#define DTMF_ROW_1_PEAK 1
|
||||
#define DTMF_ROW2_PEAK 2
|
||||
#define DTMF_ROW3_PEAK 3
|
||||
#define DTMF_COL1_PEAK 4
|
||||
#define DTMF_FWD_TWIST 5
|
||||
#define DTMF_RVS_TWIST 6
|
||||
#define DTMF_ROW_RATIO_THRESH 7
|
||||
#define DTMF_COL_RATIO_THRESH 8
|
||||
#define DTMF_ROW_2ND_HARM 9
|
||||
#define DTMF_COL_2ND_HARM 10
|
||||
#define DTMF_PWR_MIN_THRESH 11
|
||||
#define DTMF_HOT_LIM_THRESH 12
|
||||
#define OSC1_COEF 13
|
||||
#define OSC1X 14
|
||||
#define OSC1Y 15
|
||||
#define OSC2_COEF 16
|
||||
#define OSC2X 17
|
||||
#define OSC2Y 18
|
||||
#define RING_V_OFF 19
|
||||
#define RING_OSC_COEF 20
|
||||
#define RING_X 21
|
||||
#define RING_Y 22
|
||||
#define PULSE_ENVEL 23
|
||||
#define PULSE_X 24
|
||||
#define PULSE_Y 25
|
||||
#define RECV_DIGITAL_GAIN 26
|
||||
#define XMIT_DIGITAL_GAIN 27
|
||||
#define LOOP_CLOSE_THRESH 28
|
||||
#define RING_TRIP_THRESH 29
|
||||
#define COMMON_MIN_THRESH 30
|
||||
#define COMMON_MAX_THRESH 31
|
||||
#define PWR_ALARM_Q1Q2 32
|
||||
#define PWR_ALARM_Q3Q4 33
|
||||
#define PWR_ALARM_Q5Q6 34
|
||||
#define LOOP_CLOSURE_FILTER 35
|
||||
#define RING_TRIP_FILTER 36
|
||||
#define THERM_LP_POLE_Q1Q2 37
|
||||
#define THERM_LP_POLE_Q3Q4 38
|
||||
#define THERM_LP_POLE_Q5Q6 39
|
||||
#define CM_BIAS_RINGING 40
|
||||
#define DCDC_MIN_V 41
|
||||
#define DCDC_XTRA 42
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,82 @@
|
|||
/*******************************************************************************
|
||||
** sdla_remora_tdmv.h
|
||||
**
|
||||
** Author: Jignesh Patel <jpatel@sangoma.com>
|
||||
**
|
||||
** Copyright: (c) 2008 Sangoma Technologies Inc.
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or
|
||||
** modify it under the terms of the GNU General Public License
|
||||
** as published by the Free Software Foundation; either version
|
||||
** 2 of the License, or (at your option) any later version.
|
||||
** ============================================================================
|
||||
** Oct 20, 2008 Initial version.
|
||||
*******************************************************************************/
|
||||
#include "wanpipe_defines.h"
|
||||
#include "sdla_tdmv.h"
|
||||
#include "zapcompat.h" /* Map of Zaptel -> DAHDI definitions */
|
||||
|
||||
|
||||
typedef struct wp_tdmv_remora_ {
|
||||
void *card;
|
||||
char *devname;
|
||||
int num;
|
||||
int flags;
|
||||
wan_spinlock_t lockirq;
|
||||
wan_spinlock_t tx_rx_lockirq;
|
||||
union {
|
||||
wp_remora_fxo_t fxo;
|
||||
wp_remora_fxs_t fxs;
|
||||
} mod[MAX_REMORA_MODULES];
|
||||
|
||||
int spanno;
|
||||
#if defined(CONFIG_PRODUCT_WANPIPE_TDM_VOICE)
|
||||
struct zt_span span;
|
||||
#ifdef DAHDI_ISSUES
|
||||
#ifdef DAHDI_22
|
||||
struct dahdi_echocan_state ec[MAX_REMORA_MODULES]; /* echocan state for each channel */
|
||||
#endif
|
||||
struct zt_chan *chans_ptrs[MAX_REMORA_MODULES];
|
||||
|
||||
#ifdef DAHDI_26
|
||||
struct dahdi_device *ddev;
|
||||
struct device dev;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
struct zt_chan chans[MAX_REMORA_MODULES];
|
||||
#endif
|
||||
unsigned long reg_module_map; /* Registered modules */
|
||||
#if 0
|
||||
unsigned char reg0shadow[MAX_REMORA_MODULES]; /* read> fxs: 68 fxo: 5 */
|
||||
unsigned char reg1shadow[MAX_REMORA_MODULES]; /* read> fxs: 64 fxo: 29 */
|
||||
unsigned char reg2shadow[MAX_REMORA_MODULES]; /* read> fxs: 64 fxo: 29 */
|
||||
|
||||
unsigned char reg0shadow_write[MAX_REMORA_MODULES]; /* write> fxs: 68 fxo: 5 */
|
||||
int reg0shadow_update[MAX_REMORA_MODULES];
|
||||
#endif
|
||||
/* Global configuration */
|
||||
|
||||
/* u32 intcount;*/
|
||||
int pollcount;
|
||||
unsigned char ec_chunk1[31][ZT_CHUNKSIZE];
|
||||
unsigned char ec_chunk2[31][ZT_CHUNKSIZE];
|
||||
int usecount;
|
||||
u16 max_timeslots; /* up to MAX_REMORA_MODULES */
|
||||
int max_rxtx_len;
|
||||
int channelized;
|
||||
unsigned char hwec;
|
||||
unsigned long echo_off_map;
|
||||
#if 0
|
||||
int battdebounce; /* global for FXO */
|
||||
int battthresh; /* global for FXO */
|
||||
#endif
|
||||
u_int8_t tonesupport;
|
||||
unsigned int toneactive;
|
||||
unsigned int tonemask;
|
||||
unsigned int tonemutemask;
|
||||
|
||||
unsigned long ec_fax_detect_timeout[MAX_REMORA_MODULES+1];
|
||||
unsigned int ec_off_on_fax;
|
||||
|
||||
} wp_tdmv_remora_t;
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,62 @@
|
|||
/*****************************************************************************
|
||||
* sdla_serial.h Sangoma AFT Base Serial configuration definitions.
|
||||
*
|
||||
* Author: Alex Feldman
|
||||
*
|
||||
* Copyright: (c) 1995-2001 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
|
||||
* ============================================================================
|
||||
* Oct 10, 2007 Alex Feldman Initial version.
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _SDLA_SERIAL_H_
|
||||
#define _SDLA_SERIAL_H_
|
||||
|
||||
/*******************************************************************************
|
||||
DEFINES AND MACROS
|
||||
******************************************************************************/
|
||||
|
||||
#define AFT_SERIAL_OSC 14745600
|
||||
|
||||
#define REG_FLOWCNTRL 0x00
|
||||
|
||||
#define BIT_FLOWCNTRL_RTS 0x00000001
|
||||
#define BIT_FLOWCNTRL_DTR 0x00000002
|
||||
#define BIT_FLOWCNTRL_CTS 0x00000004
|
||||
#define BIT_FLOWCNTRL_DCD 0x00000008
|
||||
|
||||
#define BITS_BAUDRATE(baud,asyn_if) ((( AFT_SERIAL_OSC / (2 * ((async_if) ? 16 :1) * (baud))) - 1 ) << 8)
|
||||
|
||||
#define BIT_INTCTRL_CLK_MASTER 0x01000000 /* Internal clock (from oscillator) */
|
||||
#define BIT_INTCTRL_NRZI 0x10000000 /* NRZI */
|
||||
#define BIT_INTCTRL_FM1 0x20000000 /* FM1 */
|
||||
#define BIT_INTCTRL_FM0 0x30000000 /* FM0 */
|
||||
#define BIT_INTCTRL_MANCHESTER 0x40000000 /* MANCHESTER */
|
||||
#define BIT_INTCTRL_ASYNCH 0x80000000 /* Asynchronous */
|
||||
|
||||
#define MAX_SERIAL_LINES 4
|
||||
/*******************************************************************************
|
||||
FUNCTION PROTOTYPES
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
#define IS_SERIAL_CARD(card) IS_SERIAL_FEMEDIA(&(card)->fe)
|
||||
|
||||
int aft_serial_write_fe(void* phw, ...);
|
||||
#define __aft_serial_write_fe aft_serial_write_fe
|
||||
u32 aft_serial_read_fe(void* phw, ...);
|
||||
#define __aft_serial_read_fe aft_serial_read_fe
|
||||
|
||||
int32_t wp_serial_iface_init(void *pfe_iface);
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#endif /* _SDLA_SERIAL_H_ */
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,127 @@
|
|||
/******************************************************************************
|
||||
* sdla_tdmv.h
|
||||
*
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2001 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __SDLA_TDMV_H
|
||||
# define __SDLA_TDMV_H
|
||||
|
||||
#ifdef __SDLA_TDMV_SRC
|
||||
# define WP_EXTERN
|
||||
#else
|
||||
# define WP_EXTERN extern
|
||||
#endif
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
** DEFINES and MACROS
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
|
||||
# if defined(CONFIG_PRODUCT_WANPIPE_TDM_VOICE_ECHOMASTER)
|
||||
# include "wanpipe_edac_iface.h"
|
||||
# endif
|
||||
|
||||
/******************************************************************************
|
||||
** DEFINES and MACROS
|
||||
******************************************************************************/
|
||||
|
||||
#define WAN_TDMV_IDLE_FLAG 0x7F
|
||||
|
||||
#define WAN_TDMV_CALL(func, args, err) \
|
||||
if (card->tdmv_iface.func){ \
|
||||
err = card->tdmv_iface.func args; \
|
||||
}else{ \
|
||||
DEBUG_EVENT("%s: Internal Error (%s:%d)!\n",\
|
||||
card->devname, \
|
||||
__FUNCTION__,__LINE__); \
|
||||
err = -EINVAL; \
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
** TYPEDEF STRUCTURE
|
||||
******************************************************************************/
|
||||
typedef struct wan_tdmv_
|
||||
{
|
||||
void *sc;
|
||||
int max_tx_len;
|
||||
int max_timeslots;
|
||||
int brt_enable;
|
||||
int sig_intr_enable;
|
||||
int spanno;
|
||||
|
||||
#if defined(CONFIG_PRODUCT_WANPIPE_TDM_VOICE_ECHOMASTER)
|
||||
wan_tdmv_rxtx_pwr_t chan_pwr[31];
|
||||
#endif
|
||||
WAN_LIST_ENTRY(wan_tdmv_) next;
|
||||
} wan_tdmv_t;
|
||||
|
||||
typedef struct wan_tdmv_iface_
|
||||
{
|
||||
int (*check_mtu)(void*, unsigned long, int *);
|
||||
int (*create)(void* pcard, wan_tdmv_conf_t*);
|
||||
int (*remove)(void* pcard);
|
||||
int (*reg)(void*, wan_tdmv_if_conf_t*, unsigned int, unsigned char,netdevice_t*);
|
||||
int (*unreg)(void* pcard, unsigned long ts_map);
|
||||
int (*software_init)(wan_tdmv_t*);
|
||||
int (*state)(void*, int);
|
||||
int (*running)(void*);
|
||||
int (*rx_tx)(void*, netskb_t*);
|
||||
int (*rx_chan)(wan_tdmv_t*, int, unsigned char*, unsigned char*);
|
||||
#if defined(CONFIG_PRODUCT_WANPIPE_TDM_VOICE_DCHAN)
|
||||
int (*rx_dchan)(wan_tdmv_t*, int, unsigned char*, unsigned int);
|
||||
#endif
|
||||
int (*rx_tx_span)(void *pcard);
|
||||
int (*is_rbsbits)(wan_tdmv_t *);
|
||||
int (*rbsbits_poll)(wan_tdmv_t *, void*);
|
||||
int (*init)(void*, wanif_conf_t*);
|
||||
int (*free)(wan_tdmv_t*);
|
||||
int (*polling)(void*);
|
||||
int (*buf_rotate)(void *pcard,u32,unsigned long,int);
|
||||
int (*ec_span)(void *pcard);
|
||||
|
||||
#if defined(CONFIG_PRODUCT_WANPIPE_USB)
|
||||
int (*update_regs)(void*, int, u8*); /* USB-FXO */
|
||||
#endif
|
||||
} wan_tdmv_iface_t;
|
||||
|
||||
/******************************************************************************
|
||||
** FUNCTION PROTOTYPES
|
||||
******************************************************************************/
|
||||
WP_EXTERN int wp_tdmv_te1_init(wan_tdmv_iface_t *iface);
|
||||
WP_EXTERN int wp_tdmv_remora_init(wan_tdmv_iface_t *iface);
|
||||
WP_EXTERN int wp_tdmv_bri_init(wan_tdmv_iface_t *iface);
|
||||
#if defined(CONFIG_PRODUCT_WANPIPE_USB)
|
||||
WP_EXTERN int wp_usb_tdmv_remora_init(wan_tdmv_iface_t *iface);
|
||||
#endif
|
||||
WP_EXTERN int wp_tdmv_gsm_init(wan_tdmv_iface_t *iface);
|
||||
|
||||
#ifdef CONFIG_PRODUCT_WANPIPE_TDM_VOICE_ECHOMASTER
|
||||
WP_EXTERN int wp_tdmv_echo_check(wan_tdmv_t *wan_tdmv, void *current_ztchan, int channo);
|
||||
#endif
|
||||
|
||||
|
||||
WP_EXTERN int wanpipe_codec_convert_2s(u8 *data, int len, netskb_t *nskb,
|
||||
u16 *power_ptr, int is_alaw);
|
||||
|
||||
WP_EXTERN int wanpipe_codec_convert_s2ulaw(netskb_t *skb, netskb_t *nskb, int is_alaw);
|
||||
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#undef WP_EXTERN
|
||||
|
||||
#endif /* __SDLA_VOIP_H */
|
|
@ -0,0 +1,24 @@
|
|||
/*****************************************************************************
|
||||
* sdla_tdmv_dummy.h WANPIPE(tm) Multiprotocol WAN Link Driver.
|
||||
* Dummy Zaptel timer definitions.
|
||||
*
|
||||
* Author: David Yat Sin <david.yatsin@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2008 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Mar 12, 2008 David Yat Sin Initial Version
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef _SDLA_TDMV_DUMMY_H
|
||||
#define _SDLA_TDMV_DUMMY_H
|
||||
|
||||
int sdla_tdmv_dummy_get_zt_chunksize(void);
|
||||
void* sdla_tdmv_dummy_register(void);
|
||||
int sdla_tdmv_dummy_tick(void *wpd_ptr);
|
||||
int sdla_tdmv_dummy_unregister(void *wpd_ptr);
|
||||
#endif
|
|
@ -0,0 +1,863 @@
|
|||
/*
|
||||
* Copyright (c) 2001
|
||||
* Alex Feldman <al.feldman@sangoma.com>. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Alex Feldman.
|
||||
* 4. Neither the name of the author nor the names of any co-contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Alex Feldman AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL Alex Feldman OR THE VOICES IN HIS HEAD
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: sdla_te1.h,v 1.72 2008-04-02 20:52:09 sangoma Exp $
|
||||
*/
|
||||
|
||||
/*****************************************************************************
|
||||
* sdla_te1.h Sangoma TE1 configuration definitions.
|
||||
*
|
||||
* Author: Alex Feldman
|
||||
*
|
||||
* ============================================================================
|
||||
* Aprl 30, 2001 Alex Feldman Initial version.
|
||||
****************************************************************************
|
||||
*/
|
||||
#ifndef _SDLA_TE1_H
|
||||
# define _SDLA_TE1_H
|
||||
|
||||
#ifdef SDLA_TE1
|
||||
# define WP_EXTERN
|
||||
#else
|
||||
# define WP_EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************
|
||||
* DEFINES AND MACROS *
|
||||
***********************************************************************/
|
||||
|
||||
/*
|
||||
*************************************************************************
|
||||
* DEFINES AND MACROS *
|
||||
*************************************************************************
|
||||
*/
|
||||
|
||||
#define WAN_TE_CHIP_PMC 0x00
|
||||
#define WAN_TE_CHIP_DM 0x01
|
||||
|
||||
#define NUM_OF_T1_CHANNELS 24
|
||||
#define NUM_OF_E1_TIMESLOTS 31
|
||||
#define NUM_OF_E1_CHANNELS 32
|
||||
#define ENABLE_ALL_CHANNELS 0xFFFFFFFF
|
||||
|
||||
#define E1_FRAMING_TIMESLOT 0
|
||||
#define E1_SIGNALING_TIMESLOT 16
|
||||
|
||||
#define WAN_TE_SIG_POLL 0x01
|
||||
#define WAN_TE_SIG_INTR 0x02
|
||||
|
||||
/* Framer Alarm bit mask */
|
||||
#define WAN_TE_ALARM_LIU 0x80000000
|
||||
|
||||
#define WAN_TE_ALARM_FRAMER_MASK 0x0000FFFF
|
||||
#define WAN_TE_ALARM_LIU_MASK 0x00F00000
|
||||
#define WAN_TE_BIT_ALARM_ALOS 0x00000001
|
||||
#define WAN_TE_BIT_ALARM_LOS 0x00000002
|
||||
#define WAN_TE_BIT_ALARM_ALTLOS 0x00000004
|
||||
#define WAN_TE_BIT_ALARM_OOF 0x00000008
|
||||
#define WAN_TE_BIT_ALARM_RED 0x00000010
|
||||
#define WAN_TE_BIT_ALARM_AIS 0x00000020
|
||||
#define WAN_TE_BIT_ALARM_OOSMF 0x00000040
|
||||
#define WAN_TE_BIT_ALARM_OOCMF 0x00000080
|
||||
#define WAN_TE_BIT_ALARM_OOOF 0x00000100
|
||||
#define WAN_TE_BIT_ALARM_RAI 0x00000200
|
||||
#define WAN_TE_BIT_ALARM_YEL 0x00000400
|
||||
#define WAN_TE_BIT_ALARM_LOF 0x00000800
|
||||
#define WAN_TE_BIT_LOOPUP_CODE 0x00002000
|
||||
#define WAN_TE_BIT_LOOPDOWN_CODE 0x00004000
|
||||
#define WAN_TE_BIT_ALARM_LIU 0x00100000
|
||||
#define WAN_TE_BIT_ALARM_LIU_SC 0x00100000
|
||||
#define WAN_TE_BIT_ALARM_LIU_OC 0x00200000
|
||||
#define WAN_TE_BIT_ALARM_LIU_LOS 0x00400000
|
||||
|
||||
#define IS_TE_ALARM(alarm, mask) (alarm & mask)
|
||||
#define IS_TE_ALARM_ALOS(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_ALOS)
|
||||
#define IS_TE_ALARM_LOS(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_LOS)
|
||||
#define IS_TE_ALARM_OOF(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_OOF)
|
||||
#define IS_TE_ALARM_LOF(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_LOF)
|
||||
#define IS_TE_ALARM_RED(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_RED)
|
||||
#define IS_TE_ALARM_AIS(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_AIS)
|
||||
#define IS_TE_ALARM_OOSMF(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_OOSMF)
|
||||
#define IS_TE_ALARM_OOCMF(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_OOCMF)
|
||||
#define IS_TE_ALARM_OOOF(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_OOOF)
|
||||
#define IS_TE_ALARM_RAI(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_RAI)
|
||||
#define IS_TE_ALARM_YEL(alarm) IS_TE_ALARM(alarm, WAN_TE_BIT_ALARM_YEL)
|
||||
|
||||
/* Needed for backward compatibility */
|
||||
#ifndef IS_TE_ALOS_ALARM
|
||||
#define IS_TE_ALOS_ALARM IS_TE_ALARM_ALOS
|
||||
#endif
|
||||
|
||||
#ifndef IS_TE_LOS_ALARM
|
||||
#define IS_TE_LOS_ALARM IS_TE_ALARM_LOS
|
||||
#endif
|
||||
|
||||
#ifndef IS_TE_RED_ALARM
|
||||
#define IS_TE_RED_ALARM IS_TE_ALARM_RED
|
||||
#endif
|
||||
|
||||
#ifndef IS_TE_AIS_ALARM
|
||||
#define IS_TE_AIS_ALARM IS_TE_ALARM_AIS
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef IS_TE_RAI_ALARM
|
||||
#define IS_TE_RAI_ALARM IS_TE_ALARM_RAI
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef IS_TE_YEL_ALARM
|
||||
#define IS_TE_YEL_ALARM IS_TE_ALARM_YEL
|
||||
#endif
|
||||
|
||||
#ifndef IS_TE_OOF_ALARM
|
||||
#define IS_TE_OOF_ALARM IS_TE_ALARM_OOF
|
||||
#endif
|
||||
|
||||
/* Performance monitor counters bit mask */
|
||||
#define WAN_TE_BIT_PMON_LCV 0x01 /* line code violation counter */
|
||||
#define WAN_TE_BIT_PMON_BEE 0x02 /* bit errror event (T1) */
|
||||
#define WAN_TE_BIT_PMON_OOF 0x04 /* frame out of sync counter */
|
||||
#define WAN_TE_BIT_PMON_FEB 0x08 /* far end block counter */
|
||||
#define WAN_TE_BIT_PMON_CRC4 0x10 /* crc4 error counter (E1) */
|
||||
#define WAN_TE_BIT_PMON_FER 0x20 /* framing bit error (T1-pmc) */
|
||||
#define WAN_TE_BIT_PMON_FAS 0x40 /* Frame Alginment signal (E1) */
|
||||
|
||||
/* T1/E1 statistics bit mask */
|
||||
#define WAN_TE_STATS_BIT_ALARM 0x0001
|
||||
#define WAN_TE_STATS_BIT_RXLEVEL 0x0002
|
||||
|
||||
/* For T1 only */
|
||||
#define WAN_T1_LBO_NONE 0x00
|
||||
#define WAN_T1_LBO_0_DB 0x01
|
||||
#define WAN_T1_LBO_75_DB 0x02
|
||||
#define WAN_T1_LBO_15_DB 0x03
|
||||
#define WAN_T1_LBO_225_DB 0x04
|
||||
#define WAN_T1_0_110 0x05
|
||||
#define WAN_T1_110_220 0x06
|
||||
#define WAN_T1_220_330 0x07
|
||||
#define WAN_T1_330_440 0x08
|
||||
#define WAN_T1_440_550 0x09
|
||||
#define WAN_T1_550_660 0x0A
|
||||
/* For E1 only */
|
||||
#define WAN_E1_120 0x0B
|
||||
#define WAN_E1_75 0x0C
|
||||
/* T1/E1 8 ports */
|
||||
#define WAN_T1_0_133 0x0D
|
||||
#define WAN_T1_133_266 0x0E
|
||||
#define WAN_T1_266_399 0x0F
|
||||
#define WAN_T1_399_533 0x10
|
||||
#define WAN_T1_533_655 0x11
|
||||
|
||||
/* T1/E1: Recever */
|
||||
#define WAN_TE1_RX_SLEVEL_NONE 0
|
||||
#define WAN_TE1_RX_SLEVEL_43_DB 430 /* 43 dB E1, RMONEN=0 */
|
||||
#define WAN_TE1_RX_SLEVEL_36_DB 360 /* 36 dB T1, RMONEN=0 */
|
||||
#define WAN_TE1_RX_SLEVEL_30_DB 300 /* 30 dB RMONEN=0 | 1 */
|
||||
#define WAN_TE1_RX_SLEVEL_225_DB 225 /* 22.5 dB RMONEN=1 */
|
||||
#define WAN_TE1_RX_SLEVEL_18_DB 180 /* 18 dB RMONEN=0 */
|
||||
#define WAN_TE1_RX_SLEVEL_175_DB 175 /* 17.5 dB RMONEN=1 */
|
||||
#define WAN_TE1_RX_SLEVEL_12_DB 120 /* 12 dB RMONEN=0 | 1 */
|
||||
#define WAN_TE1_RX_SLEVEL_DECODE(slevel) \
|
||||
((slevel) == WAN_TE1_RX_SLEVEL_43_DB) ? "43dB" : \
|
||||
((slevel) == WAN_TE1_RX_SLEVEL_36_DB) ? "36dB" : \
|
||||
((slevel) == WAN_TE1_RX_SLEVEL_30_DB) ? "30dB" : \
|
||||
((slevel) == WAN_TE1_RX_SLEVEL_225_DB) ? "22.5dB" : \
|
||||
((slevel) == WAN_TE1_RX_SLEVEL_18_DB) ? "18dB" : \
|
||||
((slevel) == WAN_TE1_RX_SLEVEL_175_DB) ? "17.5dB" : \
|
||||
((slevel) == WAN_TE1_RX_SLEVEL_12_DB) ? "12dB" : "0dB"
|
||||
|
||||
/* For T1 only (long or short haul) */
|
||||
#define WAN_T1_LONG_HAUL 0x01
|
||||
#define WAN_T1_SHORT_HAUL 0x02
|
||||
|
||||
/* Line loopback modes */
|
||||
#define WAN_TE1_LB_NONE 0x00
|
||||
#define WAN_TE1_LINELB_MODE 0x01
|
||||
#define WAN_TE1_PAYLB_MODE 0x02
|
||||
#define WAN_TE1_DDLB_MODE 0x03
|
||||
#define WAN_TE1_TX_LINELB_MODE 0x04
|
||||
#define WAN_TE1_LIU_ALB_MODE 0x05
|
||||
#define WAN_TE1_LIU_LLB_MODE 0x06
|
||||
#define WAN_TE1_LIU_RLB_MODE 0x07
|
||||
#define WAN_TE1_LIU_DLB_MODE 0x08
|
||||
#define WAN_TE1_TX_PAYLB_MODE 0x09
|
||||
#define WAN_TE1_PCLB_MODE 0x0A
|
||||
|
||||
#define WAN_TE1_LB_MODE_DECODE(mode) \
|
||||
((mode) == WAN_TE1_LINELB_MODE) ? "Line/Remote Loopback" : \
|
||||
((mode) == WAN_TE1_PAYLB_MODE) ? "Payload Loopback" : \
|
||||
((mode) == WAN_TE1_DDLB_MODE) ? "Diagnostic Digital Loopback" : \
|
||||
((mode) == WAN_TE1_TX_LINELB_MODE) ? "TX Line Loopback" : \
|
||||
((mode) == WAN_TE1_LIU_ALB_MODE) ? "Analog LIU Loopback" : \
|
||||
((mode) == WAN_TE1_LIU_LLB_MODE) ? "Local LIU Loopback" : \
|
||||
((mode) == WAN_TE1_LIU_RLB_MODE) ? "Remote LIU Loopback" : \
|
||||
((mode) == WAN_TE1_LIU_DLB_MODE) ? "Dual LIU Loopback" : \
|
||||
((mode) == WAN_TE1_TX_PAYLB_MODE) ? "TX Payload Loopback" : \
|
||||
((mode) == WAN_TE1_PCLB_MODE) ? "Per-channel Loopback" : \
|
||||
"Unknown Loopback"
|
||||
|
||||
/* Line loopback activate/deactive modes */
|
||||
#define WAN_TE1_LB_ENABLE 0x01
|
||||
#define WAN_TE1_LB_DISABLE 0x02
|
||||
#define WAN_TE1_LB_ACTION_DECODE(action) \
|
||||
((action) == WAN_TE1_LB_ENABLE) ? "Enable" : \
|
||||
((action) == WAN_TE1_LB_DISABLE) ? "Disable" : \
|
||||
"Unknown"
|
||||
|
||||
/* T1/E1 front end Master clock source */
|
||||
#define WAN_TE1_REFCLK_OSC 0x00
|
||||
#define WAN_TE1_REFCLK_LINE1 0x01
|
||||
#define WAN_TE1_REFCLK_LINE2 0x02
|
||||
#define WAN_TE1_REFCLK_LINE3 0x03
|
||||
#define WAN_TE1_REFCLK_LINE4 0x04
|
||||
|
||||
/* Loopback commands (T1.107-1995 p.44) */
|
||||
#define WAN_T1_FDL_MSG_TIME 250 /* 250 us */
|
||||
#define WAN_T1_ESF_LINELB_TX_CNT 10
|
||||
#define WAN_T1_D4_LINELB_TX_CNT 5
|
||||
|
||||
#define RBOC_CODE_YEL 0x00
|
||||
#define LINELB_ACTIVATE_CODE 0x07
|
||||
#define LINELB_DEACTIVATE_CODE 0x1C
|
||||
#define PAYLB_ACTIVATE_CODE 0x0A
|
||||
#define PAYLB_DEACTIVATE_CODE 0x19
|
||||
#define UNIVLB_DEACTIVATE_CODE 0x12
|
||||
|
||||
#define WAN_TE1_BOC_LB_CODE_DECODE(boc) \
|
||||
((boc) == LINELB_ACTIVATE_CODE) ? "LINELB Activate" : \
|
||||
((boc) == LINELB_DEACTIVATE_CODE) ? "LINELB Deactivate" : \
|
||||
((boc) == PAYLB_ACTIVATE_CODE) ? "PAYLB Activate" : \
|
||||
((boc) == PAYLB_DEACTIVATE_CODE) ? "PAYLB Deactivate" : \
|
||||
((boc) == UNIVLB_DEACTIVATE_CODE) ? "Universal LB Deactivate" : \
|
||||
"Unsupported BOC"
|
||||
|
||||
/* Interrupt polling delay */
|
||||
#define POLLING_TE1_TIMER 1 /* 1 sec */
|
||||
#define WAN_T1_ALARM_THRESHOLD_LOF_ON (3) /* 2-3 sec */
|
||||
#define WAN_T1_ALARM_THRESHOLD_LOF_OFF (1) /* 10 sec */
|
||||
#define WAN_T1_ALARM_THRESHOLD_AIS_ON (3) // must be 2.5s
|
||||
#define WAN_T1_ALARM_THRESHOLD_AIS_OFF (1) // must be 10s
|
||||
#define WAN_T1_ALARM_THRESHOLD_LOS_ON (3) // must be 2.5s
|
||||
#define WAN_T1_ALARM_THRESHOLD_LOS_OFF (1) // must be 10s
|
||||
#define WAN_T1_ALARM_THRESHOLD_RAI_ON (3) // must be 2.5s
|
||||
#define WAN_T1_ALARM_THRESHOLD_RAI_OFF (1) // must be 10s
|
||||
|
||||
/* TE1 critical flag */
|
||||
#define TE_TIMER_RUNNING 0x01
|
||||
#define TE_TIMER_KILL 0x02
|
||||
#define LINELB_WAITING 0x03
|
||||
#define LINELB_CODE_BIT 0x04
|
||||
#define LINELB_CHANNEL_BIT 0x05
|
||||
#define TE_CONFIGURED 0x06
|
||||
#define TE_TIMER_EVENT_PENDING 0x07
|
||||
#define TE_TIMER_EVENT_INPROGRESS 0x08
|
||||
#define TE_AIS_TX_STARTUP 0x09
|
||||
#define TE_CONFIG_PAUSED 0x0A
|
||||
|
||||
/* TE1 sw irq types */
|
||||
enum {
|
||||
WAN_TE1_SWIRQ_TYPE_NONE = 0,
|
||||
|
||||
WAN_TE1_SWIRQ_TYPE_LINK,
|
||||
WAN_TE1_SWIRQ_TYPE_ALARM_AIS,
|
||||
WAN_TE1_SWIRQ_TYPE_ALARM_LOS,
|
||||
WAN_TE1_SWIRQ_TYPE_ALARM_LOF,
|
||||
WAN_TE1_SWIRQ_TYPE_ALARM_RAI,
|
||||
|
||||
WAN_TE1_SWIRQ_MAX
|
||||
};
|
||||
#define WAN_TE1_SWIRQ_TYPE_DECODE(type) \
|
||||
((type) == WAN_TE1_SWIRQ_TYPE_LINK) ? "T1/E1 Link" : \
|
||||
((type) == WAN_TE1_SWIRQ_TYPE_ALARM_AIS) ? "T1/E1 Alarm (AIS)" :\
|
||||
((type) == WAN_TE1_SWIRQ_TYPE_ALARM_LOS) ? "T1/E1 Alarm (LOS)" :\
|
||||
((type) == WAN_TE1_SWIRQ_TYPE_ALARM_LOF) ? "T1/E1 Alarm (LOF)" :\
|
||||
((type) == WAN_TE1_SWIRQ_TYPE_ALARM_RAI) ? "T1/E1 Alarm (RAI)" :\
|
||||
"Unknown"
|
||||
|
||||
enum {
|
||||
WAN_TE1_SWIRQ_SUBTYPE_NONE = 0,
|
||||
|
||||
WAN_TE1_SWIRQ_SUBTYPE_LINKDOWN,
|
||||
WAN_TE1_SWIRQ_SUBTYPE_LINKREADY,
|
||||
WAN_TE1_SWIRQ_SUBTYPE_LINKCRIT,
|
||||
WAN_TE1_SWIRQ_SUBTYPE_LINKUP,
|
||||
|
||||
WAN_TE1_SWIRQ_SUBTYPE_ALARM_ON,
|
||||
WAN_TE1_SWIRQ_SUBTYPE_ALARM_OFF
|
||||
};
|
||||
#define WAN_TE1_SWIRQ_SUBTYPE_DECODE(subtype) \
|
||||
((subtype) == WAN_TE1_SWIRQ_SUBTYPE_LINKDOWN) ? "Down" : \
|
||||
((subtype) == WAN_TE1_SWIRQ_SUBTYPE_LINKREADY) ? "Ready" : \
|
||||
((subtype) == WAN_TE1_SWIRQ_SUBTYPE_LINKCRIT) ? "Crit" : \
|
||||
((subtype) == WAN_TE1_SWIRQ_SUBTYPE_LINKUP) ? "UP" : \
|
||||
((subtype) == WAN_TE1_SWIRQ_SUBTYPE_ALARM_ON) ? "activating" : \
|
||||
((subtype) == WAN_TE1_SWIRQ_SUBTYPE_ALARM_OFF) ? "deactivating" : \
|
||||
"Unknown"
|
||||
|
||||
|
||||
/* TE1 timer flags (polling) */
|
||||
#define TE_LINELB_TIMER 0x01
|
||||
#define TE_LINKDOWN_TIMER 0x02
|
||||
#define TE_SET_INTR 0x03
|
||||
#define TE_RBS_READ 0x04
|
||||
#define TE_LINKUP_TIMER 0x05
|
||||
#define TE_SET_RBS 0x06
|
||||
#define TE_UPDATE_PMON 0x07
|
||||
#define TE_SET_LB_MODE 0x08
|
||||
#define TE_RBS_ENABLE 0x09
|
||||
#define TE_RBS_DISABLE 0x0A
|
||||
#define TE_POLL_CONFIG 0x0B
|
||||
#define TE_POLL_READ 0x0C
|
||||
#define TE_POLL_WRITE 0x0D
|
||||
#define TE_POLL_CONFIG_VERIFY 0x0E
|
||||
#define TE_LINKCRIT_TIMER 0x0F
|
||||
#define WAN_TE_POLL_LINKREADY 0x10
|
||||
#define WAN_TE_POLL_BERT 0x11
|
||||
#define WAN_TE_POLL_ALARM_PENDING 0x12
|
||||
|
||||
/* TE1 T1/E1 interrupt setting delay */
|
||||
#define INTR_TE1_TIMER 150 /* 50 ms */
|
||||
|
||||
/* T1/E1 RBS flags (bit-map) */
|
||||
#define WAN_TE_RBS_NONE 0x00
|
||||
#define WAN_TE_RBS_UPDATE 0x01
|
||||
#define WAN_TE_RBS_REPORT 0x02
|
||||
|
||||
|
||||
#define IS_T1_CARD(card) IS_T1_FEMEDIA(&(card)->fe)
|
||||
#define IS_E1_CARD(card) IS_E1_FEMEDIA(&(card)->fe)
|
||||
#define IS_TE1_CARD(card) IS_TE1_FEMEDIA(&(card)->fe)
|
||||
|
||||
#define FE_LBO(fe_cfg) (fe_cfg)->cfg.te_cfg.lbo
|
||||
#define FE_CLK(fe_cfg) (fe_cfg)->cfg.te_cfg.te_clock
|
||||
#define FE_REFCLK(fe_cfg) (fe_cfg)->cfg.te_cfg.te_ref_clock
|
||||
#define FE_HIMPEDANCE_MODE(fe_cfg) (fe_cfg)->cfg.te_cfg.high_impedance_mode
|
||||
#define FE_ACTIVE_CH(fe_cfg) (fe_cfg)->cfg.te_cfg.active_ch
|
||||
#define FE_SIG_MODE(fe_cfg) (fe_cfg)->cfg.te_cfg.sig_mode
|
||||
#define FE_RX_SLEVEL(fe_cfg) (fe_cfg)->cfg.te_cfg.rx_slevel
|
||||
|
||||
#define GET_TE_START_CHANNEL(fe) \
|
||||
(IS_T1_FEMEDIA(fe) ? 1 : \
|
||||
IS_E1_FEMEDIA(fe) ? 0 :0)
|
||||
|
||||
#define GET_TE_CHANNEL_RANGE(fe) \
|
||||
(IS_T1_FEMEDIA(fe) ? NUM_OF_T1_CHANNELS :\
|
||||
IS_E1_FEMEDIA(fe) ? NUM_OF_E1_CHANNELS :0)
|
||||
|
||||
|
||||
#define WAN_TE_PRN_ALARM(alarm, bit) ((alarm) & (bit)) ? "ON" : "OFF"
|
||||
|
||||
#define WAN_TE_PRN_ALARM_ALOS(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_ALOS)
|
||||
#define WAN_TE_PRN_ALARM_LOS(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_LOS)
|
||||
#define WAN_TE_PRN_ALARM_OOF(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_OOF)
|
||||
#define WAN_TE_PRN_ALARM_LOF(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_LOF)
|
||||
#define WAN_TE_PRN_ALARM_RED(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_RED)
|
||||
#define WAN_TE_PRN_ALARM_AIS(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_AIS)
|
||||
#define WAN_TE_PRN_ALARM_OOSMF(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_OOSMF)
|
||||
#define WAN_TE_PRN_ALARM_OOCMF(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_OOCMF)
|
||||
#define WAN_TE_PRN_ALARM_OOOF(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_OOOF)
|
||||
#define WAN_TE_PRN_ALARM_RAI(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_RAI)
|
||||
#define WAN_TE_PRN_ALARM_YEL(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_YEL)
|
||||
|
||||
#define WAN_TE_PRN_ALARM_LIU_SC(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_LIU_SC)
|
||||
#define WAN_TE_PRN_ALARM_LIU_OC(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_LIU_OC)
|
||||
#define WAN_TE_PRN_ALARM_LIU_LOS(alarm) WAN_TE_PRN_ALARM(alarm, WAN_TE_BIT_ALARM_LIU_LOS)
|
||||
|
||||
#define TECLK_DECODE(fe_cfg) \
|
||||
(FE_CLK(fe_cfg) == WAN_NORMAL_CLK) ? "Normal" : \
|
||||
(FE_CLK(fe_cfg) == WAN_MASTER_CLK) ? "Master" : "Unknown"
|
||||
|
||||
#define LBO_DECODE(fe_cfg) \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_LBO_0_DB) ? "0db" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_LBO_75_DB) ? "7.5db" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_LBO_15_DB) ? "15dB" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_LBO_225_DB) ? "22.5dB" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_0_110) ? "0-110ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_110_220) ? "110-220ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_220_330) ? "220-330ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_330_440) ? "330-440ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_440_550) ? "440-550ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_550_660) ? "550-660ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_0_133) ? "0-133ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_133_266) ? "133-266ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_266_399) ? "266-399ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_399_533) ? "399-533ft" : \
|
||||
(FE_LBO(fe_cfg) == WAN_T1_533_655) ? "5330-599ft": \
|
||||
(FE_LBO(fe_cfg) == WAN_E1_120) ? "120OH" : \
|
||||
(FE_LBO(fe_cfg) == WAN_E1_75) ? "75OH" : \
|
||||
"Unknown"
|
||||
|
||||
/* E1 signalling insertion mode */
|
||||
#define WAN_TE1_SIG_NONE 0x00 /* default */
|
||||
#define WAN_TE1_SIG_CCS 0x01 /* E1 CCS - default */
|
||||
#define WAN_TE1_SIG_CAS 0x02 /* E1 CAS */
|
||||
#define TE1SIG_DECODE(fe_cfg) \
|
||||
((FE_SIG_MODE(fe_cfg)) == WAN_TE1_SIG_CCS) ? "CCS" : \
|
||||
((FE_SIG_MODE(fe_cfg)) == WAN_TE1_SIG_CAS) ? "CAS" : \
|
||||
"Unknown"
|
||||
|
||||
/* Front-End UDP command */
|
||||
|
||||
#define WAN_FE_SET_LB_MODE WAN_FE_LB_MODE
|
||||
|
||||
#define WAN_FE_GET_STAT (WAN_FE_UDP_CMD_START + 0)
|
||||
#define WAN_FE_LB_MODE (WAN_FE_UDP_CMD_START + 1)
|
||||
#define WAN_FE_FLUSH_PMON (WAN_FE_UDP_CMD_START + 2)
|
||||
#define WAN_FE_GET_CFG (WAN_FE_UDP_CMD_START + 3)
|
||||
#define WAN_FE_SET_DEBUG_MODE (WAN_FE_UDP_CMD_START + 4)
|
||||
#define WAN_FE_TX_MODE (WAN_FE_UDP_CMD_START + 5)
|
||||
#define WAN_FE_BERT_MODE (WAN_FE_UDP_CMD_START + 6)
|
||||
#define WAN_FE_SET_CFG (WAN_FE_UDP_CMD_START + 7)
|
||||
|
||||
/* FE interrupt types bit-map */
|
||||
#define WAN_TE_INTR_NONE 0x00
|
||||
#define WAN_TE_INTR_GLOBAL 0x01
|
||||
#define WAN_TE_INTR_BASIC 0x02
|
||||
#define WAN_TE_INTR_SIGNALLING 0x04
|
||||
#define WAN_TE_INTR_FXS_DTMF 0x08
|
||||
#define WAN_TE_INTR_PMON 0x10
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* T1/E1 configuration structures.
|
||||
*/
|
||||
typedef struct sdla_te_cfg {
|
||||
u_int8_t lbo;
|
||||
u_int8_t te_clock;
|
||||
u_int32_t active_ch;
|
||||
u_int32_t te_rbs_ch;
|
||||
u_int8_t high_impedance_mode;
|
||||
int rx_slevel; /* only for high_impedance_mode=YES */
|
||||
u_int8_t te_ref_clock;
|
||||
u_int8_t sig_mode;
|
||||
u_int8_t ignore_yel_alarm;
|
||||
u_int8_t ais_maintenance;
|
||||
u_int8_t ais_auto_on_los;
|
||||
} sdla_te_cfg_t;
|
||||
|
||||
/* Performamce monitor counters */
|
||||
typedef struct {
|
||||
u_int16_t mask;
|
||||
u_int32_t lcv_errors; /* Line code violation (T1/E1) */
|
||||
u_int16_t lcv_diff;
|
||||
u_int32_t bee_errors; /* Bit errors (T1) */
|
||||
u_int16_t bee_diff;
|
||||
u_int32_t oof_errors; /* Frame out of sync (T1) */
|
||||
u_int16_t oof_diff;
|
||||
u_int32_t crc4_errors; /* CRC4 errors (E1) */
|
||||
u_int16_t crc4_diff;
|
||||
u_int32_t fas_errors; /* Frame Aligment Signal (E1)*/
|
||||
u_int16_t fas_diff;
|
||||
u_int32_t feb_errors; /* Far End Block errors (E1) */
|
||||
u_int16_t feb_diff;
|
||||
u_int32_t fer_errors; /* Framing bit errors (T1) */
|
||||
u_int16_t fer_diff;
|
||||
u_int32_t sync_errors;
|
||||
} sdla_te_pmon_t;
|
||||
|
||||
#define WAN_PMON_SYNC_ERROR(card) do { \
|
||||
sdla_te_pmon_t *pmon; \
|
||||
pmon = &card->fe.fe_stats.te_pmon; \
|
||||
pmon->sync_errors++; \
|
||||
} while (0);
|
||||
|
||||
#define WAN_TE_RXLEVEL_LEN 20
|
||||
typedef struct {
|
||||
u_int16_t mask;
|
||||
sdla_te_pmon_t pmon;
|
||||
char rxlevel[WAN_TE_RXLEVEL_LEN];
|
||||
} sdla_te_stats_t;
|
||||
|
||||
#define WAN_TE_BERT_CMD_NONE 0x00
|
||||
#define WAN_TE_BERT_CMD_STOP 0x01
|
||||
#define WAN_TE_BERT_CMD_START 0x02
|
||||
#define WAN_TE_BERT_CMD_STATUS 0x03
|
||||
#define WAN_TE_BERT_CMD_EIB 0x04
|
||||
#define WAN_TE_BERT_CMD_RESET 0x05
|
||||
#define WAN_TE_BERT_CMD_RUNNING 0x06
|
||||
#define WAN_TE_BERT_CMD_DECODE(cmd) \
|
||||
((cmd) == WAN_TE_BERT_CMD_STOP) ? "Stop" : \
|
||||
((cmd) == WAN_TE_BERT_CMD_START) ? "Start" : \
|
||||
((cmd) == WAN_TE_BERT_CMD_STATUS) ? "Status" : \
|
||||
((cmd) == WAN_TE_BERT_CMD_EIB) ? "Error Insert Bit" : \
|
||||
((cmd) == WAN_TE_BERT_CMD_RESET) ? "Reset Status" : \
|
||||
((cmd) == WAN_TE_BERT_CMD_RUNNING) ? "Running" : \
|
||||
"Unknown"
|
||||
|
||||
/* BERT: Pattern type */
|
||||
#define WAN_TE_BERT_PATTERN_PSEUDORANDOM_2E7 0x01
|
||||
#define WAN_TE_BERT_PATTERN_PSEUDORANDOM_2E11 0x02
|
||||
#define WAN_TE_BERT_PATTERN_PSEUDORANDOM_2E15 0x03
|
||||
#define WAN_TE_BERT_PATTERN_PSEUDORANDOM_QRSS 0x04
|
||||
#define WAN_TE_BERT_PATTERN_REPETITIVE 0x05
|
||||
#define WAN_TE_BERT_PATTERN_WORD 0x06
|
||||
#define WAN_TE_BERT_PATTERN_DALY 0x07
|
||||
#define WAN_TE_BERT_PATTERN_PSEUDORANDOM_2E9 0x08
|
||||
#define WAN_TE_BERT_PATTERN_DECODE(type) \
|
||||
((type) == WAN_TE_BERT_PATTERN_PSEUDORANDOM_2E7) ? "PseudoRandom 2E7-1" : \
|
||||
((type) == WAN_TE_BERT_PATTERN_PSEUDORANDOM_2E11) ? "PseudoRandom 2E11-1" : \
|
||||
((type) == WAN_TE_BERT_PATTERN_PSEUDORANDOM_2E15) ? "PseudoRandom 2E15-1" : \
|
||||
((type) == WAN_TE_BERT_PATTERN_PSEUDORANDOM_QRSS) ? "PseudoRandom QRSS" : \
|
||||
((type) == WAN_TE_BERT_PATTERN_REPETITIVE) ? "Repetitive Pattern" : \
|
||||
((type) == WAN_TE_BERT_PATTERN_WORD) ? "Alternating Word Pattern" : \
|
||||
((type) == WAN_TE_BERT_PATTERN_DALY) ? "Daly Pattern" : \
|
||||
((type) == WAN_TE_BERT_PATTERN_PSEUDORANDOM_2E9) ? "PseudoRandom 2E-9-1" : "Unknown"
|
||||
|
||||
#define WAN_TE_BERT_LOOPBACK_NONE 0x00
|
||||
#define WAN_TE_BERT_LOOPBACK_PAYLOAD 0x01
|
||||
#define WAN_TE_BERT_LOOPBACK_LINE 0x02
|
||||
#define WAN_TE_BERT_LOOPBACK_DECODE(type) \
|
||||
((type) == WAN_TE_BERT_LOOPBACK_NONE) ? "Loopback (None)" : \
|
||||
((type) == WAN_TE_BERT_LOOPBACK_PAYLOAD) ? "Payload Loopback" : \
|
||||
((type) == WAN_TE_BERT_LOOPBACK_LINE) ? "Line Loopback" : \
|
||||
"Unknown"
|
||||
|
||||
/* BERT: Errot Insert Bits */
|
||||
#define WAN_TE_BERT_EIB_NONE 0x00
|
||||
#define WAN_TE_BERT_EIB_SINGLE 0x01
|
||||
#define WAN_TE_BERT_EIB1 0x02
|
||||
#define WAN_TE_BERT_EIB2 0x03
|
||||
#define WAN_TE_BERT_EIB3 0x04
|
||||
#define WAN_TE_BERT_EIB4 0x05
|
||||
#define WAN_TE_BERT_EIB5 0x06
|
||||
#define WAN_TE_BERT_EIB6 0x07
|
||||
#define WAN_TE_BERT_EIB7 0x08
|
||||
#define WAN_TE_BERT_EIB_DECODE(eib) \
|
||||
((eib) == WAN_TE_BERT_EIB_NONE) ? "No error insertion" : \
|
||||
((eib) == WAN_TE_BERT_EIB_SINGLE) ? "Single Bit Error Insert" : \
|
||||
((eib) == WAN_TE_BERT_EIB1) ? "EIB 10E-1" : \
|
||||
((eib) == WAN_TE_BERT_EIB2) ? "EIB 10E-2" : \
|
||||
((eib) == WAN_TE_BERT_EIB3) ? "EIB 10E-3" : \
|
||||
((eib) == WAN_TE_BERT_EIB4) ? "EIB 10E-4" : \
|
||||
((eib) == WAN_TE_BERT_EIB5) ? "EIB 10E-5" : \
|
||||
((eib) == WAN_TE_BERT_EIB6) ? "EIB 10E-6" : \
|
||||
((eib) == WAN_TE_BERT_EIB7) ? "EIB 10E-7" : \
|
||||
"Unknown"
|
||||
|
||||
#define WAN_TE_BERT_STATUS_AUTO 0x00
|
||||
#define WAN_TE_BERT_STATUS_MANUAL 0x01
|
||||
#define WAN_TE_BERT_STATUS_RUNNING 0x02
|
||||
#define WAN_TE_BERT_STATUS_STOPPED 0x03
|
||||
|
||||
#define WAN_TE_BERT_FLAG_VERBOSE 1
|
||||
#define WAN_TE_BERT_FLAG_READY 2
|
||||
#define WAN_TE_BERT_FLAG_INLOCK 3
|
||||
|
||||
#define WAN_TE_BERT_RC_SUCCESS 0
|
||||
#define WAN_TE_BERT_RC_EINVAL 1
|
||||
#define WAN_TE_BERT_RC_FAILED 2
|
||||
#define WAN_TE_BERT_RC_RUNNING 3
|
||||
#define WAN_TE_BERT_RC_STOPPED 4
|
||||
#define WAN_TE_BERT_RC_DECODE(rc) \
|
||||
((rc) == WAN_TE_BERT_RC_SUCCESS) ? "Success" : \
|
||||
((rc) == WAN_TE_BERT_RC_EINVAL) ? "Invalid parameter" : \
|
||||
((rc) == WAN_TE_BERT_RC_FAILED) ? "Failed" : \
|
||||
((rc) == WAN_TE_BERT_RC_RUNNING) ? "BERT is still running" : \
|
||||
((rc) == WAN_TE_BERT_RC_STOPPED) ? "BERT is not running" : \
|
||||
"Unknown"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u_int32_t chan_map; /* */
|
||||
u_int16_t pattern_type; /* pattern type */
|
||||
u_int16_t pattern_len; /* pattern length */
|
||||
u_int32_t pattern; /* pattern */
|
||||
int count;
|
||||
u_int8_t lb_type;
|
||||
u_int16_t eib;
|
||||
|
||||
} sdla_te_bert_cfg_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int avail_sec; /* out: */
|
||||
int err_sec; /* out: */
|
||||
int err_free_sec; /* out: */
|
||||
unsigned long bit_cnt; /* out: */
|
||||
unsigned long err_cnt; /* out: */
|
||||
int inlock; /* out: */
|
||||
|
||||
} sdla_te_bert_stats_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u_int32_t chan_map;
|
||||
u_int8_t lb_type;
|
||||
|
||||
} sdla_te_bert_stop_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u_int8_t cmd;
|
||||
int verbose;
|
||||
int rc;
|
||||
u_int8_t status;
|
||||
|
||||
union {
|
||||
sdla_te_bert_cfg_t cfg;
|
||||
sdla_te_bert_stats_t stats;
|
||||
sdla_te_bert_stop_t stop;
|
||||
} un;
|
||||
|
||||
} sdla_te_bert_t;
|
||||
|
||||
/*
|
||||
******************************************************************************
|
||||
STRUCTURES AND TYPEDEFS
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
/* Connection status threshold */
|
||||
/* Original 5
|
||||
** Note (May 7 2009: We are waiting at least 10 sec anyway for other alarms */
|
||||
#define WAN_TE1_STATUS_THRESHOLD 3 /* Feb 18, 2010.
|
||||
* DavidR: changed to 3 from 1 to
|
||||
* avoid line bouncing during port
|
||||
* startup. */
|
||||
|
||||
#define WAN_TE1_LBO(fe) FE_LBO(&((fe)->fe_cfg))
|
||||
#define WAN_TE1_CLK(fe) FE_CLK(&((fe)->fe_cfg))
|
||||
#define WAN_TE1_REFCLK(fe) FE_REFCLK(&((fe)->fe_cfg))
|
||||
#define WAN_TE1_HI_MODE(fe) FE_HIMPEDANCE_MODE(&((fe)->fe_cfg))
|
||||
#define WAN_TE1_ACTIVE_CH(fe) FE_ACTIVE_CH(&((fe)->fe_cfg))
|
||||
#define WAN_TE1_SIG_MODE(fe) FE_SIG_MODE(&((fe)->fe_cfg))
|
||||
|
||||
#define TE_LBO_DECODE(fe) LBO_DECODE(&((fe)->fe_cfg))
|
||||
#define TE_CLK_DECODE(fe) TECLK_DECODE(&((fe)->fe_cfg))
|
||||
|
||||
#define WAN_TE1_SIG_DECODE(fe) TE1SIG_DECODE(&((fe)->fe_cfg))
|
||||
|
||||
/* Read/Write to front-end register */
|
||||
#if 0
|
||||
#if 0
|
||||
#define READ_REG(reg) card->wandev.read_front_end_reg(card, reg)
|
||||
#define WRITE_REG(reg, value) card->wandev.write_front_end_reg(card, reg, (unsigned char)(value))
|
||||
#endif
|
||||
#define WRITE_REG(reg,val) \
|
||||
fe->write_fe_reg( \
|
||||
fe->card, \
|
||||
(int)((reg) + (fe->fe_cfg.line_no*PMC4_LINE_DELTA)), \
|
||||
(int)(val))
|
||||
|
||||
#define WRITE_REG_LINE(fe_line_no, reg,val) \
|
||||
fe->write_fe_reg( \
|
||||
fe->card, \
|
||||
(int)((reg) + (fe_line_no)*PMC4_LINE_DELTA), \
|
||||
(int)(val))
|
||||
|
||||
#define READ_REG(reg) \
|
||||
fe->read_fe_reg( \
|
||||
fe->card, \
|
||||
(int)((reg) + (fe->fe_cfg.line_no*PMC4_LINE_DELTA)))
|
||||
|
||||
#define READ_REG_LINE(fe_line_no, reg) \
|
||||
fe->read_fe_reg( \
|
||||
fe->card, \
|
||||
(int)((reg) + (fe_line_no)*PMC4_LINE_DELTA))
|
||||
#endif
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
* Constants for the SET_T1_E1_SIGNALING_CFG/READ_T1_E1_SIGNALING_CFG commands
|
||||
* ---------------------------------------------------------------------------*/
|
||||
|
||||
/* the structure for setting the signaling permission */
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned char time_slot[32];
|
||||
} te_signaling_perm_t;
|
||||
#pragma pack()
|
||||
|
||||
/* settings for the signaling permission structure */
|
||||
#define TE_SIG_DISABLED 0x00 /* signaling is disabled */
|
||||
#define TE_RX_SIG_ENABLED 0x01 /* receive signaling is enabled */
|
||||
#define TE_TX_SIG_ENABLED 0x02 /* transmit signaling is enabled */
|
||||
#define TE_SET_TX_SIG_BITS 0x80 /* a flag indicating that outgoing
|
||||
signaling bits should be set */
|
||||
|
||||
/* the structure used for the
|
||||
* SET_T1_E1_SIGNALING_CFG/READ_T1_E1_SIGNALING_CFG command
|
||||
*/
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
/* signaling permission structure */
|
||||
te_signaling_perm_t sig_perm;
|
||||
/* loop signaling processing counter */
|
||||
unsigned char sig_processing_counter;
|
||||
/* pointer to the signaling permission structure */
|
||||
unsigned long ptr_te_sig_perm_struct;
|
||||
/* pointer to the receive signaling structure */
|
||||
unsigned long ptr_te_Rx_sig_struct;
|
||||
/* pointer to the transmit signaling structure */
|
||||
unsigned long ptr_te_Tx_sig_struct;
|
||||
} te_signaling_cfg_t;
|
||||
#pragma pack()
|
||||
|
||||
/* the structure used for reading and setting the signaling bits */
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned char time_slot[32];
|
||||
} te_signaling_status_t;
|
||||
#pragma pack()
|
||||
|
||||
typedef struct {
|
||||
unsigned long ch_map;
|
||||
int rbs_channel; /* tx rbs per channel */
|
||||
unsigned char rbs_abcd; /* tx rbs pec channel */
|
||||
unsigned char lb_type; /* loopback type */
|
||||
unsigned short reg; /* fe register */
|
||||
unsigned char value; /* fe register value */
|
||||
} sdla_te_event_t;
|
||||
|
||||
typedef struct {
|
||||
|
||||
unsigned char lb_tx_cmd;
|
||||
unsigned char lb_tx_mode;
|
||||
unsigned char lb_tx_code;
|
||||
unsigned long lb_tx_cnt;
|
||||
|
||||
unsigned long critical;
|
||||
|
||||
//unsigned char timer_cmd;
|
||||
//unsigned long timer_ch_map;
|
||||
//int timer_channel; /* tx rbs per channel */
|
||||
//int timer_delay;
|
||||
//unsigned char timer_abcd; /* tx rbs pec channel */
|
||||
|
||||
unsigned char SIGX_chg_30_25;
|
||||
unsigned char SIGX_chg_24_17;
|
||||
unsigned char SIGX_chg_16_9;
|
||||
unsigned char SIGX_chg_8_1;
|
||||
|
||||
unsigned long ptr_te_sig_perm_off;
|
||||
unsigned long ptr_te_Rx_sig_off;
|
||||
unsigned long ptr_te_Tx_sig_off;
|
||||
|
||||
unsigned char intr_src1;
|
||||
unsigned char intr_src2;
|
||||
unsigned char intr_src3;
|
||||
|
||||
unsigned int max_channels;
|
||||
|
||||
unsigned long rx_rbs_status;
|
||||
unsigned char rx_rbs[32];
|
||||
unsigned char tx_rbs[32];
|
||||
|
||||
unsigned long tx_rbs_A;
|
||||
unsigned long tx_rbs_B;
|
||||
unsigned long tx_rbs_C;
|
||||
unsigned long tx_rbs_D;
|
||||
|
||||
unsigned long rx_rbs_A;
|
||||
unsigned long rx_rbs_B;
|
||||
unsigned long rx_rbs_C;
|
||||
unsigned long rx_rbs_D;
|
||||
|
||||
unsigned char xlpg_scale;
|
||||
|
||||
u_int16_t status_cnt;
|
||||
|
||||
int reg_dbg_busy;
|
||||
int reg_dbg_ready;
|
||||
unsigned char reg_dbg_value;
|
||||
|
||||
wan_ticks_t crit_alarm_start;
|
||||
unsigned int lb_mode_map;
|
||||
|
||||
int tx_yel_alarm;
|
||||
|
||||
unsigned int bert_flag;
|
||||
wan_ticks_t bert_start;
|
||||
sdla_te_bert_cfg_t bert_cfg;
|
||||
sdla_te_bert_stats_t bert_stats;
|
||||
|
||||
uint8_t tx_ais_alarm;
|
||||
wan_ticks_t tx_ais_startup_timeout;
|
||||
|
||||
} sdla_te_param_t;
|
||||
|
||||
|
||||
/*
|
||||
******************************************************************************
|
||||
FUNCTION PROTOTYPES
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
WP_EXTERN int sdla_te_default_cfg(void* pfe, void* fe_cfg, int media);
|
||||
WP_EXTERN int sdla_te_copycfg(void* pfe, void* fe_cfg);
|
||||
|
||||
WP_EXTERN int sdla_te_iface_init(void *p_fe, void *p_fe_iface);
|
||||
WP_EXTERN int sdla_ds_te1_iface_init(void *p_fe, void *p_fe_iface);
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#undef WP_EXTERN
|
||||
|
||||
|
||||
/* Deprecated defines */
|
||||
#define WAN_TE_ALARM_MASK_FRAMER WAN_TE_ALARM_FRAMER_MASK
|
||||
#define WAN_TE_ALARM_MASK_LIU WAN_TE_ALARM_LIU_MASK
|
||||
#define WAN_TE_BIT_ALOS_ALARM WAN_TE_BIT_ALARM_ALOS
|
||||
#define WAN_TE_BIT_LOS_ALARM WAN_TE_BIT_ALARM_LOS
|
||||
#define WAN_TE_BIT_ALTLOS_ALARM WAN_TE_BIT_ALARM_ALTLOS
|
||||
#define WAN_TE_BIT_OOF_ALARM WAN_TE_BIT_ALARM_OOF
|
||||
#define WAN_TE_BIT_RED_ALARM WAN_TE_BIT_ALARM_RED
|
||||
#define WAN_TE_BIT_AIS_ALARM WAN_TE_BIT_ALARM_AIS
|
||||
#define WAN_TE_BIT_OOSMF_ALARM WAN_TE_BIT_ALARM_OOSMF
|
||||
#define WAN_TE_BIT_OOCMF_ALARM WAN_TE_BIT_ALARM_OOCMF
|
||||
#define WAN_TE_BIT_OOOF_ALARM WAN_TE_BIT_ALARM_OOOF
|
||||
#define WAN_TE_BIT_RAI_ALARM WAN_TE_BIT_ALARM_RAI
|
||||
#define WAN_TE_BIT_YEL_ALARM WAN_TE_BIT_ALARM_YEL
|
||||
#define WAN_TE_BIT_LIU_ALARM WAN_TE_BIT_ALARM_LIU
|
||||
#define WAN_TE_BIT_LIU_ALARM_SC WAN_TE_BIT_ALARM_LIU_SC
|
||||
#define WAN_TE_BIT_LIU_ALARM_OC WAN_TE_BIT_ALARM_LIU_OC
|
||||
#define WAN_TE_BIT_LIU_ALARM_LOS WAN_TE_BIT_ALARM_LIU_LOS
|
||||
|
||||
#define WAN_TE_ALARM(alarm, bit) ((alarm) & (bit)) ? "ON" : "OFF"
|
||||
|
||||
#define WAN_TE_ALOS_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_ALOS_ALARM)
|
||||
#define WAN_TE_LOS_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_LOS_ALARM)
|
||||
#define WAN_TE_OOF_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_OOF_ALARM)
|
||||
#define WAN_TE_RED_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_RED_ALARM)
|
||||
#define WAN_TE_AIS_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_AIS_ALARM)
|
||||
#define WAN_TE_OOSMF_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_OOSMF_ALARM)
|
||||
#define WAN_TE_OOCMF_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_OOCMF_ALARM)
|
||||
#define WAN_TE_OOOF_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_OOOF_ALARM)
|
||||
#define WAN_TE_RAI_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_RAI_ALARM)
|
||||
#define WAN_TE_YEL_ALARM(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_YEL_ALARM)
|
||||
#define WAN_TE_LIU_ALARM_SC(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_LIU_ALARM_SC)
|
||||
#define WAN_TE_LIU_ALARM_OC(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_LIU_ALARM_OC)
|
||||
#define WAN_TE_LIU_ALARM_LOS(alarm) WAN_TE_ALARM(alarm, WAN_TE_BIT_LIU_ALARM_LOS)
|
||||
|
||||
|
||||
#endif /* _SDLA_TE1_H */
|
|
@ -0,0 +1,863 @@
|
|||
/*
|
||||
* Copyright (c) 2001
|
||||
* Alex Feldman <al.feldman@sangoma.com>. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Alex Feldman.
|
||||
* 4. Neither the name of the author nor the names of any co-contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Alex Feldman AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL Alex Feldman OR THE VOICES IN HIS HEAD
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: sdla_te1_ds.h,v 1.15 2008-02-06 19:32:19 sangoma Exp $
|
||||
*/
|
||||
|
||||
/*****************************************************************************
|
||||
* sdla_te1_ds.h Sangoma TE1 configuration definitions (Dallas).
|
||||
*
|
||||
* Author: Alex Feldman
|
||||
*
|
||||
* ============================================================================
|
||||
* Aprl 30, 2001 Alex Feldman Initial version.
|
||||
****************************************************************************
|
||||
*/
|
||||
#ifndef __SDLA_TE1_DS_H
|
||||
# define __SDLA_TE1_DS_H
|
||||
|
||||
/******************************************************************************
|
||||
DEFINES AND MACROS
|
||||
******************************************************************************/
|
||||
|
||||
/* Global Register Definitions */
|
||||
#define REG_GTCR1 0xF0
|
||||
|
||||
#define REG_GFCR 0xF1
|
||||
#define BIT_GFCR_TCBCS 0x02
|
||||
#define BIT_GFCR_RCBCS 0x01
|
||||
|
||||
#define REG_GTCR2 0xF2
|
||||
|
||||
#define REG_GTCCR 0xF3
|
||||
|
||||
#define REG_GLSRR 0xF5
|
||||
|
||||
#define REG_GFSRR 0xF6
|
||||
|
||||
#define REG_IDR 0xF8
|
||||
#define DEVICE_ID_DS26519 0xD9
|
||||
#define DEVICE_ID_DS26528 0x0B
|
||||
#define DEVICE_ID_DS26524 0x0C
|
||||
#define DEVICE_ID_DS26522 0x0D
|
||||
#define DEVICE_ID_DS26521 0x0E
|
||||
#define DEVICE_ID_BAD 0x00
|
||||
#define DEVICE_ID_SHIFT 3
|
||||
#define DEVICE_ID_MASK 0x1F
|
||||
#define DEVICE_ID_DS(dev_id) ((dev_id) >> DEVICE_ID_SHIFT) & DEVICE_ID_MASK
|
||||
#define DECODE_CHIPID(chip_id) \
|
||||
(chip_id == DEVICE_ID_DS26519) ? "DS26519" : \
|
||||
(chip_id == DEVICE_ID_DS26528) ? "DS26528" : \
|
||||
(chip_id == DEVICE_ID_DS26524) ? "DS26524" : \
|
||||
(chip_id == DEVICE_ID_DS26522) ? "DS26522" : \
|
||||
(chip_id == DEVICE_ID_DS26521) ? "DS26521" : "Unknown"
|
||||
|
||||
#define REG_GFISR 0xF9
|
||||
|
||||
#define REG_GBISR 0xFA
|
||||
|
||||
#define REG_GLISR 0xFB
|
||||
|
||||
#define REG_GFIMR 0xFC
|
||||
|
||||
#define REG_GBIMR 0xFD
|
||||
|
||||
#define REG_GLIMR 0xFE
|
||||
|
||||
|
||||
/* RX Framer Register Definitions */
|
||||
#define REG_RSIGC 0x13
|
||||
#define BIT_RSIGC_CASMS 0x10
|
||||
|
||||
#define REG_T1RCR2 0x14
|
||||
#define BIT_T1RCR2_RSLC96 0x10
|
||||
#define BIT_T1RCR2_OOF2 0x08
|
||||
#define BIT_T1RCR2_OOF1 0x04
|
||||
#define BIT_T1RCR2_RAIIE 0x02
|
||||
#define BIT_T1RCR2_RD4RM 0x01
|
||||
|
||||
#define REG_E1RSAIMR 0x14
|
||||
#define BIT_E1RSAIMR_Rsa4IM 0x10
|
||||
#define BIT_E1RSAIMR_Rsa5IM 0x08
|
||||
#define BIT_E1RSAIMR_Rsa6IM 0x04
|
||||
#define BIT_E1RSAIMR_Rsa7IM 0x02
|
||||
#define BIT_E1RSAIMR_Rsa8IM 0x01
|
||||
|
||||
#define REG_T1RBOCC 0x15
|
||||
#define BIT_T1RBOCC_RBR 0x80
|
||||
#define BIT_T1RBOCC_RBD1 0x02
|
||||
#define BIT_T1RBOCC_RBD0 0x01
|
||||
#define BIT_T1RBOCC_RBF1 0x04
|
||||
#define BIT_T1RBOCC_RBF0 0x02
|
||||
|
||||
#define REG_RS1 0x40
|
||||
#define BIT_RS_A 0x08
|
||||
#define BIT_RS_B 0x04
|
||||
#define BIT_RS_C 0x02
|
||||
#define BIT_RS_D 0x01
|
||||
#define REG_RS2 0x41
|
||||
#define REG_RS3 0x42
|
||||
#define REG_RS4 0x43
|
||||
#define REG_RS5 0x44
|
||||
#define REG_RS6 0x45
|
||||
#define REG_RS7 0x46
|
||||
#define REG_RS8 0x47
|
||||
#define REG_RS9 0x48
|
||||
#define REG_RS10 0x49
|
||||
#define REG_RS11 0x4A
|
||||
#define REG_RS12 0x4B
|
||||
#define REG_RS13 0x4C
|
||||
#define REG_RS14 0x4D
|
||||
#define REG_RS15 0x4E
|
||||
#define REG_RS16 0x4F
|
||||
|
||||
#define REG_LCVCR1 0x50
|
||||
#define REG_LCVCR2 0x51
|
||||
|
||||
#define REG_PCVCR1 0x52
|
||||
#define REG_PCVCR2 0x53
|
||||
|
||||
#define REG_FOSCR1 0x54
|
||||
#define REG_FOSCR2 0x55
|
||||
|
||||
#define REG_E1EBCR1 0x56
|
||||
#define REG_E1EBCR2 0x57
|
||||
|
||||
#define REG_T1RBOC 0x63
|
||||
|
||||
#define REG_E1RNAF 0x65
|
||||
#define BIT_E1RNAF_A 0x20
|
||||
|
||||
#define REG_SaBITS 0x6E
|
||||
#define BIT_SaBITS_Sa4 0x10
|
||||
#define BIT_SaBITS_Sa5 0x08
|
||||
#define BIT_SaBITS_Sa6 0x04
|
||||
#define BIT_SaBITS_Sa7 0x02
|
||||
#define BIT_SaBITS_Sa8 0x01
|
||||
|
||||
#define REG_Sa6CODE 0x6F
|
||||
|
||||
#define REG_RMMR 0x80
|
||||
#define BIT_RMMR_FRM_EN 0x80
|
||||
#define BIT_RMMR_INIT_DONE 0x40
|
||||
#define BIT_RMMR_SFTRST 0x02
|
||||
#define BIT_RMMR_T1E1 0x01
|
||||
|
||||
#define REG_RCR1 0x81
|
||||
#define BIT_RCR1_T1_SYNCT 0x80
|
||||
#define BIT_RCR1_T1_RB8ZS 0x40
|
||||
#define BIT_RCR1_T1_RFM 0x20
|
||||
#define BIT_RCR1_T1_ARC 0x10
|
||||
#define BIT_RCR1_T1_SYNCC 0x08
|
||||
#define BIT_RCR1_T1_RJC 0x04
|
||||
#define BIT_RCR1_T1_SYNCE 0x02
|
||||
#define BIT_RCR1_T1_RESYNC 0x01
|
||||
#define BIT_RCR1_E1_RHDB3 0x40
|
||||
#define BIT_RCR1_E1_RSIGM 0x20
|
||||
#define BIT_RCR1_E1_RG802 0x10
|
||||
#define BIT_RCR1_E1_RCRC4 0x08
|
||||
#define BIT_RCR1_E1_FRC 0x04
|
||||
#define BIT_RCR1_E1_SYNCE 0x02
|
||||
#define BIT_RCR1_E1_RESYNC 0x01
|
||||
|
||||
#define REG_T1RIBCC 0x82
|
||||
#define BIT_T1RIBCC_RUP2 0x20
|
||||
#define BIT_T1RIBCC_RUP1 0x10
|
||||
#define BIT_T1RIBCC_RUP0 0x08
|
||||
#define BIT_T1RIBCC_RDN2 0x04
|
||||
#define BIT_T1RIBCC_RDN1 0x02
|
||||
#define BIT_T1RIBCC_RDN0 0x01
|
||||
|
||||
#define REG_RCR3 0x83
|
||||
#define BIT_RCR3_IDF 0x80
|
||||
#define BIT_RCR3_RSERC 0x20
|
||||
#define BIT_RCR3_PLB 0x02
|
||||
#define BIT_RCR3_FLB 0x01
|
||||
|
||||
#define REG_RIOCR 0x84
|
||||
#define BIT_RIOCR_RCLKINV 0x80
|
||||
#define BIT_RIOCR_RSYNCINV 0x40
|
||||
#define BIT_RIOCR_H100EN 0x20
|
||||
#define BIT_RIOCR_RSCLKM 0x10
|
||||
#define BIT_RIOCR_RSMS 0x08
|
||||
#define BIT_RIOCR_RSIO 0x04
|
||||
#define BIT_RIOCR_RSMS2 0x02
|
||||
#define BIT_RIOCR_RSMS1 0x01
|
||||
|
||||
#define REG_RESCR 0x85
|
||||
#define BIT_RESCR_RGCLKEN 0x40
|
||||
#define BIT_RESCR_RESE 0x01
|
||||
|
||||
#define REG_ERCNT 0x86
|
||||
#define BIT_ERCNT_1SECS 0x80
|
||||
#define BIT_ERCNT_MCUS 0x40
|
||||
#define BIT_ERCNT_MECU 0x20
|
||||
#define BIT_ERCNT_ECUS 0x10
|
||||
#define BIT_ERCNT_EAMS 0x08
|
||||
#define BIT_ERCNT_FSBE 0x04
|
||||
#define BIT_ERCNT_MOSCR 0x02
|
||||
#define BIT_ERCNT_LCVCRF 0x01
|
||||
|
||||
#define REG_RXPC 0x8A
|
||||
#define BIT_RXPC_RBPDIR 0x04
|
||||
#define BIT_RXPC_RBPFUS 0x02
|
||||
#define BIT_RXPC_RBPEN 0x01
|
||||
|
||||
#define REG_RLS1 0x90
|
||||
#define BIT_RLS1_RRAIC 0x80
|
||||
#define BIT_RLS1_RAISC 0x40
|
||||
#define BIT_RLS1_RLOSC 0x20
|
||||
#define BIT_RLS1_RLOFC 0x10
|
||||
#define BIT_RLS1_RRAID 0x08
|
||||
#define BIT_RLS1_RAISD 0x04
|
||||
#define BIT_RLS1_RLOSD 0x02
|
||||
#define BIT_RLS1_RLOFD 0x01
|
||||
|
||||
#define REG_RLS2 0x91
|
||||
#define BIT_RLS2_T1_RPDV 0x80
|
||||
#define BIT_RLS2_T1_COFA 0x20
|
||||
#define BIT_RLS2_T1_8ZD 0x10
|
||||
#define BIT_RLS2_T1_16ZD 0x08
|
||||
#define BIT_RLS2_T1_SEFE 0x04
|
||||
#define BIT_RLS2_T1_B8ZS 0x02
|
||||
#define BIT_RLS2_T1_FBE 0x01
|
||||
#define BIT_RLS2_E1_CRCRC 0x40
|
||||
#define BIT_RLS2_E1_CASRC 0x20
|
||||
#define BIT_RLS2_E1_FASRC 0x10
|
||||
#define BIT_RLS2_E1_RSA1 0x08
|
||||
#define BIT_RLS2_E1_RSA0 0x04
|
||||
#define BIT_RLS2_E1_RCMF 0x02
|
||||
#define BIT_RLS2_E1_RAF 0x01
|
||||
|
||||
#define REG_RLS3 0x92
|
||||
#define BIT_RLS3_T1_LORCC 0x80
|
||||
#define BIT_RLS3_T1_LSPC 0x40
|
||||
#define BIT_RLS3_T1_LDNC 0x20
|
||||
#define BIT_RLS3_T1_LUPC 0x10
|
||||
#define BIT_RLS3_T1_LORCD 0x08
|
||||
#define BIT_RLS3_T1_LSPD 0x04
|
||||
#define BIT_RLS3_T1_LDND 0x02
|
||||
#define BIT_RLS3_T1_LUPD 0x01
|
||||
#define BIT_RLS3_E1_LORCC 0x80
|
||||
#define BIT_RLS3_E1_V52LNKC 0x20
|
||||
#define BIT_RLS3_E1_RDMAC 0x10
|
||||
#define BIT_RLS3_E1_LORCD 0x08
|
||||
#define BIT_RLS3_E1_V52LNKD 0x02
|
||||
#define BIT_RLS3_E1_RDMAD 0x01
|
||||
|
||||
#define REG_RLS4 0x93
|
||||
#define BIT_RLS4_RESF 0x80
|
||||
#define BIT_RLS4_RESEM 0x40
|
||||
#define BIT_RLS4_RSLIP 0x20
|
||||
#define BIT_RLS4_RSCOS 0x08
|
||||
#define BIT_RLS4_1SEC 0x04
|
||||
#define BIT_RLS4_TIMER 0x02
|
||||
#define BIT_RLS4_RMF 0x01
|
||||
|
||||
#define REG_RLS5 0x94
|
||||
#define BIT_RLS5_ROVR 0x20
|
||||
#define BIT_RLS5_RHOBT 0x10
|
||||
#define BIT_RLS5_RPE 0x08
|
||||
#define BIT_RLS5_RPS 0x03
|
||||
#define BIT_RLS5_RHWMS 0x02
|
||||
#define BIT_RLS5_RNES 0x01
|
||||
|
||||
#define REG_RLS6 0x95
|
||||
|
||||
#define REG_RLS7 0x96
|
||||
#define BIT_RLS7_T1_RRAI_CI 0x20
|
||||
#define BIT_RLS7_T1_RAIS_CI 0x10
|
||||
#define BIT_RLS7_T1_RSLC96 0x08
|
||||
#define BIT_RLS7_T1_RFDLF 0x04
|
||||
#define BIT_RLS7_T1_BC 0x02
|
||||
#define BIT_RLS7_T1_BD 0x01
|
||||
#define BIT_RLS7_E1_Sa6CD 0x02
|
||||
#define BIT_RLS7_E1_SaXCD 0x01
|
||||
|
||||
#define REG_RSS1 0x98
|
||||
#define BIT_RSS1_CH1 0x80
|
||||
#define BIT_RSS1_CH2 0x40
|
||||
#define BIT_RSS1_CH3 0x20
|
||||
#define BIT_RSS1_CH4 0x10
|
||||
#define BIT_RSS1_CH5 0x08
|
||||
#define BIT_RSS1_CH6 0x04
|
||||
#define BIT_RSS1_CH7 0x02
|
||||
#define BIT_RSS1_CH8 0x01
|
||||
|
||||
#define REG_RSS2 0x99
|
||||
#define BIT_RSS2_CH9 0x80
|
||||
#define BIT_RSS2_CH10 0x40
|
||||
#define BIT_RSS2_CH11 0x20
|
||||
#define BIT_RSS2_CH12 0x10
|
||||
#define BIT_RSS2_CH13 0x08
|
||||
#define BIT_RSS2_CH14 0x04
|
||||
#define BIT_RSS2_CH15 0x02
|
||||
#define BIT_RSS2_CH16 0x01
|
||||
|
||||
#define REG_RSS3 0x9A
|
||||
#define BIT_RSS3_CH17 0x80
|
||||
#define BIT_RSS3_CH18 0x40
|
||||
#define BIT_RSS3_CH19 0x20
|
||||
#define BIT_RSS3_CH20 0x10
|
||||
#define BIT_RSS3_CH21 0x08
|
||||
#define BIT_RSS3_CH22 0x04
|
||||
#define BIT_RSS3_CH23 0x02
|
||||
#define BIT_RSS3_CH24 0x01
|
||||
|
||||
#define REG_RSS4 0x9B
|
||||
#define BIT_RSS4_CH25 0x80
|
||||
#define BIT_RSS4_CH26 0x40
|
||||
#define BIT_RSS4_CH27 0x20
|
||||
#define BIT_RSS4_CH28 0x10
|
||||
#define BIT_RSS4_CH29 0x08
|
||||
#define BIT_RSS4_CH30 0x04
|
||||
#define BIT_RSS4_CH31 0x02
|
||||
#define BIT_RSS4_CH32 0x01
|
||||
|
||||
#define REG_T1RSCD1 0x9C
|
||||
#define REG_T1RSCD2 0x9D
|
||||
|
||||
#define REG_RIIR 0x9F
|
||||
#define BIT_RIIR_RLS7 0x40
|
||||
#define BIT_RIIR_RLS6 0x20
|
||||
#define BIT_RIIR_RLS5 0x10
|
||||
#define BIT_RIIR_RLS4 0x08
|
||||
#define BIT_RIIR_RLS3 0x04
|
||||
#define BIT_RIIR_RLS2 0x02
|
||||
#define BIT_RIIR_RLS1 0x01
|
||||
|
||||
#define REG_RIM1 0xA0
|
||||
#define BIT_RIM1_RRAIC 0x80
|
||||
#define BIT_RIM1_RAISC 0x40
|
||||
#define BIT_RIM1_RLOSC 0x20
|
||||
#define BIT_RIM1_RLOFC 0x10
|
||||
#define BIT_RIM1_RRAID 0x08
|
||||
#define BIT_RIM1_RAISD 0x04
|
||||
#define BIT_RIM1_RLOSD 0x02
|
||||
#define BIT_RIM1_RLOFD 0x01
|
||||
|
||||
#define REG_RIM2 0xA1
|
||||
#define BIT_RIM2_E1_RSA1 0x08
|
||||
#define BIT_RIM2_E1_RSA0 0x04
|
||||
#define BIT_RIM2_E1_RCMF 0x02
|
||||
#define BIT_RIM2_E1_RAF 0x01
|
||||
|
||||
#define REG_RIM3 0xA2
|
||||
#define BIT_RIM3_T1_LORCC 0x80
|
||||
#define BIT_RIM3_T1_LSPC 0x40
|
||||
#define BIT_RIM3_T1_LDNC 0x20
|
||||
#define BIT_RIM3_T1_LUPC 0x10
|
||||
#define BIT_RIM3_T1_LORCD 0x08
|
||||
#define BIT_RIM3_T1_LSPD 0x04
|
||||
#define BIT_RIM3_T1_LDND 0x02
|
||||
#define BIT_RIM3_T1_LUPD 0x01
|
||||
#define BIT_RIM3_E1_LORCC 0x80
|
||||
#define BIT_RIM3_E1_V52LNKC 0x20
|
||||
#define BIT_RIM3_E1_RDMAC 0x10
|
||||
#define BIT_RIM3_E1_LORCD 0x08
|
||||
#define BIT_RIM3_E1_V52LNKD 0x02
|
||||
#define BIT_RIM3_E1_RDMAD 0x01
|
||||
|
||||
#define REG_RIM4 0xA3
|
||||
#define BIT_RIM4_RESF 0x80
|
||||
#define BIT_RIM4_RESEM 0x40
|
||||
#define BIT_RIM4_RSLIP 0x20
|
||||
#define BIT_RIM4_RSCOS 0x08
|
||||
#define BIT_RIM4_1SEC 0x04
|
||||
#define BIT_RIM4_TIMER 0x02
|
||||
#define BIT_RIM4_RMF 0x01
|
||||
|
||||
#define REG_RIM5 0xA4
|
||||
#define BIT_RIM5_ROVR 0x20
|
||||
#define BIT_RIM5_RHOBT 0x10
|
||||
#define BIT_RIM5_RPE 0x08
|
||||
#define BIT_RIM5_RPS 0x04
|
||||
#define BIT_RIM5_RHWMS 0x02
|
||||
#define BIT_RIM5_RNES 0x01
|
||||
|
||||
#define REG_RIM7 0xA6
|
||||
#define BIT_RIM7_T1_RSLC96 0x08
|
||||
#define BIT_RIM7_T1_RFDLF 0x04
|
||||
#define BIT_RIM7_T1_BC 0x02
|
||||
#define BIT_RIM7_T1_BD 0x01
|
||||
|
||||
#define REG_RSCSE1 0xA8
|
||||
#define BITS_RSCSE1_ALL 0xFF
|
||||
#define BIT_RSCSE1_CH1 0x80
|
||||
#define BIT_RSCSE1_CH2 0x40
|
||||
#define BIT_RSCSE1_CH3 0x20
|
||||
#define BIT_RSCSE1_CH4 0x10
|
||||
#define BIT_RSCSE1_CH5 0x08
|
||||
#define BIT_RSCSE1_CH6 0x04
|
||||
#define BIT_RSCSE1_CH7 0x02
|
||||
#define BIT_RSCSE1_CH8 0x01
|
||||
|
||||
#define REG_RSCSE2 0xA9
|
||||
#define BITS_RSCSE2_ALL 0xFF
|
||||
#define BIT_RSCSE2_CH9 0x80
|
||||
#define BIT_RSCSE2_CH10 0x40
|
||||
#define BIT_RSCSE2_CH11 0x20
|
||||
#define BIT_RSCSE2_CH12 0x10
|
||||
#define BIT_RSCSE2_CH13 0x08
|
||||
#define BIT_RSCSE2_CH14 0x04
|
||||
#define BIT_RSCSE2_CH15 0x02
|
||||
#define BIT_RSCSE2_CH16 0x01
|
||||
|
||||
#define REG_RSCSE3 0xAA
|
||||
#define BITS_RSCSE3_ALL 0xFF
|
||||
#define BIT_RSCSE3_CH17 0x80
|
||||
#define BIT_RSCSE3_CH18 0x40
|
||||
#define BIT_RSCSE3_CH19 0x20
|
||||
#define BIT_RSCSE3_CH20 0x10
|
||||
#define BIT_RSCSE3_CH21 0x08
|
||||
#define BIT_RSCSE3_CH22 0x04
|
||||
#define BIT_RSCSE3_CH23 0x02
|
||||
#define BIT_RSCSE3_CH24 0x01
|
||||
|
||||
#define REG_RSCSE4 0xAB
|
||||
#define BITS_RSCSE4_ALL 0xFF
|
||||
#define BIT_RSCSE4_CH25 0x80
|
||||
#define BIT_RSCSE4_CH26 0x40
|
||||
#define BIT_RSCSE4_CH27 0x20
|
||||
#define BIT_RSCSE4_CH28 0x10
|
||||
#define BIT_RSCSE4_CH29 0x08
|
||||
#define BIT_RSCSE4_CH30 0x04
|
||||
#define BIT_RSCSE4_CH31 0x02
|
||||
#define BIT_RSCSE4_CH32 0x01
|
||||
|
||||
#define REG_T1RUPCD1 0xAC
|
||||
#define REG_T1RUPCD2 0xAD
|
||||
#define REG_T1RDNCD1 0xAE
|
||||
#define REG_T1RNDCD2 0xAF
|
||||
|
||||
#define REG_RRTS1 0xB0
|
||||
#define BIT_RRTS1_RRAI 0x08
|
||||
#define BIT_RRTS1_RAIS 0x04
|
||||
#define BIT_RRTS1_RLOS 0x02
|
||||
#define BIT_RRTS1_RLOF 0x01
|
||||
|
||||
#define REG_RRTS3 0xB2
|
||||
#define BIT_RRTS3_T1_LORC 0x08
|
||||
#define BIT_RRTS3_T1_LSP 0x08
|
||||
#define BIT_RRTS3_T1_LDN 0x02
|
||||
#define BIT_RRTS3_T1_LUP 0x01
|
||||
#define BIT_RRTS3_E1_LORC 0x08
|
||||
#define BIT_RRTS3_E1_V52LNK 0x02
|
||||
#define BIT_RRTS3_E1_RDMA 0x01
|
||||
|
||||
#define REG_RGCCS1 0xCC
|
||||
#define REG_RGCCS2 0xCD
|
||||
#define REG_RGCCS3 0xCE
|
||||
#define REG_RGCCS4 0xCF
|
||||
|
||||
#define REG_RCICE1 0xD0
|
||||
#define REG_RCICE2 0xD1
|
||||
#define REG_RCICE3 0xD2
|
||||
#define REG_RCICE4 0xD3
|
||||
|
||||
#define REG_RBPCS1 0xD4
|
||||
#define REG_RBPCS2 0xD5
|
||||
#define REG_RBPCS3 0xD6
|
||||
#define REG_RBPCS4 0xD7
|
||||
|
||||
/* TX Framer Register Definitions */
|
||||
#define REG_THC2 0x113
|
||||
#define BIT_THC2_TABT 0x80
|
||||
#define BIT_THC2_SBOC 0x40
|
||||
#define BIT_THC2_THCEN 0x20
|
||||
#define BIT_THC2_THCS4 0x10
|
||||
#define BIT_THC2_THCS3 0x08
|
||||
#define BIT_THC2_THCS2 0x04
|
||||
#define BIT_THC2_THCS1 0x02
|
||||
#define BIT_THC2_THCS0 0x01
|
||||
|
||||
#define REG_E1TSACR 0x114
|
||||
#define BIT_E1TSACR_SiAF 0x80
|
||||
#define BIT_E1TSACR_SiNAF 0x40
|
||||
#define BIT_E1TSACR_RA 0x20
|
||||
#define BIT_E1TSACR_Sa4 0x10
|
||||
#define BIT_E1TSACR_Sa5 0x08
|
||||
#define BIT_E1TSACR_Sa6 0x04
|
||||
#define BIT_E1TSACR_Sa7 0x02
|
||||
#define BIT_E1TSACR_Sa8 0x01
|
||||
|
||||
#define REG_SSIE1 0x118
|
||||
#define BITS_SSIE1_ALL 0xFF
|
||||
#define BIT_SSIE1_CH1 0x80
|
||||
#define BIT_SSIE1_CH2 0x40
|
||||
#define BIT_SSIE1_CH3 0x20
|
||||
#define BIT_SSIE1_CH4 0x10
|
||||
#define BIT_SSIE1_CH5 0x08
|
||||
#define BIT_SSIE1_CH6 0x04
|
||||
#define BIT_SSIE1_CH7 0x02
|
||||
#define BIT_SSIE1_CH8 0x01
|
||||
|
||||
#define REG_SSIE2 0x119
|
||||
#define BITS_SSIE2_ALL 0xFF
|
||||
#define BIT_SSIE2_CH9 0x80
|
||||
#define BIT_SSIE2_CH10 0x40
|
||||
#define BIT_SSIE2_CH11 0x20
|
||||
#define BIT_SSIE2_CH12 0x10
|
||||
#define BIT_SSIE2_CH13 0x08
|
||||
#define BIT_SSIE2_CH14 0x04
|
||||
#define BIT_SSIE2_CH15 0x02
|
||||
#define BIT_SSIE2_CH16 0x01
|
||||
|
||||
#define REG_SSIE3 0x11A
|
||||
#define BITS_SSIE3_ALL 0xFF
|
||||
#define BIT_SSIE3_CH17 0x80
|
||||
#define BIT_SSIE3_CH18 0x40
|
||||
#define BIT_SSIE3_CH19 0x20
|
||||
#define BIT_SSIE3_CH20 0x10
|
||||
#define BIT_SSIE3_CH21 0x08
|
||||
#define BIT_SSIE3_CH22 0x04
|
||||
#define BIT_SSIE3_CH23 0x02
|
||||
#define BIT_SSIE3_CH24 0x01
|
||||
|
||||
#define REG_SSIE4 0x11B
|
||||
#define BITS_SSIE4_ALL 0xFF
|
||||
#define BIT_SSIE4_CH25 0x80
|
||||
#define BIT_SSIE4_CH26 0x40
|
||||
#define BIT_SSIE4_CH27 0x20
|
||||
#define BIT_SSIE4_CH28 0x10
|
||||
#define BIT_SSIE4_CH29 0x08
|
||||
#define BIT_SSIE4_CH30 0x04
|
||||
#define BIT_SSIE4_CH31 0x02
|
||||
#define BIT_SSIE4_CH32 0x01
|
||||
|
||||
#define REG_TS1 0x140
|
||||
#define BIT_TS_A 0x08
|
||||
#define BIT_TS_B 0x04
|
||||
#define BIT_TS_C 0x02
|
||||
#define BIT_TS_D 0x01
|
||||
#define REG_TS2 0x141
|
||||
#define REG_TS3 0x142
|
||||
#define REG_TS4 0x143
|
||||
#define REG_TS5 0x144
|
||||
#define REG_TS6 0x145
|
||||
#define REG_TS7 0x146
|
||||
#define REG_TS8 0x147
|
||||
#define REG_TS9 0x148
|
||||
#define REG_TS10 0x149
|
||||
#define REG_TS11 0x14A
|
||||
#define REG_TS12 0x14B
|
||||
#define REG_TS13 0x14C
|
||||
#define REG_TS14 0x14D
|
||||
#define REG_TS15 0x14E
|
||||
#define REG_TS16 0x14F
|
||||
|
||||
#define REG_TCICE1 0x150
|
||||
#define REG_TCICE2 0x151
|
||||
#define REG_TCICE3 0x152
|
||||
#define REG_TCICE4 0x153
|
||||
|
||||
#define REG_T1TFDL 0x162
|
||||
|
||||
#define REG_T1TBOC 0x163
|
||||
|
||||
#define REG_E1TAF 0x164
|
||||
|
||||
#define REG_E1TNAF 0x165
|
||||
#define BIT_E1TNAF_A 0x20
|
||||
|
||||
#define REG_E1TSa4 0x169
|
||||
#define REG_E1TSa5 0x16A
|
||||
#define REG_E1TSa6 0x16B
|
||||
#define REG_E1TSa7 0x16C
|
||||
#define REG_E1TSa8 0x16D
|
||||
|
||||
#define REG_TMMR 0x180
|
||||
#define BIT_TMMR_FRM_EN 0x80
|
||||
#define BIT_TMMR_INIT_DONE 0x40
|
||||
#define BIT_TMMR_SFTRST 0x02
|
||||
#define BIT_TMMR_T1E1 0x01
|
||||
|
||||
#define REG_TCR1 0x181
|
||||
#define BIT_TCR1_T1_TJC 0x80
|
||||
#define BIT_TCR1_T1_TFPT 0x40
|
||||
#define BIT_TCR1_T1_TCPT 0x20
|
||||
#define BIT_TCR1_T1_TSSE 0x10
|
||||
#define BIT_TCR1_T1_GB7S 0x08
|
||||
#define BIT_TCR1_T1_TB8ZS 0x04
|
||||
#define BIT_TCR1_T1_TAIS 0x02
|
||||
#define BIT_TCR1_T1_TRAI 0x01
|
||||
#define BIT_TCR1_E1_TTPT 0x80
|
||||
#define BIT_TCR1_E1_T16S 0x40
|
||||
#define BIT_TCR1_E1_TG802 0x20
|
||||
#define BIT_TCR1_E1_TSiS 0x10
|
||||
#define BIT_TCR1_E1_TSA1 0x08
|
||||
#define BIT_TCR1_E1_THDB3 0x04
|
||||
#define BIT_TCR1_E1_TAIS 0x02
|
||||
#define BIT_TCR1_E1_TCRC4 0x01
|
||||
|
||||
#define REG_TCR2 0x182
|
||||
#define BIT_TCR2_T1_TFDLS 0x80
|
||||
#define BIT_TCR2_T1_TSLC96 0x40
|
||||
#define BIT_TCR2_T1_TD4RM 0x04
|
||||
#define BIT_TCR2_E1_AEBE 0x80 /* EBIT */
|
||||
#define BIT_TCR2_E1_ARA 0x20
|
||||
#define BIT_TCR2_T1_TCR2_PDE 0x02
|
||||
|
||||
#define REG_TCR3 0x183
|
||||
#define BIT_TCR3_ODF 0x80
|
||||
#define BIT_TCR3_ODM 0x40
|
||||
#define BIT_TCR3_TCSS1 0x20
|
||||
#define BIT_TCR3_TCSS0 0x10
|
||||
#define BIT_TCR3_MFRS 0x08
|
||||
#define BIT_TCR3_TFM 0x04
|
||||
#define BIT_TCR3_IBPV 0x02
|
||||
#define BIT_TCR3_TLOOP 0x01
|
||||
|
||||
#define REG_TIOCR 0x184
|
||||
#define BIT_TIOCR_TCLKINV 0x80
|
||||
#define BIT_TIOCR_TSYNCINV 0x40
|
||||
#define BIT_TIOCR_TSSYNCINV 0x20
|
||||
#define BIT_TIOCR_TSCLKM 0x10
|
||||
#define BIT_TIOCR_TSSM 0x08
|
||||
#define BIT_TIOCR_TSIO 0x04
|
||||
#define BIT_TIOCR_TSDW 0x02
|
||||
#define BIT_TIOCR_TSM 0x01
|
||||
|
||||
#define REG_TESCR 0x185
|
||||
#define BIT_TESCR_TDATFMT 0x80
|
||||
#define BIT_TESCR_TGPCKEN 0x40
|
||||
#define BIT_TESCR_TESE 0x01
|
||||
|
||||
#define REG_TCR4 0x186
|
||||
#define BIT_TCR4_TRAIM 0x08
|
||||
#define BIT_TCR4_TAISM 0x04
|
||||
#define BIT_TCR4_TC1 0x02
|
||||
#define BIT_TCR4_TC0 0x01
|
||||
#define BITS_TCR4_CL_ENCODE(len) \
|
||||
((len)==6 || (len)==3) ? BIT_TCR4_TC0 : \
|
||||
((len)==7) ? BIT_TCR4_TC1 : \
|
||||
((len)==5) ? 0x00 : (BIT_TCR4_TC1|BIT_TCR4_TC0)
|
||||
|
||||
|
||||
|
||||
|
||||
#define REG_TXPC 0x18A
|
||||
#define BIT_TXPC_TBPDIR 0x04
|
||||
#define BIT_TXPC_TBPFUS 0x02
|
||||
#define BIT_TXPC_TBPEN 0x01
|
||||
|
||||
#define REG_TLS1 0x190
|
||||
#define BIT_TLS1_TPDV 0x08
|
||||
#define BIT_TLS1_TMF 0x04
|
||||
#define BIT_TLS1_LOTCC 0x02
|
||||
#define BIT_TLS1_LOTC 0x01
|
||||
|
||||
#define REG_TLS2 0x191
|
||||
#define REG_TLS3 0x192
|
||||
|
||||
#define REG_TIIR 0x19F
|
||||
#define BIT_TIIR_TLS3 0x04
|
||||
#define BIT_TIIR_TLS2 0x02
|
||||
#define BIT_TIIR_TLS1 0x01
|
||||
|
||||
#define REG_TIM1 0x1A0
|
||||
#define REG_TIM2 0x1A1
|
||||
#define REG_TIM3 0x1A2
|
||||
|
||||
#define REG_T1TCD1 0x1AC
|
||||
#define REG_T1TCD2 0x1AD
|
||||
|
||||
#define REG_TGCCS1 0x1CC
|
||||
#define REG_TGCCS2 0x1CD
|
||||
#define REG_TGCCS3 0x1CE
|
||||
#define REG_TGCCS4 0x1CF
|
||||
|
||||
#define REG_PCL1 0x1D0
|
||||
#define REG_PCL2 0x1D1
|
||||
#define REG_PCL3 0x1D2
|
||||
#define REG_PCL4 0x1D3
|
||||
|
||||
#define REG_TBPCS1 0x1D4
|
||||
#define REG_TBPCS2 0x1D5
|
||||
#define REG_TBPCS3 0x1D6
|
||||
#define REG_TBPCS4 0x1D7
|
||||
|
||||
/* LIU Register Definitions */
|
||||
#define REG_LTRCR 0x1000
|
||||
#define BIT_LTRCR_JADS 0x10
|
||||
#define BIT_LTRCR_JAPS1 0x08
|
||||
#define BIT_LTRCR_JAPS0 0x04
|
||||
#define BIT_LTRCR_T1J1E1S 0x02
|
||||
#define BIT_LTRCR_LSC 0x01
|
||||
|
||||
#define REG_LTITSR 0x1001
|
||||
#define BIT_LTITSR_TIMPTOFF 0x40
|
||||
#define BIT_LTITSR_TIMPL1 0x20
|
||||
#define BIT_LTITSR_TIMPL0 0x10
|
||||
#define BIT_LTITSR_L2 0x04
|
||||
#define BIT_LTITSR_L1 0x02
|
||||
#define BIT_LTITSR_L0 0x01
|
||||
|
||||
#define REG_LMCR 0x1002
|
||||
#define BIT_LMCR_TAIS 0x80
|
||||
#define BIT_LMCR_ATAIS 0x40
|
||||
#define BIT_LMCR_LLB 0x20
|
||||
#define BIT_LMCR_ALB 0x10
|
||||
#define BIT_LMCR_RLB 0x08
|
||||
#define BIT_LMCR_TPDE 0x04
|
||||
#define BIT_LMCR_RPLDE 0x02
|
||||
#define BIT_LMCR_TE 0x01
|
||||
|
||||
#define REG_LRSR 0x1003
|
||||
#define BIT_LRSR_OEQ 0x20
|
||||
#define BIT_LRSR_UEQ 0x10
|
||||
#define BIT_LRSR_SCS 0x04
|
||||
#define BIT_LRSR_OCS 0x02
|
||||
#define BIT_LRSR_LOSS 0x01
|
||||
|
||||
#define REG_LSIMR 0x1004
|
||||
#define BIT_LSIMR_JALTCIM 0x80
|
||||
#define BIT_LSIMR_OCCIM 0x40
|
||||
#define BIT_LSIMR_SCCIM 0x20
|
||||
#define BIT_LSIMR_LOSCIM 0x10
|
||||
#define BIT_LSIMR_JALTSIM 0x08
|
||||
#define BIT_LSIMR_OCDIM 0x04
|
||||
#define BIT_LSIMR_SCDIM 0x02
|
||||
#define BIT_LSIMR_LOSDIM 0x01
|
||||
|
||||
#define REG_LLSR 0x1005
|
||||
#define BIT_LLSR_JALTC 0x80
|
||||
#define BIT_LLSR_OCC 0x40
|
||||
#define BIT_LLSR_SCC 0x20
|
||||
#define BIT_LLSR_LOSC 0x10
|
||||
#define BIT_LLSR_JALTS 0x08
|
||||
#define BIT_LLSR_OCD 0x04
|
||||
#define BIT_LLSR_SCD 0x03
|
||||
#define BIT_LLSR_LOSD 0x01
|
||||
|
||||
#define REG_LRSL 0x1006
|
||||
#define REG_LRSL_SHIFT 4
|
||||
#define REG_LRSL_MASK 0x0F
|
||||
#define BIT_LRSL_RSL3 0x80
|
||||
#define BIT_LRSL_RSL2 0x40
|
||||
#define BIT_LRSL_RSL1 0x20
|
||||
#define BIT_LRSL_RSL0 0x10
|
||||
|
||||
#define REG_LRISMR 0x1007
|
||||
#define BIT_LRISMR_RG703 0x80
|
||||
#define BIT_LRISMR_RIMPOFF 0x40
|
||||
#define BIT_LRISMR_RIMPM1 0x20
|
||||
#define BIT_LRISMR_RIMPM0 0x10
|
||||
#define BIT_LRISMR_RTR 0x08
|
||||
#define BIT_LRISMR_RMONEN 0x04
|
||||
#define BIT_LRISMR_RSMS1 0x02
|
||||
#define BIT_LRISMR_RSMS0 0x01
|
||||
|
||||
|
||||
#define REG_LRISMR_TAP 0x1007
|
||||
#define BIT_LRISMR_TAP_REXTON 0x80
|
||||
#define BIT_LRISMR_TAP_RIMPON 0x40
|
||||
#define BIT_LRISMR_TAP_RIMPM2 0x04
|
||||
#define BIT_LRISMR_TAP_RIMPM1 0x02
|
||||
#define BIT_LRISMR_TAP_RIMPM0 0x01
|
||||
|
||||
|
||||
#define REG_LRCR_TAP 0x1008
|
||||
#define BIT_LRCR_TAP_RG703 0x80
|
||||
#define BIT_LRCR_TAP_RTR 0x08
|
||||
#define BIT_LRCR_TAP_RMONEN 0x04
|
||||
#define BIT_LRCR_TAP_RSMS1 0x02
|
||||
#define BIT_LRCR_TAP_RSMS0 0x01
|
||||
|
||||
|
||||
|
||||
#define REG_LTXLAE 0x100C
|
||||
|
||||
/* BERT Register Definitions */
|
||||
#define REG_BAWC 0x1100
|
||||
|
||||
#define REG_BRP1 0x1101
|
||||
#define REG_BRP2 0x1102
|
||||
#define REG_BRP3 0x1103
|
||||
#define REG_BRP4 0x1104
|
||||
|
||||
#define REG_BC1 0x1105
|
||||
#define BIT_BC1_TC 0x80
|
||||
#define BIT_BC1_TINV 0x40
|
||||
#define BIT_BC1_RINV 0x20
|
||||
#define BIT_BC1_PS2 0x10
|
||||
#define BIT_BC1_PS1 0x08
|
||||
#define BIT_BC1_PS0 0x04
|
||||
#define BIT_BC1_LC 0x02
|
||||
#define BIT_BC1_RESYNC 0x01
|
||||
|
||||
#define REG_BC2 0x1106
|
||||
#define BIT_BC2_EIB2 0x80
|
||||
#define BIT_BC2_EIB1 0x40
|
||||
#define BIT_BC2_EIB0 0x20
|
||||
#define BIT_BC2_SBE 0x10
|
||||
#define BIT_BC2_RPL3 0x08
|
||||
#define BIT_BC2_RPL2 0x04
|
||||
#define BIT_BC2_RPL1 0x02
|
||||
#define BIT_BC2_RPL0 0x01
|
||||
|
||||
#define REG_BBC1 0x1107
|
||||
#define REG_BBC2 0x1108
|
||||
#define REG_BBC3 0x1109
|
||||
#define REG_BBC4 0x110A
|
||||
|
||||
#define REG_BEC1 0x110B
|
||||
#define REG_BEC2 0x110C
|
||||
#define REG_BEC3 0x110D
|
||||
|
||||
#define REG_BLSR 0x110E
|
||||
#define BIT_BLSR_BBED 0x40
|
||||
#define BIT_BLSR_BBCO 0x20
|
||||
#define BIT_BLSR_BECO 0x10
|
||||
#define BIT_BLSR_BRA1 0x08
|
||||
#define BIT_BLSR_BRA0 0x04
|
||||
#define BIT_BLSR_BRLOS 0x02
|
||||
#define BIT_BLSR_BSYNC 0x01
|
||||
|
||||
#define REG_BSIM 0x110F
|
||||
#define BIT_BSIM_BBED 0x40
|
||||
#define BIT_BSIM_BBCO 0x20
|
||||
#define BIT_BSIM_BECO 0x10
|
||||
#define BIT_BSIM_BRA1 0x08
|
||||
#define BIT_BSIM_BRA0 0x04
|
||||
#define BIT_BSIM_BRLOS 0x02
|
||||
#define BIT_BSIM_BSYNC 0x01
|
||||
|
||||
#define REG_BLSR 0x110E
|
||||
#define BIT_BLSR_BBED 0x40
|
||||
#define BIT_BLSR_BBCO 0x20
|
||||
#define BIT_BLSR_BECO 0x10
|
||||
#define BIT_BLSR_BRA1 0x08
|
||||
#define BIT_BLSR_BRA0 0x04
|
||||
#define BIT_BLSR_BRLOS 0x02
|
||||
#define BIT_BLSR_BSYNC 0x01
|
||||
|
||||
#endif /* __SDLA_TE1_DS_H */
|
|
@ -0,0 +1,779 @@
|
|||
/*
|
||||
* Copyright (c) 2001
|
||||
* Alex Feldman <al.feldman@sangoma.com>. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Alex Feldman.
|
||||
* 4. Neither the name of the author nor the names of any co-contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Alex Feldman AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL Alex Feldman OR THE VOICES IN HIS HEAD
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: sdla_te1_pmc.h,v 1.4 2007-04-25 21:23:03 sangoma Exp $
|
||||
*/
|
||||
|
||||
/*****************************************************************************
|
||||
* sdla_te1_pmc.h Sangoma TE1 configuration definitions (PMC).
|
||||
*
|
||||
* Author: Alex Feldman
|
||||
*
|
||||
* ============================================================================
|
||||
* Aprl 30, 2001 Alex Feldman Initial version.
|
||||
****************************************************************************
|
||||
*/
|
||||
#ifndef __SDLA_TE1_PMC_H
|
||||
# define __SDLA_TE1_PMC_H
|
||||
|
||||
/*
|
||||
******************************************************************************
|
||||
DEFINES AND MACROS
|
||||
******************************************************************************
|
||||
*/
|
||||
#define PMC4_LINE_DELTA 0x100
|
||||
|
||||
#define REG_GLOBAL_CFG 0x00
|
||||
#define BIT_GLOBAL_PIO_OE 0x80
|
||||
#define BIT_GLOBAL_PIO 0x40
|
||||
#define BIT_GLOBAL_TRKEN 0x04
|
||||
#define BIT_GLOBAL_E1 0x01
|
||||
|
||||
#define REG_RECEIVE_OPT 0x02
|
||||
#define BIT_RECEIVE_OPT_UNF 0x40
|
||||
#define BIT_RECEIVE_OPT_RXELSTBYP 0x20
|
||||
|
||||
#define REG_TX_LINE_CONF 0x04
|
||||
#define BIT_TX_LINE_CONF_TJATBYP 0x80
|
||||
#define BIT_TX_LINE_CONF_TAISEN 0x40
|
||||
#define BIT_TX_LINE_CONF_TAUXP 0x20
|
||||
|
||||
#define REG_TX_TIMING_OPT 0x06
|
||||
#define BIT_TX_PLLREF1 0x08
|
||||
#define BIT_TX_PLLREF0 0x04
|
||||
#define BIT_TX_TXELSTBYP 0x01
|
||||
|
||||
#define REG_MASTER_DIAG 0x0A
|
||||
#define BIT_MASTER_DIAG_PAYLB 0x20
|
||||
#define BIT_MASTER_DIAG_LINELB 0x10
|
||||
#define BIT_MASTER_DIAG_DDLB 0x04
|
||||
|
||||
#define REG_REVISION_CHIP_ID 0x0D
|
||||
#define MASK_CHIP_ID 0xE0
|
||||
#define CHIP_ID_COMET_QUAD 0x40
|
||||
#define CHIP_ID_COMET 0x20
|
||||
#define DECODE_CHIPID(chip_id) \
|
||||
(chip_id == CHIP_ID_COMET_QUAD) ? "COMET-QUAD" : \
|
||||
(chip_id == CHIP_ID_COMET) ? "COMET" : "Unknown"
|
||||
|
||||
#define REG_RESET 0x0E
|
||||
#define BIT_RESET 0x01
|
||||
|
||||
#define REG_PRGD_CTRL 0x0F
|
||||
#define BIT_PRGD_CTRL_HDLC3 0x80
|
||||
#define BIT_PRGD_CTRL_HDLC2 0x40
|
||||
#define BIT_PRGD_CTRL_HDLC1 0x20
|
||||
#define BIT_PRGD_CTRL_Nx56k_GEN 0x10
|
||||
#define BIT_PRGD_CTRL_Nx56k_DET 0x08
|
||||
#define BIT_PRGD_CTRL_RXPATGEN 0x04
|
||||
#define BIT_PRGD_CTRL_UNF_GEN 0x02
|
||||
#define BIT_PRGD_CTRL_UNF_DET 0x01
|
||||
|
||||
#define REG_CDRC_CFG 0x10
|
||||
#define BIT_CDRC_CFG_AMI 0x80
|
||||
#define BIT_CDRC_CFG_LOS1 0x40
|
||||
#define BIT_CDRC_CFG_LOS0 0x20
|
||||
|
||||
#define REG_CDRC_INT_STATUS 0x12
|
||||
#define BIT_CDRC_INT_STATUS_LCVI 0x80
|
||||
#define BIT_CDRC_INT_STATUS_LOSI 0x40
|
||||
#define BIT_CDRC_INT_STATUS_LCSDI 0x20
|
||||
#define BIT_CDRC_INT_STATUS_ZNDI 0x10
|
||||
#define BIT_CDRC_INT_STATUS_LOSV 0x01
|
||||
|
||||
#define REG_ALTLOS_STATUS 0x13
|
||||
#define BIT_ALTLOS_STATUS_ALTLOSE 0x80
|
||||
#define BIT_ALTLOS_STATUS_ALTLOSI 0x40
|
||||
#define BIT_ALTLOS_STATUS_ALTLOS 0x01
|
||||
|
||||
#define REG_RJAT_CFG 0x17
|
||||
#define BIT_RJAT_CENT 0x10
|
||||
|
||||
#define REG_TJAT_CFG 0x1B
|
||||
#define BIT_TJAT_CENT 0x10
|
||||
|
||||
#define REG_RX_ELST_CFG 0x1C
|
||||
#define MASK_RX_ELST_CFG 0x03
|
||||
#define BIT_RX_ELST_IR 0x02
|
||||
#define BIT_RX_ELST_OR 0x01
|
||||
|
||||
#define REG_TX_ELST_CFG 0x20
|
||||
#define MASK_TX_ELST_CFG 0x03
|
||||
#define BIT_TX_ELST_IR 0x02
|
||||
#define BIT_TX_ELST_OR 0x01
|
||||
|
||||
#define REG_BRIF_CFG 0x30
|
||||
#define BIT_BRIF_NXDS0_1 0x80
|
||||
#define BIT_BRIF_NXDS0_0 0x40
|
||||
#define BIT_BRIF_CMODE 0x20
|
||||
#define BIT_BRIF_DE 0x10
|
||||
#define BIT_BRIF_FE 0x08
|
||||
#define BIT_BRIF_CMS 0x04
|
||||
#define BIT_BRIF_RATE1 0x02
|
||||
#define BIT_BRIF_RATE0 0x01
|
||||
|
||||
#define REG_BRIF_FR_PULSE_CFG 0x31
|
||||
#define BIT_BRIF_FPMODE 0x20
|
||||
#define BIT_BRIF_ROHM 0x08
|
||||
|
||||
#define REG_BRIF_DATA_CFG 0x32
|
||||
#define BIT_BRIF_DATA_TRI_0 0x01 /* PMC4351 */
|
||||
#define BIT_BRIF_DATA_TRI 0x01 /* PMC4354 */
|
||||
|
||||
#define REG_BTIF_CFG 0x40
|
||||
#define BIT_BTIF_NXDS0_1 0x80
|
||||
#define BIT_BTIF_NXDS0_0 0x40
|
||||
#define BIT_BTIF_CMODE 0x20
|
||||
#define BIT_BTIF_DE 0x10
|
||||
#define BIT_BTIF_FE 0x08
|
||||
#define BIT_BTIF_RATE0 0x01
|
||||
|
||||
#define REG_BTIF_FR_PULSE_CFG 0x41
|
||||
#define BIT_BTIF_FPMODE 0x01
|
||||
|
||||
#define REG_BTIF_CFG_STATUS 0x42
|
||||
#define BIT_BTIF_CFG_STATUS_TPTYP 0x80
|
||||
#define BIT_BTIF_CFG_STATUS_TPTYE 0x40
|
||||
#define BIT_BTIF_CFG_STATUS_TDI 0x20
|
||||
#define BIT_BTIF_CFG_STATUS_TSIGI 0x10
|
||||
#define BIT_BTIF_CFG_STATUS_PTY_EXTD 0x08
|
||||
|
||||
#define REG_BTIF_BIT_OFF 0x44
|
||||
#define BIT_BTIF_BIT_OFF_BOFF_EN 0x08
|
||||
#define BIT_BTIF_BIT_OFF_BOFF_2 0x04
|
||||
#define BIT_BTIF_BIT_OFF_BOFF_1 0x02
|
||||
#define BIT_BTIF_BIT_OFF_BOFF_0 0x01
|
||||
|
||||
#define REG_T1_FRMR_CFG 0x48
|
||||
#define BIT_T1_FRMR_ESF 0x20
|
||||
#define BIT_T1_FRMR_ESFFA 0x10
|
||||
#define BIT_T1_FRMR_FMS1 0x08
|
||||
#define BIT_T1_FRMR_FMS0 0x04
|
||||
#define BIT_T1_FRMR_JPN 0x02
|
||||
|
||||
#define REG_SIGX_CFG 0x50
|
||||
#define BIT_SIGX_ESF 0x04
|
||||
#define BIT_SIGX_IND 0x02
|
||||
#define BIT_SIGX_PCCE 0x01
|
||||
#define BIT_SIGX_SIGE 0x20
|
||||
#define BIT_SIGX_COSS 0x40
|
||||
#define REG_SIGX_CHG_30_25 0x50
|
||||
#define MASK_SIGX_COSS_30_25 0x3F
|
||||
#define REG_SIGX_CHG_24_17 0x51
|
||||
#define REG_SIGX_CHG_16_9 0x52
|
||||
#define REG_SIGX_CHG_8_1 0x53
|
||||
|
||||
#define REG_SIGX_TIMESLOT_IND_STATUS 0x51
|
||||
#define BIT_SIGX_BUSY 0x80
|
||||
#define REG_SIGX_TIMESLOT_IND_ACCESS 0x52
|
||||
#define BIT_SIGX_TS_IND_ACCESS_READ 0x80
|
||||
#define REG_SIGX_TIMESLOT_IND_DATA_BUFFER 0x53
|
||||
|
||||
#define REG_SIGX_CURRENT 0x10
|
||||
#define BIT_SIGX_CURRENT_A_N 0x80
|
||||
#define BIT_SIGX_CURRENT_B_N 0x40
|
||||
#define BIT_SIGX_CURRENT_C_N 0x20
|
||||
#define BIT_SIGX_CURRENT_D_N 0x10
|
||||
#define BIT_SIGX_CURRENT_A_N16 0x08
|
||||
#define BIT_SIGX_CURRENT_B_N16 0x04
|
||||
#define BIT_SIGX_CURRENT_C_N16 0x02
|
||||
#define BIT_SIGX_CURRENT_D_N16 0x01
|
||||
#define BIT_SIGX_A 0x08
|
||||
#define BIT_SIGX_B 0x04
|
||||
#define BIT_SIGX_C 0x02
|
||||
#define BIT_SIGX_D 0x01
|
||||
|
||||
#define REG_SIGX_DELAYED_SIGDATA 0x20
|
||||
#define BIT_SIGX_DELAYED_SIGDATA_A 0x08
|
||||
#define BIT_SIGX_DELAYED_SIGDATA_B 0x04
|
||||
#define BIT_SIGX_DELAYED_SIGDATA_C 0x02
|
||||
#define BIT_SIGX_DELAYED_SIGDATA_D 0x01
|
||||
|
||||
#define REG_SIGX_CHANCFG 0x40
|
||||
#define BIT_SIGX_CHANCFG_RINV1 0x08
|
||||
#define BIT_SIGX_CHANCFG_RINV0 0x04
|
||||
#define BIT_SIGX_CHANCFG_RFIX 0x04
|
||||
#define BIT_SIGX_CHANCFG_RPOL 0x02
|
||||
#define BIT_SIGX_CHANCFG_RDEBE 0x01
|
||||
|
||||
#define REG_T1_XBAS_CFG 0x54
|
||||
#define BIT_T1_XBAS_JPN 0x40
|
||||
#define BIT_T1_XBAS_B8ZS 0x20
|
||||
#define BIT_T1_XBAS_ESF 0x10
|
||||
#define BIT_T1_XBAS_FMS1 0x08
|
||||
#define BIT_T1_XBAS_FMS0 0x04
|
||||
#define BIT_T1_XBAS_ZCS1 0x02
|
||||
#define BIT_T1_XBAS_ZCS0 0x01
|
||||
|
||||
#define REG_T1_XBAS_ALARM_TX 0x55
|
||||
#define BIT_T1_XBAS_ALARM_TX_XYEL 0x02
|
||||
#define BIT_T1_XBAS_ALARM_TX_XAIS 0x01
|
||||
|
||||
/* PMON Framing Bit Error Count */
|
||||
#define REG_PMON_BIT_ERROR 0x59
|
||||
#define BITS_PMON_BIT_ERROR 0x7F
|
||||
/* PMON OOF/COFA/Far End Block Error Count LSB */
|
||||
#define REG_PMON_OOF_FEB_LSB_ERROR 0x5A
|
||||
/* PMON OOF/COFA/Far End Block Error Count MSB */
|
||||
#define REG_PMON_OOF_FEB_MSB_ERROR 0x5B
|
||||
#define BITS_PMON_OOF_FEB_MSB_ERROR 0x03
|
||||
/* PMON Bit Error/CRC Error Count LSB */
|
||||
#define REG_PMON_BIT_CRC_LSB_ERROR 0x5C
|
||||
/* PMON Bit Error/CRC Error Count MSB */
|
||||
#define REG_PMON_BIT_CRC_MSB_ERROR 0x5D
|
||||
#define BITS_PMON_BIT_CRC_MSB_ERROR 0x03
|
||||
/* PMON LCV Count LSB */
|
||||
#define REG_PMON_LCV_LSB_COUNT 0x5E
|
||||
/* PMON LCV Count MSB */
|
||||
#define REG_PMON_LCV_MSB_COUNT 0x5F
|
||||
#define BITS_PMON_LCV_MSB_COUNT 0x1F
|
||||
|
||||
#define REG_T1_ALMI_CFG 0x60
|
||||
#define BIT_T1_ALMI_CFG_ESF 0x10
|
||||
#define BIT_T1_ALMI_CFG_FMS1 0x08
|
||||
#define BIT_T1_ALMI_CFG_FMS0 0x04
|
||||
|
||||
#define REG_T1_ALMI_DET_STATUS 0x63
|
||||
#define BIT_T1_ALMI_DET_STATUS_REDD 0x04
|
||||
#define BIT_T1_ALMI_DET_STATUS_YELD 0x02
|
||||
#define BIT_T1_ALMI_DET_STATUS_AISD 0x01
|
||||
|
||||
/* T1 XBOC Code */
|
||||
#define REG_T1_XBOC_CODE 0x67
|
||||
#define BITS_T1_XBOC_DISABLE 0x3F
|
||||
#define MASK_T1_XBOC_CODE 0x3F
|
||||
|
||||
/* T1 RBOC Enable */
|
||||
#define REG_T1_RBOC_ENABLE 0x6A
|
||||
#define BIT_T1_RBOC_ENABLE_IDLE 0x04
|
||||
#define BIT_T1_RBOC_ENABLE_AVC 0x02
|
||||
#define BIT_T1_RBOC_ENABLE_BOCE 0x01
|
||||
|
||||
/* T1 RBOC Code Status */
|
||||
#define REG_T1_RBOC_CODE_STATUS 0x6B
|
||||
#define BIT_T1_RBOC_CODE_STATUS_IDLEI 0x80
|
||||
#define BIT_T1_RBOC_CODE_STATUS_BOCI 0x40
|
||||
#define MASK_T1_RBOC_CODE_STATUS 0x3F
|
||||
|
||||
/* TPSC Indirect Register Access */
|
||||
#define REG_TPSC_CFG 0x6C
|
||||
#define MASK_TPSC_CFG 0x03
|
||||
#define BIT_TPSC_IND 0x02
|
||||
#define BIT_TPSC_PCCE 0x01
|
||||
#define REG_TPSC_MICRO_ACCESS_STATUS 0x6D
|
||||
#define BIT_TPSC_BUSY 0x80
|
||||
#define REG_TPSC_CHANNEL_INDIRECT_ADDRESS_CONTROL 0x6E
|
||||
#define REG_TPSC_CHANNEL_INDIRECT_DATA_BUFFER 0x6F
|
||||
#define REG_TPSC_DATA_CTRL_BYTE 0x20
|
||||
#define MASK_TPSC_DATA_CTRL_BYTE 0xFC
|
||||
#define BIT_TPSC_DATA_CTRL_BYTE_INVERT 0x80
|
||||
#define BIT_TPSC_DATA_CTRL_BYTE_IDLE_DS0 0x40
|
||||
#define BIT_TPSC_DATA_CTRL_BYTE_SIGNINV 0x10
|
||||
#define BIT_TPSC_DATA_CTRL_BYTE_LOOP 0x04
|
||||
#define BIT_TPSC_DATA_CTRL_BYTE_ZCS0 0x02
|
||||
#define BIT_TPSC_DATA_CTRL_BYTE_ZCS1 0x01
|
||||
#define REG_TPSC_IDLE_CODE_BYTE 0x40
|
||||
#define REG_TPSC_SIGNALING_BYTE 0x60
|
||||
#define REG_TPSC_E1_CTRL_BYTE 0x60
|
||||
#define BIT_TPSC_E1_CTRL_BYTE_SUBS 0x80
|
||||
#define BIT_TPSC_E1_CTRL_BYTE_DS0 0x40
|
||||
#define BIT_TPSC_E1_CTRL_BYTE_DS1 0x20
|
||||
#define BIT_TPSC_E1_CTRL_BYTE_A 0x08
|
||||
#define BIT_TPSC_E1_CTRL_BYTE_B 0x04
|
||||
#define BIT_TPSC_E1_CTRL_BYTE_C 0x02
|
||||
#define BIT_TPSC_E1_CTRL_BYTE_D 0x01
|
||||
#define BIT_TPSC_SIGBYTE_SIGC_0 0x80
|
||||
#define BIT_TPSC_SIGBYTE_SIGC_1 0x40
|
||||
#define BIT_TPSC_SIGBYTE_DS1 0x20
|
||||
#define BIT_TPSC_SIGBYTE_SIGSRC 0x10
|
||||
#define BIT_TPSC_SIGBYTE_A 0x08
|
||||
#define BIT_TPSC_SIGBYTE_B 0x04
|
||||
#define BIT_TPSC_SIGBYTE_C 0x02
|
||||
#define BIT_TPSC_SIGBYTE_D 0x01
|
||||
|
||||
/* RPSC Indirect Register Access */
|
||||
#define REG_RPSC_CFG 0x70
|
||||
#define MASK_RPSC_CFG 0x03
|
||||
#define BIT_RPSC_IND 0x02
|
||||
#define BIT_RPSC_PCCE 0x01
|
||||
#define REG_RPSC_MICRO_ACCESS_STATUS 0x71
|
||||
#define BIT_RPSC_BUSY 0x80
|
||||
#define REG_RPSC_CHANNEL_INDIRECT_ADDRESS_CONTROL 0x72
|
||||
#define REG_RPSC_CHANNEL_INDIRECT_DATA_BUFFER 0x73
|
||||
#define REG_RPSC_DATA_CTRL_BYTE 0x20
|
||||
#define MASK_RPSC_DATA_CTRL_BYTE 0xFC
|
||||
#define BIT_RPSC_DATA_CTRL_BYTE_DTRKC 0x40
|
||||
#define BIT_RPSC_DATA_CTRL_BYTE_SIGNINV 0x04
|
||||
#define REG_RPSC_DATA_COND_BYTE 0x40
|
||||
#define REG_RPSC_SIGBYTE 0x60
|
||||
#define BIT_RPSC_SIGBYTE_A 0x08
|
||||
#define BIT_RPSC_SIGBYTE_B 0x04
|
||||
#define BIT_RPSC_SIGBYTE_C 0x02
|
||||
#define BIT_RPSC_SIGBYTE_D 0x01
|
||||
|
||||
#define REG_E1_TRAN_CFG 0x80
|
||||
#define BIT_E1_TRAN_AMI 0x80
|
||||
#define BIT_E1_TRAN_SIGEN 0x40
|
||||
#define BIT_E1_TRAN_DLEN 0x20
|
||||
#define BIT_E1_TRAN_GENCRC 0x10
|
||||
#define BIT_E1_TRAN_FDIS 0x08
|
||||
#define BIT_E1_TRAN_FEBEDIS 0x04
|
||||
#define BIT_E1_TRAN_INDIS 0x02
|
||||
#define BIT_E1_TRAN_XDIS 0x01
|
||||
|
||||
#define REG_E1_TRAN_TX_ALARM_CTRL 0x81
|
||||
#define BIT_E1_TRAN_TX_ALARM_RAI 0x08
|
||||
#define BIT_E1_TRAN_TX_ALARM_YBIT 0x04
|
||||
#define BIT_E1_TRAN_TX_ALARM_AIS 0x01
|
||||
|
||||
#define REG_E1_TRAN_NATB_CODESEL 0x86
|
||||
#define BIT_E1_TRAN_NATB_CODESEL_SaSEL2 0x80
|
||||
#define BIT_E1_TRAN_NATB_CODESEL_SaSEL1 0x40
|
||||
#define BIT_E1_TRAN_NATB_CODESEL_SaSEL0 0x20
|
||||
#define BIT_E1_TRAN_NATB_CODESEL_Sa4 0x60
|
||||
#define BIT_E1_TRAN_NATB_CODESEL_Sa5 0x80
|
||||
#define BIT_E1_TRAN_NATB_CODESEL_Sa6 0xA0
|
||||
#define BIT_E1_TRAN_NATB_CODESEL_Sa7 0xC0
|
||||
#define BIT_E1_TRAN_NATB_CODESEL_Sa8 0xE0
|
||||
|
||||
#define REG_E1_TRAN_NATB_CODE 0x87
|
||||
#define BIT_E1_TRAN_NATB_CODE_SaXEN1 0x80
|
||||
#define BIT_E1_TRAN_NATB_CODE_SaXEN2 0x40
|
||||
#define BIT_E1_TRAN_NATB_CODE_SaXEN3 0x20
|
||||
#define BIT_E1_TRAN_NATB_CODE_SaXEN4 0x10
|
||||
#define BIT_E1_TRAN_NATB_CODE_SaX1 0x08
|
||||
#define BIT_E1_TRAN_NATB_CODE_SaX2 0x04
|
||||
#define BIT_E1_TRAN_NATB_CODE_SaX3 0x02
|
||||
#define BIT_E1_TRAN_NATB_CODE_SaX4 0x01
|
||||
|
||||
#define REG_E1_FRMR_CFG 0x90
|
||||
#define BIT_E1_FRMR_CRCEN 0x80
|
||||
#define BIT_E1_FRMR_CASDIS 0x40
|
||||
#define BIT_E1_FRMR_REFCRCEN 0x02
|
||||
|
||||
/* E1 FRMR Maintenance Mode Options */
|
||||
#define REG_E1_FRMR_MAINT_OPT 0x91
|
||||
#define BIT_E1_FRMR_MAINT_OPT_AISC 0x02
|
||||
|
||||
/* E1 FRMR framing status */
|
||||
#define REG_E1_FRMR_FR_STATUS 0x96
|
||||
#define BIT_E1_FRMR_FR_STATUS_C2NCIWV 0x80
|
||||
#define BIT_E1_FRMR_FR_STATUS_OOFV 0x40
|
||||
#define BIT_E1_FRMR_FR_STATUS_OOSMFV 0x20
|
||||
#define BIT_E1_FRMR_FR_STATUS_OOCMFV 0x10
|
||||
#define BIT_E1_FRMR_FR_STATUS_OOOFV 0x08
|
||||
#define BIT_E1_FRMR_FR_STATUS_RAICCRCV 0x04
|
||||
#define BIT_E1_FRMR_FR_STATUS_CFEBEV 0x02
|
||||
#define BIT_E1_FRMR_FR_STATUS_V52LINKV 0x01
|
||||
|
||||
/* E1 FRMR Maintenance/Alram Status */
|
||||
#define REG_E1_FRMR_MAINT_STATUS 0x97
|
||||
#define BIT_E1_FRMR_MAINT_STATUS_RAIV 0x80
|
||||
#define BIT_E1_FRMR_MAINT_STATUS_RED 0x08
|
||||
#define BIT_E1_FRMR_MAINT_STATUS_AIS 0x04
|
||||
|
||||
/* TDPR Configuration */
|
||||
#define REG_TDPR_CFG 0xA8
|
||||
#define BIT_TDPR_CFG_EN 0x01
|
||||
|
||||
/* TDPR Transmit Data */
|
||||
#define REG_TDPR_TX_DATA 0xAD
|
||||
|
||||
/* Comet-QUAD Master Interrupt Source */
|
||||
#define REG_COMET_QUAD_MASTER_INTR 0xBC
|
||||
#define BITS_COMET_QUAD_MASTER_INTR 0x0F
|
||||
|
||||
/* RDLC Configuration */
|
||||
#define REG_RDLC_CFG 0xC0
|
||||
#define BIT_RDLC_CFG_EN 0x01
|
||||
|
||||
/* RDLC Interrupt Control */
|
||||
#define REG_RDLC_INT_CTRL 0xC1
|
||||
#define BIT_RDLC_INT_CTRL_INTE 0x80
|
||||
|
||||
/* RDLC Status */
|
||||
#define REG_RDLC_STATUS 0xC2
|
||||
#define BIT_RDLC_STATUS_PKIN 0x10
|
||||
#define BIT_RDLC_STATUS_INTR 0x01
|
||||
|
||||
/* RDLC Data */
|
||||
#define REG_RDLC_DATA 0xC3
|
||||
|
||||
#define REG_CSU_CFG 0xD6
|
||||
#define MASK_CSU_CFG 0xC7
|
||||
#define BIT_CSU_MODE2 0x04
|
||||
#define BIT_CSU_MODE1 0x02
|
||||
#define BIT_CSU_MODE0 0x01
|
||||
|
||||
/* RLPS Equalization Indirect Data (MSB) */
|
||||
#define REG_RLPS_IND_DATA_1 0xD8
|
||||
/* RLPS Equalization Indirect Data */
|
||||
#define REG_RLPS_IND_DATA_2 0xD9
|
||||
/* RLPS Equalization Indirect Data */
|
||||
#define REG_RLPS_IND_DATA_3 0xDA
|
||||
/* RLPS Equalization Indirect Data (LSB) */
|
||||
#define REG_RLPS_IND_DATA_4 0xDB
|
||||
|
||||
#define REG_EQ_VREF 0xDC
|
||||
|
||||
#define REG_RLPS_FUSE_CTRL_STAT 0xDD
|
||||
|
||||
#define REG_PRGD_INT_STATUS_EN 0xE1
|
||||
#define BIT_PRGD_INT_STATUS_EN_SYNCE 0x80
|
||||
#define BIT_PRGD_INT_STATUS_EN_BEE 0x40
|
||||
#define BIT_PRGD_INT_STATUS_EN_XFERE 0x20
|
||||
#define BIT_PRGD_INT_STATUS_EN_SYNCV 0x10
|
||||
#define BIT_PRGD_INT_STATUS_EN_SYNCI 0x08
|
||||
#define BIT_PRGD_INT_STATUS_EN_BEI 0x04
|
||||
#define BIT_PRGD_INT_STATUS_EN_XFERI 0x02
|
||||
#define BIT_PRGD_INT_STATUS_EN_OVR 0x01
|
||||
|
||||
#define REG_XLPG_LINE_CFG 0xF0
|
||||
#define BIT_XLPG_LINE_CFG_HIGHZ 0x80
|
||||
|
||||
#define REG_XLPG_WAVEFORM_ADDR 0xF2
|
||||
|
||||
#define REG_XLPG_WAVEFORM_DATA 0xF3
|
||||
|
||||
#define REG_XLPG_TNC 0xF4
|
||||
#define BIT_XLPG_TNC_7 0x80
|
||||
#define BIT_XLPG_TNC_6 0x40
|
||||
#define BIT_XLPG_TNC_5 0x20
|
||||
#define BIT_XLPG_TNC_4 0x10
|
||||
#define BIT_XLPG_TNC_3 0x08
|
||||
#define BIT_XLPG_TNC_2 0x04
|
||||
#define BIT_XLPG_TNC_1 0x02
|
||||
|
||||
#define REG_XLPG_TPC 0xF5
|
||||
#define BIT_XLPG_TPC_7 0x80
|
||||
#define BIT_XLPG_TPC_6 0x40
|
||||
#define BIT_XLPG_TPC_5 0x20
|
||||
#define BIT_XLPG_TPC_4 0x10
|
||||
#define BIT_XLPG_TPC_3 0x08
|
||||
#define BIT_XLPG_TPC_2 0x04
|
||||
#define BIT_XLPG_TPC_1 0x02
|
||||
|
||||
#define REG_XLPG_INIT 0xF6
|
||||
|
||||
#define REG_RLPS_CFG_STATUS 0xF8
|
||||
#define BIT_RLPS_CFG_STATUS_ALOSI 0x80
|
||||
#define BIT_RLPS_CFG_STATUS_ALOSV 0x40
|
||||
#define BIT_RLPS_CFG_STATUS_ALOSE 0x20
|
||||
#define BIT_RLPS_CFG_STATUS_SQUELCHE 0x10
|
||||
#define BIT_RLPS_CFG_STATUS_LONGE 0x01
|
||||
|
||||
#define REG_RLPS_ALOS_DET_CLR_THR 0xF9
|
||||
#define BIT_RLPS_ALOS_CLR_THR_2 0x40
|
||||
#define BIT_RLPS_ALOS_CLR_THR_1 0x20
|
||||
#define BIT_RLPS_ALOS_CLR_THR_0 0x10
|
||||
#define BIT_RLPS_ALOS_DET_THR_2 0x04
|
||||
#define BIT_RLPS_ALOS_DET_THR_1 0x02
|
||||
#define BIT_RLPS_ALOS_DET_THR_0 0x01
|
||||
|
||||
#define REG_RLPS_ALOS_DET_PER 0xFA
|
||||
#define BIT_RLPS_ALOS_DET_PER_7 0x80
|
||||
#define BIT_RLPS_ALOS_DET_PER_6 0x40
|
||||
#define BIT_RLPS_ALOS_DET_PER_5 0x20
|
||||
#define BIT_RLPS_ALOS_DET_PER_4 0x10
|
||||
#define BIT_RLPS_ALOS_DET_PER_3 0x08
|
||||
#define BIT_RLPS_ALOS_DET_PER_2 0x04
|
||||
#define BIT_RLPS_ALOS_DET_PER_1 0x02
|
||||
#define BIT_RLPS_ALOS_DET_PER_0 0x01
|
||||
|
||||
#define REG_RLPS_ALOS_CLR_PER 0xFB
|
||||
#define BIT_RLPS_ALOS_CLR_PER_7 0x80
|
||||
#define BIT_RLPS_ALOS_CLR_PER_6 0x40
|
||||
#define BIT_RLPS_ALOS_CLR_PER_5 0x20
|
||||
#define BIT_RLPS_ALOS_CLR_PER_4 0x10
|
||||
#define BIT_RLPS_ALOS_CLR_PER_3 0x08
|
||||
#define BIT_RLPS_ALOS_CLR_PER_2 0x04
|
||||
#define BIT_RLPS_ALOS_CLR_PER_1 0x02
|
||||
#define BIT_RLPS_ALOS_CLR_PER_0 0x01
|
||||
|
||||
/* RLPS Equalization Indirect Address */
|
||||
#define REG_RLPS_EQ_ADDR 0xFC
|
||||
|
||||
/* RLPS Equalization Read/Write Select */
|
||||
#define REG_RLPS_EQ_RWB 0xFD
|
||||
#define BIT_RLPS_EQ_RWB 0x80
|
||||
|
||||
#define REG_RLPS_EQ_STATUS 0xFE
|
||||
|
||||
#define REG_RLPS_EQ_CFG 0xFF
|
||||
#define MASK_RLPS_EQ_CFG 0xC7
|
||||
#define BIT_RLPS_EQ_RESERVED 0x08 /* PMC4351 */
|
||||
#define BIT_RLPS_EQ_FREQ_2 0x02 /* PMC4351 */
|
||||
#define BIT_RLPS_EQ_FREQ_1 0x02 /* PMC4351 */
|
||||
#define BIT_RLPS_EQ_FREQ_0 0x01 /* PMC4351 */
|
||||
#define BIT_RLPS_EQ_EQEN 0x08 /* PMC4354 */
|
||||
#define BIT_RLPS_EQ_RESERVED_3 0x04 /* PMC4354 */
|
||||
#define BIT_RLPS_EQ_RESERVED_1 0x03 /* PMC4354 */
|
||||
#define BIT_RLPS_EQ_RESERVED_0 0x01 /* PMC4354 */
|
||||
|
||||
/********************************************/
|
||||
/************ Interrupt Register ************/
|
||||
/********************************************/
|
||||
#define REG_INT_SRC_1 0x07
|
||||
#define BITS_TX_INT_SRC_1 0x0C
|
||||
#define BITS_RX_INT_SRC_1 0xF3
|
||||
#define BIT_INT_SRC_1_PMON 0x80
|
||||
#define BIT_INT_SRC_1_PRGD 0x40
|
||||
#define BIT_INT_SRC_1_FRMR 0x20
|
||||
#define BIT_INT_SRC_1_SIGX 0x10
|
||||
#define BIT_INT_SRC_1_APRM 0x08
|
||||
#define BIT_INT_SRC_1_TJAT 0x04
|
||||
#define BIT_INT_SRC_1_RJAT 0x02
|
||||
#define BIT_INT_SRC_1_CDRC 0x01
|
||||
|
||||
#define REG_INT_SRC_2 0x08
|
||||
#define BITS_TX_INT_SRC_2 0x0F
|
||||
#define BITS_RX_INT_SRC_2 0xF0
|
||||
#define BIT_INT_SRC_2_RX_ELST 0x80
|
||||
#define BIT_INT_SRC_2_RDLC_3 0x40
|
||||
#define BIT_INT_SRC_2_RDLC_2 0x20
|
||||
#define BIT_INT_SRC_2_RDLC_1 0x10
|
||||
#define BIT_INT_SRC_2_TX_ELST 0x08
|
||||
#define BIT_INT_SRC_2_TDPR_3 0x04
|
||||
#define BIT_INT_SRC_2_TDPR_2 0x02
|
||||
#define BIT_INT_SRC_2_TDPR_1 0x01
|
||||
|
||||
#define REG_INT_SRC_3 0x09
|
||||
#define BITS_TX_INT_SRC_3 0x15
|
||||
#define BITS_RX_INT_SRC_3 0xEA
|
||||
#define BIT_INT_SRC_3_IBCD 0x80
|
||||
#define BIT_INT_SRC_3_PDVD 0x40
|
||||
#define BIT_INT_SRC_3_RBOC 0x20
|
||||
#define BIT_INT_SRC_3_XPDE 0x10
|
||||
#define BIT_INT_SRC_3_ALMI 0x08
|
||||
#define BIT_INT_SRC_3_TRAN 0x04
|
||||
#define BIT_INT_SRC_3_RLPS 0x02
|
||||
#define BIT_INT_SRC_3_BTIF 0x01
|
||||
|
||||
#define REG_CDRC_INT_EN 0x11
|
||||
#define BIT_CDRC_INT_EN_LCVE 0x80
|
||||
#define BIT_CDRC_INT_EN_LOSE 0x40
|
||||
#define BIT_CDRC_INT_EN_LCSDE 0x20
|
||||
#define BIT_CDRC_INT_EN_ZNDE 0x10
|
||||
|
||||
#define REG_CDRC_INT_STATUS 0x12
|
||||
#define BIT_CDRC_INT_STATUS_LCVI 0x80
|
||||
#define BIT_CDRC_INT_STATUS_LOSI 0x40
|
||||
#define BIT_CDRC_INT_STATUS_LCSDI 0x20
|
||||
#define BIT_CDRC_INT_STATUS_ZNDI 0x10
|
||||
#define BIT_CDRC_INT_STATUS_LOSV 0x01
|
||||
|
||||
#define REG_RJAT_INT_STATUS 0x14
|
||||
#define BIT_RJAT_INT_STATUS_OVRI 0x02
|
||||
#define BIT_RJAT_INT_STATUS_UNDI 0x01
|
||||
|
||||
#define REG_TJAT_INT_STATUS 0x18
|
||||
#define BIT_TJAT_INT_STATUS_OVRI 0x02
|
||||
#define BIT_TJAT_INT_STATUS_UNDI 0x01
|
||||
|
||||
#define REG_RX_ELST_INT_EN_STATUS 0x1D
|
||||
#define BIT_RX_ELST_INT_EN_STATUS_SLIPE 0x04
|
||||
#define BIT_RX_ELST_INT_EN_STATUS_SLIPD 0x02
|
||||
#define BIT_RX_ELST_INT_EN_STATUS_SLIPI 0x01
|
||||
|
||||
#define REG_TX_ELST_INT_EN_STATUS 0x21
|
||||
#define BIT_TX_ELST_INT_EN_STATUS_SLIPE 0x04
|
||||
#define BIT_TX_ELST_INT_EN_STATUS_SLIPD 0x02
|
||||
#define BIT_TX_ELST_INT_EN_STATUS_SLIPI 0x01
|
||||
|
||||
#define REG_T1_FRMR_INT_EN 0x49
|
||||
#define BIT_T1_FRMR_INT_EN_COFAE 0x20
|
||||
#define BIT_T1_FRMR_INT_EN_FERE 0x10
|
||||
#define BIT_T1_FRMR_INT_EN_BEEE 0x08
|
||||
#define BIT_T1_FRMR_INT_EN_SFEE 0x04
|
||||
#define BIT_T1_FRMR_INT_EN_MFPE 0x02
|
||||
#define BIT_T1_FRMR_INT_EN_INFRE 0x01
|
||||
|
||||
#define REG_T1_FRMR_INT_STATUS 0x4A
|
||||
#define BIT_T1_FRMR_INT_STATUS_COFAI 0x80
|
||||
#define BIT_T1_FRMR_INT_STATUS_FERI 0x40
|
||||
#define BIT_T1_FRMR_INT_STATUS_BEEI 0x20
|
||||
#define BIT_T1_FRMR_INT_STATUS_SFEI 0x10
|
||||
#define BIT_T1_FRMR_INT_STATUS_MFPI 0x08
|
||||
#define BIT_T1_FRMR_INT_STATUS_INFRI 0x04
|
||||
#define BIT_T1_FRMR_INT_STATUS_MFP 0x02
|
||||
#define BIT_T1_FRMR_INT_STATUS_INFR 0x01
|
||||
|
||||
#define REG_IBCD_CFG 0x4C
|
||||
#define BIT_IBCD_CFG_DSEL1 0x08
|
||||
#define BIT_IBCD_CFG_DSEL0 0x04
|
||||
#define BIT_IBCD_CFG_ASEL1 0x02
|
||||
#define BIT_IBCD_CFG_ASEL0 0x01
|
||||
|
||||
#define REG_IBCD_INT_EN_STATUS 0x4D
|
||||
#define BIT_IBCD_INT_EN_STATUS_LBACP 0x80
|
||||
#define BIT_IBCD_INT_EN_STATUS_LBDCP 0x40
|
||||
#define BIT_IBCD_INT_EN_STATUS_LBAE 0x20
|
||||
#define BIT_IBCD_INT_EN_STATUS_LBDE 0x10
|
||||
#define BIT_IBCD_INT_EN_STATUS_LBAI 0x08
|
||||
#define BIT_IBCD_INT_EN_STATUS_LBDI 0x04
|
||||
#define BIT_IBCD_INT_EN_STATUS_LBA 0x02
|
||||
#define BIT_IBCD_INT_EN_STATUS_LBD 0x01
|
||||
|
||||
#define REG_IBCD_ACTIVATE_CODE 0x4E
|
||||
#define BIT_IBCD_ACTIVATE_CODE_ACT7 0x80
|
||||
#define BIT_IBCD_ACTIVATE_CODE_ACT6 0x40
|
||||
#define BIT_IBCD_ACTIVATE_CODE_ACT5 0x20
|
||||
#define BIT_IBCD_ACTIVATE_CODE_ACT4 0x10
|
||||
#define BIT_IBCD_ACTIVATE_CODE_ACT3 0x08
|
||||
#define BIT_IBCD_ACTIVATE_CODE_ACT2 0x04
|
||||
#define BIT_IBCD_ACTIVATE_CODE_ACT1 0x02
|
||||
#define BIT_IBCD_ACTIVATE_CODE_ACT0 0x01
|
||||
|
||||
#define REG_IBCD_DEACTIVATE_CODE 0x4F
|
||||
#define BIT_IBCD_DEACTIVATE_CODE_DACT7 0x80
|
||||
#define BIT_IBCD_DEACTIVATE_CODE_DACT6 0x40
|
||||
#define BIT_IBCD_DEACTIVATE_CODE_DACT5 0x20
|
||||
#define BIT_IBCD_DEACTIVATE_CODE_DACT4 0x10
|
||||
#define BIT_IBCD_DEACTIVATE_CODE_DACT3 0x08
|
||||
#define BIT_IBCD_DEACTIVATE_CODE_DACT2 0x04
|
||||
#define BIT_IBCD_DEACTIVATE_CODE_DACT1 0x02
|
||||
#define BIT_IBCD_DEACTIVATE_CODE_DACT0 0x01
|
||||
|
||||
#define REG_PMON_INT_EN_STATUS 0x58
|
||||
#define BIT_PMON_INT_EN_STATUS_INTE 0x04
|
||||
#define BIT_PMON_INT_EN_STATUS_XFER 0x02
|
||||
#define BIT_PMON_INT_EN_STATUS_OVR 0x01
|
||||
|
||||
#define REG_T1_ALMI_INT_EN 0x61
|
||||
#define BIT_T1_ALMI_INT_EN_FASTD 0x10
|
||||
#define BIT_T1_ALMI_INT_EN_ACCEL 0x08
|
||||
#define BIT_T1_ALMI_INT_EN_YELE 0x04
|
||||
#define BIT_T1_ALMI_INT_EN_REDE 0x02
|
||||
#define BIT_T1_ALMI_INT_EN_AISE 0x01
|
||||
|
||||
#define REG_T1_ALMI_INT_STATUS 0x62
|
||||
#define BIT_T1_ALMI_INT_STATUS_YELI 0x20
|
||||
#define BIT_T1_ALMI_INT_STATUS_REDI 0x10
|
||||
#define BIT_T1_ALMI_INT_STATUS_AISI 0x08
|
||||
#define BIT_T1_ALMI_INT_STATUS_YEL 0x04
|
||||
#define BIT_T1_ALMI_INT_STATUS_RED 0x02
|
||||
#define BIT_T1_ALMI_INT_STATUS_AIS 0x01
|
||||
|
||||
#define REG_PDVD_INT_EN_STATUS 0x65
|
||||
#define BIT_PDVD_INT_EN_STATUS_PDV 0x10
|
||||
#define BIT_PDVD_INT_EN_STATUS_Z16DI 0x08
|
||||
#define BIT_PDVD_INT_EN_STATUS_PDVI 0x04
|
||||
#define BIT_PDVD_INT_EN_STATUS_Z16DE 0x02
|
||||
#define BIT_PDVD_INT_EN_STATUS_PDVE 0x01
|
||||
|
||||
#define REG_XPDE_INT_EN_STATUS 0x69
|
||||
#define BIT_XPDE_INT_EN_STATUS_STUFE 0x80
|
||||
#define BIT_XPDE_INT_EN_STATUS_STUFF 0x40
|
||||
#define BIT_XPDE_INT_EN_STATUS_STUFI 0x20
|
||||
#define BIT_XPDE_INT_EN_STATUS_PDV 0x10
|
||||
#define BIT_XPDE_INT_EN_STATUS_Z16DI 0x08
|
||||
#define BIT_XPDE_INT_EN_STATUS_PDVI 0x04
|
||||
#define BIT_XPDE_INT_EN_STATUS_Z16DE 0x02
|
||||
#define BIT_XPDE_INT_EN_STATUS_PDVE 0x01
|
||||
|
||||
#define REG_T1_APRM_INT_STATUS 0x7A
|
||||
#define BIT_T1_APRM_INT_STATUS_INTR 0x01
|
||||
|
||||
#define REG_E1_TRAN_INT_EN 0x84
|
||||
#define BIT_E1_TRAN_INT_EN_SIGMFE 0x10
|
||||
#define BIT_E1_TRAN_INT_EN_NFASE 0x08
|
||||
#define BIT_E1_TRAN_INT_EN_MFE 0x04
|
||||
#define BIT_E1_TRAN_INT_EN_SMFE 0x02
|
||||
#define BIT_E1_TRAN_INT_EN_FRME 0x01
|
||||
|
||||
#define REG_E1_TRAN_INT_STATUS 0x85
|
||||
#define BIT_E1_TRAN_INT_STATUS_SIGMFI 0x10
|
||||
#define BIT_E1_TRAN_INT_STATUS_NFASI 0x08
|
||||
#define BIT_E1_TRAN_INT_STATUS_MFI 0x04
|
||||
#define BIT_E1_TRAN_INT_STATUS_SMFI 0x02
|
||||
#define BIT_E1_TRAN_INT_STATUS_FRMI 0x01
|
||||
|
||||
#define REG_E1_FRMR_FRM_STAT_INT_EN 0x92
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_EN_C2NCIWE 0x80
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_EN_OOFE 0x40
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_EN_OOSMFE 0x20
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_EN_OOCMFE 0x10
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_EN_COFAE 0x08
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_EN_FERE 0x04
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_EN_SMFERE 0x02
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_EN_CMFERE 0x01
|
||||
|
||||
#define REG_E1_FRMR_M_A_INT_EN 0x93
|
||||
#define BIT_E1_FRMR_M_A_INT_EN_RAIE 0x80
|
||||
#define BIT_E1_FRMR_M_A_INT_EN_RMAIE 0x40
|
||||
#define BIT_E1_FRMR_M_A_INT_EN_AISDE 0x20
|
||||
#define BIT_E1_FRMR_M_A_INT_EN_REDE 0x08
|
||||
#define BIT_E1_FRMR_M_A_INT_EN_AISE 0x04
|
||||
#define BIT_E1_FRMR_M_A_INT_EN_FEBEE 0x02
|
||||
#define BIT_E1_FRMR_M_A_INT_EN_CRCEE 0x01
|
||||
|
||||
/* E1 FRMR Framing status Interrupt Indication */
|
||||
#define REG_E1_FRMR_FRM_STAT_INT_IND 0x94
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_IND_C2NCIWI 0x80
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_IND_OOFI 0x40
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_IND_OOSMFI 0x20
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_IND_OOCMFI 0x10
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_IND_COFAI 0x08
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_IND_FERI 0x04
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_IND_SMFERI 0x02
|
||||
#define BIT_E1_FRMR_FRM_STAT_INT_IND_CMFERI 0x01
|
||||
|
||||
#define REG_E1_FRMR_M_A_INT_IND 0x95
|
||||
#define BIT_E1_FRMR_M_A_INT_IND_RAII 0x80
|
||||
#define BIT_E1_FRMR_M_A_INT_IND_FMAII 0x40
|
||||
#define BIT_E1_FRMR_M_A_INT_IND_AISDI 0x20
|
||||
#define BIT_E1_FRMR_M_A_INT_IND_REDI 0x08
|
||||
#define BIT_E1_FRMR_M_A_INT_IND_AISI 0x04
|
||||
#define BIT_E1_FRMR_M_A_INT_IND_FEBEI 0x02
|
||||
#define BIT_E1_FRMR_M_A_INT_IND_CRCEI 0x01
|
||||
|
||||
#define REG_E1_FRMR_P_A_INT_EN 0x9E
|
||||
#define BIT_E1_FRMR_P_A_INT_EN_OOOFE 0x80
|
||||
#define BIT_E1_FRMR_P_A_INT_EN_RAICCRCE 0x40
|
||||
#define BIT_E1_FRMR_P_A_INT_EN_CFEBEE 0x20
|
||||
#define BIT_E1_FRMR_P_A_INT_EN_V52LINKE 0x10
|
||||
#define BIT_E1_FRMR_P_A_INT_EN_IFPE 0x08
|
||||
#define BIT_E1_FRMR_P_A_INT_EN_ICSMFPE 0x04
|
||||
#define BIT_E1_FRMR_P_A_INT_EN_ICMFPE 0x02
|
||||
#define BIT_E1_FRMR_P_A_INT_EN_ISMFPE 0x01
|
||||
|
||||
#define REG_E1_FRMR_P_A_INT_STAT 0x9F
|
||||
#define BIT_E1_FRMR_P_A_INT_STAT_OOOFI 0x80
|
||||
#define BIT_E1_FRMR_P_A_INT_STAT_RAICCRCI 0x40
|
||||
#define BIT_E1_FRMR_P_A_INT_STAT_CFEBEI 0x20
|
||||
#define BIT_E1_FRMR_P_A_INT_STAT_V52LINKI 0x10
|
||||
#define BIT_E1_FRMR_P_A_INT_STAT_IFPI 0x08
|
||||
#define BIT_E1_FRMR_P_A_INT_STAT_ICSMFPI 0x04
|
||||
#define BIT_E1_FRMR_P_A_INT_STAT_ICMFPI 0x02
|
||||
#define BIT_E1_FRMR_P_A_INT_STAT_ISMFPI 0x01
|
||||
|
||||
|
||||
#endif /* __SDLA_TE1_PMC_H */
|
|
@ -0,0 +1,119 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* sdla_te3.h Sangoma T3/E3 front end definitions.
|
||||
*
|
||||
* Alex Feldman <al.feldman@sangoma.com>
|
||||
*
|
||||
* Copyright Sangoma Technologies Inc. 1999, 2000, 2001, 2002, 2003, 2004
|
||||
*
|
||||
* This program is provided subject to the Software License included in
|
||||
* this package in the file license.txt. By using this program you agree
|
||||
* to be bound bythe terms of this license.
|
||||
*
|
||||
* Should you not have a copy of the file license.txt, or wish to obtain
|
||||
* a hard copy of the Software License, please contact Sangoma
|
||||
* technologies Corporation.
|
||||
*
|
||||
* Contact: Sangoma Technologies Inc. 905-474-1990, info@sangoma.com
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __SDLA_TE3_H
|
||||
# define __SDLA_TE3_H
|
||||
|
||||
#define WAN_TE3_LIU_LB_NORMAL 0x00
|
||||
#define WAN_TE3_LIU_LB_ANALOG 0x01
|
||||
#define WAN_TE3_LIU_LB_REMOTE 0x02
|
||||
#define WAN_TE3_LIU_LB_DIGITAL 0x03
|
||||
#define WAN_TE3_LB_TYPE_DECODE(type) \
|
||||
((type) == WAN_TE3_LIU_LB_ANALOG) ? "Analog" : \
|
||||
((type) == WAN_TE3_LIU_LB_REMOTE) ? "Remote" : \
|
||||
((type) == WAN_TE3_LIU_LB_DIGITAL) ? "Digital Local" : \
|
||||
"Unknown"
|
||||
|
||||
/* Line loopback activate/deactive modes */
|
||||
#define WAN_TE3_LB_ENABLE 0x01
|
||||
#define WAN_TE3_LB_DISABLE 0x02
|
||||
#define WAN_TE3_LB_ACTION_DECODE(mode) \
|
||||
((mode) == WAN_TE3_LB_ENABLE) ? "Enable" : \
|
||||
((mode) == WAN_TE3_LB_DISABLE) ? "Disable" :\
|
||||
"Unknown"
|
||||
|
||||
#define WAN_TE3_RDEVICE_NONE 0x00
|
||||
#define WAN_TE3_RDEVICE_ADTRAN 0x01
|
||||
#define WAN_TE3_RDEVICE_DIGITALLINK 0x02
|
||||
#define WAN_TE3_RDEVICE_KENTROX 0x03
|
||||
#define WAN_TE3_RDEVICE_LARSCOM 0x04
|
||||
#define WAN_TE3_RDEVICE_VERILINK 0x05
|
||||
|
||||
#define WAN_TE3_BIT_LOS_ALARM 0x0001
|
||||
#define WAN_TE3_BIT_OOF_ALARM 0x0002
|
||||
#define WAN_TE3_BIT_AIS_ALARM 0x0004
|
||||
#define WAN_TE3_BIT_AIC_ALARM 0x0008
|
||||
#define WAN_TE3_BIT_YEL_ALARM 0x0010
|
||||
#define WAN_TE3_BIT_LOF_ALARM 0x0020
|
||||
|
||||
#define RDEVICE_DECODE(rdevice) \
|
||||
(rdevice == WAN_TE3_RDEVICE_NONE) ? "None" : \
|
||||
(rdevice == WAN_TE3_RDEVICE_ADTRAN) ? "ADTRAN" : \
|
||||
(rdevice == WAN_TE3_RDEVICE_DIGITALLINK) ? "DIGITALLINK" : \
|
||||
(rdevice == WAN_TE3_RDEVICE_KENTROX) ? "KENTROX" : \
|
||||
(rdevice == WAN_TE3_RDEVICE_LARSCOM) ? "LARSCOM" : \
|
||||
(rdevice == WAN_TE3_RDEVICE_VERILINK) ? "VERLINK" : \
|
||||
"Unknown"
|
||||
|
||||
typedef struct {
|
||||
int rx_equal; /* receive equalization enable (TRUE/FALSE) */
|
||||
int taos; /* transmit all ones select (TRUE/FALSE) */
|
||||
int lb_mode; /* loopback modes */
|
||||
int tx_lbo; /* transmit line build-out (TRUE/FALSE) */
|
||||
} sdla_te3_liu_cfg_t;
|
||||
|
||||
typedef struct {
|
||||
sdla_te3_liu_cfg_t liu_cfg;
|
||||
int fractional;
|
||||
int rdevice_type;
|
||||
int fcs;
|
||||
int clock;
|
||||
unsigned char lcode;
|
||||
} sdla_te3_cfg_t;
|
||||
|
||||
typedef struct {
|
||||
u_int32_t pmon_lcv;
|
||||
u_int32_t pmon_framing;
|
||||
u_int32_t pmon_parity;
|
||||
u_int32_t pmon_febe;
|
||||
u_int32_t pmon_cpbit;
|
||||
} sdla_te3_pmon_t;
|
||||
|
||||
#define IS_DS3(cfg) ((cfg)->media == WAN_MEDIA_DS3)
|
||||
#define IS_E3(cfg) ((cfg)->media == WAN_MEDIA_E3)
|
||||
#define IS_TE3(cfg) ( \
|
||||
(cfg)->media == WAN_MEDIA_DS3 || \
|
||||
(cfg)->media == WAN_MEDIA_E3)
|
||||
|
||||
|
||||
#define WAN_TE3_ALARM(alarm, bit) ((alarm) & (bit)) ? "ON" : "OFF"
|
||||
|
||||
#define WAN_TE3_LOS_ALARM(alarm) WAN_TE3_ALARM(alarm, WAN_TE3_BIT_LOS_ALARM)
|
||||
#define WAN_TE3_OOF_ALARM(alarm) WAN_TE3_ALARM(alarm, WAN_TE3_BIT_OOF_ALARM)
|
||||
#define WAN_TE3_AIS_ALARM(alarm) WAN_TE3_ALARM(alarm, WAN_TE3_BIT_AIS_ALARM)
|
||||
#define WAN_TE3_AIC_ALARM(alarm) WAN_TE3_ALARM(alarm, WAN_TE3_BIT_AIC_ALARM)
|
||||
#define WAN_TE3_YEL_ALARM(alarm) WAN_TE3_ALARM(alarm, WAN_TE3_BIT_YEL_ALARM)
|
||||
#define WAN_TE3_LOF_ALARM(alarm) WAN_TE3_ALARM(alarm, WAN_TE3_BIT_LOF_ALARM)
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
typedef struct {
|
||||
unsigned long critical;
|
||||
int dummy;
|
||||
u_int8_t cpld_cntrl;
|
||||
u_int8_t cpld_status;
|
||||
u_int8_t e3_lb_ctrl;
|
||||
u_int8_t e3_connect_delay;
|
||||
} sdla_te3_param_t;
|
||||
|
||||
int sdla_te3_iface_init(void *p_fe_iface);
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#endif /* __SDLA_TE3_H */
|
|
@ -0,0 +1,392 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* sdla_te3_reg.h Sangoma T3/E3 registry definitions.
|
||||
*
|
||||
* Alex Feldman <al.feldman@sangoma.com>
|
||||
*
|
||||
* Copyright Sangoma Technologies Inc. 1999, 2000,2001, 2002, 2003, 2004
|
||||
*
|
||||
* This program is provided subject to the Software License included in
|
||||
* this package in the file license.txt. By using this program you agree
|
||||
* to be bound bythe terms of this license.
|
||||
*
|
||||
* Should you not have a copy of the file license.txt, or wish to obtain
|
||||
* a hard copy of the Software License, please contact Sangoma
|
||||
* technologies Corporation.
|
||||
*
|
||||
* Contact: Sangoma Technologies Inc. 905-474-1990, info@sangoma.com
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __SDLA_TE3_REG_H
|
||||
# define __SDLA_TE3_REG_H
|
||||
|
||||
|
||||
/* T3/E3 Line Interface Unit registers */
|
||||
#define REG_APS 0x00
|
||||
|
||||
#define REG_INTR_ENABLE 0x01
|
||||
#define BIT_INTR_ENABLE_CNT_SATIE 0x20
|
||||
#define BIT_INTR_ENABLE_PRBSIE 0x10
|
||||
#define BIT_INTR_ENABLE_FLIE 0x08
|
||||
#define BIT_INTR_ENABLE_RLOLIE 0x04
|
||||
#define BIT_INTR_ENABLE_RLOSIE 0x02
|
||||
#define BIT_INTR_ENABLE_DMOIE 0x01
|
||||
|
||||
#define REG_INTR_STATUS 0x02
|
||||
#define BIT_INTR_ENABLE_CNT_SATIS 0x20
|
||||
#define BIT_INTR_ENABLE_PRBSIS 0x10
|
||||
#define BIT_INTR_ENABLE_FLIS 0x08
|
||||
#define BIT_INTR_ENABLE_RLOLIS 0x04
|
||||
#define BIT_INTR_ENABLE_RLOSIS 0x02
|
||||
#define BIT_INTR_ENABLE_DMOIS 0x01
|
||||
|
||||
#define REG_ALARM_STATUS 0x03
|
||||
#define BIT_ALARM_STATUS_PRBSLS 0x40
|
||||
#define BIT_ALARM_STATUS_DLOS 0x20
|
||||
#define BIT_ALARM_STATUS_ALOS 0x10
|
||||
#define BIT_ALARM_STATUS_FL 0x08
|
||||
#define BIT_ALARM_STATUS_RLOL 0x04
|
||||
#define BIT_ALARM_STATUS_RLOS 0x02
|
||||
#define BIT_ALARM_STATUS_DMO 0x01
|
||||
|
||||
#define REG_TRANSMIT_CTRL 0x04
|
||||
#define BIT_TRANSMIT_CTRL_TxMON 0x20
|
||||
#define BIT_TRANSMIT_CTRL_INSPRBS 0x10
|
||||
#define BIT_TRANSMIT_CTRL_TAOS 0x04
|
||||
#define BIT_TRANSMIT_CTRL_TxClkINV 0x02
|
||||
#define BIT_TRANSMIT_CTRL_TxLEV 0x01
|
||||
|
||||
#define REG_RECEIVE_CTRL 0x05
|
||||
#define BIT_RECEIVE_CTRL_DLOSDIS 0x20
|
||||
#define BIT_RECEIVE_CTRL_ALOSDIS 0x10
|
||||
#define BIT_RECEIVE_CTRL_RxClkINV 0x08
|
||||
#define BIT_RECEIVE_CTRL_LOSMUT 0x04
|
||||
#define BIT_RECEIVE_CTRL_RxMIN 0x02
|
||||
#define BIT_RECEIVE_CTRL_REQEN 0x01
|
||||
|
||||
#define REG_BLOCK_CTRL 0x06
|
||||
#define BIT_BLOCK_CTRL_PRBSEN 0x20
|
||||
#define BIT_BLOCK_CTRL_RLB 0x10
|
||||
#define BIT_BLOCK_CTRL_LLB 0x08
|
||||
#define BIT_BLOCK_CTRL_E3 0x04
|
||||
#define BIT_BLOCK_CTRL_STS1 0x02
|
||||
#define BIT_BLOCK_CTRL_SR 0x01
|
||||
|
||||
#define REG_JITTER_ATTENUATOR 0x07
|
||||
#define BIT_JITTER_ATTENUATOR_PNTRST 0x08
|
||||
#define BIT_JITTER_ATTENUATOR_JA1 0x04
|
||||
#define BIT_JITTER_ATTENUATOR_JAT 0x02
|
||||
#define BIT_JITTER_ATTENUATOR_JA0 0x01
|
||||
|
||||
#define REG_GLOBAL_INTR_ENABLE 0x20
|
||||
#define BIT_GLOBAL_INTR_ENABLE_INTEN 0x01
|
||||
|
||||
#define REG_GLOBAL_INTR_STATUS 0x21
|
||||
#define BIT_GLOBAL_INTR_STATUS_INTST 0x01
|
||||
|
||||
#define REG_PRBS_ERROR_CNT_MSB 0x30
|
||||
#define BIT_PRBS_ERROR_CNT_MSB_MSB 0x80
|
||||
#define BIT_PRBS_ERROR_CNT_MSB_LSB 0x01
|
||||
|
||||
#define REG_PRBS_ERROR_CNT_LSB 0x31
|
||||
#define BIT_PRBS_ERROR_CNT_LSB_MSB 0x80
|
||||
#define BIT_PRBS_ERROR_CNT_LSB_LSB 0x01
|
||||
|
||||
#define REG_PRBS_HOLDING 0x38
|
||||
#define BIT_PRBS_HOLDING_MSB 0x80
|
||||
#define BIT_PRBS_HOLDING_LSB 0x01
|
||||
|
||||
#define REG_CHIP_ID 0x3E
|
||||
#define REG_CHIP_VERSION 0x3F
|
||||
|
||||
/* T3/E3 Framer registers */
|
||||
#define REG_OPMODE 0x00
|
||||
#define BIT_OPMODE_LOCAL_LB 0x80
|
||||
#define BIT_OPMODE_DS3 0x40
|
||||
#define BIT_OPMODE_INTERNAL_LOS 0x20
|
||||
#define BIT_OPMODE_RESET 0x10
|
||||
#define BIT_OPMODE_INT_ENABLE_RESET 0x08
|
||||
#define BIT_OPMODE_FRAME_FRMT 0x04
|
||||
#define BIT_OPMODE_TIMREFSEL1 0x02
|
||||
#define BIT_OPMODE_TIMREFSEL0 0x01
|
||||
|
||||
#define REG_IO_CONTROL 0x01
|
||||
#define BIT_IO_CONTROL_DISABLE_TXLOC 0x80
|
||||
#define BIT_IO_CONTROL_LOC_STATUS 0x40
|
||||
#define BIT_IO_CONTROL_DISABLE_RXLOC 0x20
|
||||
#define BIT_IO_CONTROL_AMI 0x10
|
||||
#define BIT_IO_CONTROL_UNIPOLAR 0x08
|
||||
#define BIT_IO_CONTROL_TxLINECLK 0x04
|
||||
#define BIT_IO_CONTROL_RxLINECLK 0x02
|
||||
#define BIT_IO_CONTROL_REFRAME 0x01
|
||||
|
||||
#define REG_PART_NUMBER 0x02
|
||||
|
||||
#define REG_VERSION_NUMBER 0x03
|
||||
|
||||
#define REG_BLOCK_INT_ENABLE 0x04
|
||||
#define BIT_BLOCK_INT_ENABLE_RxDS3_E3 0x80
|
||||
#define BIT_BLOCK_INT_ENABLE_TxDS3_E3 0x02
|
||||
#define BIT_BLOCK_INT_ENABLE_1SEC_INT 0x01
|
||||
|
||||
#define REG_BLOCK_INT_STATUS 0x05
|
||||
#define BIT_BLOCK_INT_STATUS_RxDS3_E3 0x80
|
||||
#define BIT_BLOCK_INT_STATUS_TxDS3_E3 0x02
|
||||
#define BIT_BLOCK_INT_STATUS_1SEC_INT 0x01
|
||||
|
||||
/* Receive DS3 */
|
||||
#define REG_RxDS3_CFG_STATUS 0x10
|
||||
#define BIT_RxDS3_CFG_STATUS_RxAIS 0x80
|
||||
#define BIT_RxDS3_CFG_STATUS_RxLOS 0x40
|
||||
#define BIT_RxDS3_CFG_STATUS_RxIDLE 0x20
|
||||
#define BIT_RxDS3_CFG_STATUS_RxOOF 0x10
|
||||
#define BIT_RxDS3_CFG_STATUS_FRAMING 0x04
|
||||
#define BIT_RxDS3_CFG_STATUS_FSYNC_ALGO 0x02
|
||||
#define BIT_RxDS3_CFG_STATUS_MSYNC_ALGO 0x01
|
||||
|
||||
#define REG_RxDS3_STATUS 0x11
|
||||
#define BIT_RxDS3_STATUS_RxFERF 0x10
|
||||
#define BIT_RxDS3_STATUS_RxAIC 0x08
|
||||
#define BIT_RxDS3_STATUS_RxFEBE2 0x04
|
||||
#define BIT_RxDS3_STATUS_RxFEBE1 0x02
|
||||
#define BIT_RxDS3_STATUS_RxFEBE0 0x01
|
||||
|
||||
#define REG_RxDS3_INT_ENABLE 0x12
|
||||
#define BIT_RxDS3_INT_ENABLE_CPBIT_ERR 0x80
|
||||
#define BIT_RxDS3_INT_ENABLE_LOS 0x40
|
||||
#define BIT_RxDS3_INT_ENABLE_AIS 0x20
|
||||
#define BIT_RxDS3_INT_ENABLE_IDLE 0x10
|
||||
#define BIT_RxDS3_INT_ENABLE_FERF 0x08
|
||||
#define BIT_RxDS3_INT_ENABLE_AIC 0x04
|
||||
#define BIT_RxDS3_INT_ENABLE_OOF 0x02
|
||||
#define BIT_RxDS3_INT_ENABLE_PBIT_ERR 0x01
|
||||
|
||||
#define REG_RxDS3_INT_STATUS 0x13
|
||||
#define BIT_RxDS3_INT_STATUS_CPBIT_ERR 0x80
|
||||
#define BIT_RxDS3_INT_STATUS_LOS 0x40
|
||||
#define BIT_RxDS3_INT_STATUS_AIS 0x20
|
||||
#define BIT_RxDS3_INT_STATUS_IDLE 0x10
|
||||
#define BIT_RxDS3_INT_STATUS_FERF 0x08
|
||||
#define BIT_RxDS3_INT_STATUS_AIC 0x04
|
||||
#define BIT_RxDS3_INT_STATUS_OOF 0x02
|
||||
#define BIT_RxDS3_INT_STATUS_PBIT_ERR 0x01
|
||||
|
||||
/* Receive E3, ITU-T G.832 */
|
||||
#define REG_RxE3_CFG_STATUS_1 0x10
|
||||
#define BIT_RxE3_CFG_STATUS_RxPLDType2 0x80
|
||||
#define BIT_RxE3_CFG_STATUS_RxPLDType1 0x40
|
||||
#define BIT_RxE3_CFG_STATUS_RxPLDType0 0x20
|
||||
#define BIT_RxE3_CFG_STATUS_RxFERF_ALGO 0x10
|
||||
#define BIT_RxE3_CFG_STATUS_RxTMARK_ALGO 0x08
|
||||
#define BIT_RxE3_CFG_STATUS_RxPLDExp2 0x80
|
||||
#define BIT_RxE3_CFG_STATUS_RxPLDExp1 0x40
|
||||
#define BIT_RxE3_CFG_STATUS_RxPLDExp0 0x20
|
||||
|
||||
#define REG_RxE3_CFG_STATUS_2 0x11
|
||||
#define BIT_RxE3_CFG_STATUS_RxLOF_ALGO 0x80
|
||||
#define BIT_RxE3_CFG_STATUS_RxLOF 0x40
|
||||
#define BIT_RxE3_CFG_STATUS_RxOOF 0x20
|
||||
#define BIT_RxE3_CFG_STATUS_RxLOS 0x10
|
||||
#define BIT_RxE3_CFG_STATUS_RxAIS 0x08
|
||||
#define BIT_RxE3_CFG_STATUS_RxPLD 0x04
|
||||
#define BIT_RxE3_CFG_STATUS_RxTMARK 0x02
|
||||
#define BIT_RxE3_CFG_STATUS_RxFERF 0x01
|
||||
|
||||
#define REG_RxE3_INT_ENABLE_1 0x12
|
||||
#define BIT_RxE3_INT_ENABLE_SSM_MSG 0x40
|
||||
#define BIT_RxE3_INT_ENABLE_SSM_OOS 0x20
|
||||
#define BIT_RxE3_INT_ENABLE_COFA 0x10
|
||||
#define BIT_RxE3_INT_ENABLE_OOF 0x08
|
||||
#define BIT_RxE3_INT_ENABLE_LOF 0x04
|
||||
#define BIT_RxE3_INT_ENABLE_LOS 0x02
|
||||
#define BIT_RxE3_INT_ENABLE_AIS 0x01
|
||||
|
||||
#define REG_RxE3_INT_ENABLE_2 0x13
|
||||
#define BIT_RxE3_INT_ENABLE_TTB_CHANGE 0x40
|
||||
#define BIT_RxE3_INT_ENABLE_FEBE 0x10
|
||||
#define BIT_RxE3_INT_ENABLE_FERF 0x08
|
||||
#define BIT_RxE3_INT_ENABLE_BIP_8 0x04
|
||||
#define BIT_RxE3_INT_ENABLE_FRAMING 0x02
|
||||
#define BIT_RxE3_INT_ENABLE_RxPLD 0x01
|
||||
|
||||
#define REG_RxE3_INT_STATUS_1 0x14
|
||||
#define BIT_RxE3_INT_STATUS_SSM_MSG 0x40
|
||||
#define BIT_RxE3_INT_STATUS_SSM_OOS 0x20
|
||||
#define BIT_RxE3_INT_STATUS_COFA 0x10
|
||||
#define BIT_RxE3_INT_STATUS_OOF 0x08
|
||||
#define BIT_RxE3_INT_STATUS_LOF 0x04
|
||||
#define BIT_RxE3_INT_STATUS_LOS 0x02
|
||||
#define BIT_RxE3_INT_STATUS_AIS 0x01
|
||||
|
||||
#define REG_RxE3_INT_STATUS_2 0x15
|
||||
#define BIT_RxE3_INT_STATUS_TTB_CHANGE 0x40
|
||||
#define BIT_RxE3_INT_STATUS_FEBE 0x10
|
||||
#define BIT_RxE3_INT_STATUS_FERF 0x08
|
||||
#define BIT_RxE3_INT_STATUS_BIP_8 0x04
|
||||
#define BIT_RxE3_INT_STATUS_FRAMING 0x02
|
||||
#define BIT_RxE3_INT_STATUS_RxPLD 0x01
|
||||
|
||||
/* Receive E3, ITU-T G.751 */
|
||||
//#define REG_RxE3_CFG_STATUS_1 0x10
|
||||
//#define BIT_RxE3_CFG_STATUS_RxFERF_ALGO 0x10
|
||||
|
||||
//#define REG_RxE3_CFG_STATUS_2 0x11
|
||||
#define BIT_RxE3_CFG_STATUS_RxBIP4 0x01
|
||||
//#define BIT_RxE3_CFG_STATUS_RxLOF_ALGO 0x80
|
||||
//#define BIT_RxE3_CFG_STATUS_RxLOF 0x40
|
||||
//#define BIT_RxE3_CFG_STATUS_RxOOF 0x20
|
||||
//#define BIT_RxE3_CFG_STATUS_RxLOS 0x10
|
||||
//#define BIT_RxE3_CFG_STATUS_RxAIS 0x08
|
||||
//#define BIT_RxE3_CFG_STATUS_RxFERF 0x01
|
||||
|
||||
//#define REG_RxE3_INT_ENABLE_1 0x12
|
||||
//#define BIT_RxE3_INT_ENABLE_COFA 0x10
|
||||
//#define BIT_RxE3_INT_ENABLE_OOF 0x08
|
||||
//#define BIT_RxE3_INT_ENABLE_LOF 0x04
|
||||
//#define BIT_RxE3_INT_ENABLE_LOS 0x02
|
||||
//#define BIT_RxE3_INT_ENABLE_AIS 0x01
|
||||
|
||||
//#define REG_RxE3_INT_ENABLE_2 0x13
|
||||
//#define BIT_RxE3_INT_ENABLE_FERF 0x08
|
||||
//#define BIT_RxE3_INT_ENABLE_BIP-8 0x04
|
||||
//#define BIT_RxE3_INT_ENABLE_FRAMING 0x02
|
||||
|
||||
//#define REG_RxE3_INT_STATUS_1 0x14
|
||||
//#define BIT_RxE3_INT_STATUS_COFA 0x10
|
||||
//#define BIT_RxE3_INT_STATUS_OOF 0x08
|
||||
//#define BIT_RxE3_INT_STATUS_LOF 0x04
|
||||
//#define BIT_RxE3_INT_STATUS_LOS 0x02
|
||||
//#define BIT_RxE3_INT_STATUS_AIS 0x01
|
||||
|
||||
//#define REG_RxE3_INT_STATUS_2 0x15
|
||||
//#define BIT_RxE3_INT_STATUS_FERF 0x08
|
||||
//#define BIT_RxE3_INT_STATUS_BIP-8 0x04
|
||||
//#define BIT_RxE3_INT_STATUS_FRAMING 0x02
|
||||
|
||||
#define REG_RxDS3_FEAC 0x16
|
||||
#define BIT_RxDS3_FEAC_5 0x40
|
||||
#define BIT_RxDS3_FEAC_4 0x20
|
||||
#define BIT_RxDS3_FEAC_3 0x10
|
||||
#define BIT_RxDS3_FEAC_2 0x08
|
||||
#define BIT_RxDS3_FEAC_1 0x04
|
||||
#define BIT_RxDS3_FEAC_0 0x02
|
||||
|
||||
#define REG_RxDS3_FEAC_INT 0x17
|
||||
#define BIT_RxDS3_FEAC_INT_FEAC_VALID 0x10
|
||||
#define BIT_RxDS3_FEAC_REMOVE_INT_EN 0x08
|
||||
#define BIT_RxDS3_FEAC_REMOVE_INT_STATUS 0x04
|
||||
#define BIT_RxDS3_FEAC_VALID_INT_EN 0x02
|
||||
#define BIT_RxDS3_FEAC_VALID_INT_STATUS 0x01
|
||||
|
||||
/* Transmit DS3 */
|
||||
#define REG_TxDS3_CFG 0x30
|
||||
#define BIT_TxDS3_CFG_YELLOW_ALARM 0x80
|
||||
#define BIT_TxDS3_CFG_XBits 0x40
|
||||
#define BIT_TxDS3_CFG_IDLE 0x20
|
||||
#define BIT_TxDS3_CFG_AIS 0x10
|
||||
#define BIT_TxDS3_CFG_LOS 0x08
|
||||
#define BIT_TxDS3_CFG_FERF_on_LOS 0x04
|
||||
#define BIT_TxDS3_CFG_FERF_on_OOF 0x02
|
||||
#define BIT_TxDS3_CFG_FERF_on_AIS 0x01
|
||||
|
||||
#define REG_TxDS3_CFG_STATUS 0x31
|
||||
#define BIT_TxDS3_CFG_STATUS_FEAC_INTE 0x10
|
||||
#define BIT_TxDS3_CFG_STATUS_FEAC_INTS 0x08
|
||||
#define BIT_TxDS3_CFG_STATUS_FEAC_ENABLE 0x04
|
||||
#define BIT_TxDS3_CFG_STATUS_FEAC_GO 0x02
|
||||
#define BIT_TxDS3_CFG_STATUS_FEAC_BUSY 0x01
|
||||
|
||||
#define REG_TxDS3_LAPD_STATUS 0x34
|
||||
#define BIT_TxDS3_LAPD_STATUS_START 0x08
|
||||
#define BIT_TxDS3_LAPD_STATUS_BUSY 0x04
|
||||
#define BIT_TxDS3_LAPD_STATUS_INT_EN 0x02
|
||||
#define BIT_TxDS3_LAPD_STATUS_INT 0x01
|
||||
|
||||
/* Transmit E3, ITU-T G.832 */
|
||||
#define REG_TxE3_CFG 0x30
|
||||
#define BIT_TxE3_CFG_DLinNR 0x10
|
||||
#define BIT_TxE3_CFG_AIS_ENABLE 0x04
|
||||
#define BIT_TxE3_CFG_LOS_ENABLE 0x02
|
||||
#define BIT_TxE3_CFG_MARx 0x01
|
||||
|
||||
/* Transmit E3, ITU-T G.751 */
|
||||
#define REG_TxE3_CFG 0x30
|
||||
#define BIT_TxE3_CFG_BIP4_ENABLE 0x80
|
||||
#define BIT_TxE3_CFG_ASRCSEL1 0x40
|
||||
#define BIT_TxE3_CFG_ASRCSEL0 0x20
|
||||
#define BIT_TxE3_CFG_NSRCSEL1 0x10
|
||||
#define BIT_TxE3_CFG_NSRCSEL0 0x08
|
||||
#define BIT_TxE3_CFG_AIS_ENABLE 0x04
|
||||
#define BIT_TxE3_CFG_LOS_ENABLE 0x02
|
||||
#define BIT_TxE3_CFG_FAS_SRC_SELECT 0x01
|
||||
|
||||
/* Performance Monitor Registers */
|
||||
#define REG_PMON_LCV_MSB 0x50
|
||||
#define REG_PMON_LCV_LSB 0x51
|
||||
#define REG_PMON_FRAMING_ERR_CNT_MSB 0x52
|
||||
#define REG_PMON_FRAMING_ERR_CNT_LSB 0x53
|
||||
#define REG_PMON_PARITY_ERR_CNT_MSB 0x54
|
||||
#define REG_PMON_PARITY_ERR_CNT_LSB 0x55
|
||||
#define REG_PMON_FEBE_EVENT_CNT_MSB 0x56
|
||||
#define REG_PMON_FEBE_EVENT_CNT_LSB 0x57
|
||||
#define REG_PMON_CPBIT_ERROR_CNT_MSB 0x58
|
||||
#define REG_PMON_CPBIT_ERROR_CNT_LSB 0x59
|
||||
#define REG_PMON_HOLDING 0x6C
|
||||
|
||||
/* One-Second Error Status Register */
|
||||
#define REG_ONESECOND_ERR_STATUS 0x6D
|
||||
#define BIT_ONESECOND_ERR_STATUS_ERR 0x02
|
||||
#define BIT_ONESECOND_ERR_STATUS_SEVERELY_ERR 0x01
|
||||
|
||||
#define REG_ONESECOND_LCV_MSB 0x6E
|
||||
#define REG_ONESECOND_LCV_LSB 0x6F
|
||||
#define REG_ONESECOND_FRAME_PARITY_ERR_MSB 0x70
|
||||
#define REG_ONESECOND_FRAME_PARITY_ERR_LSB 0x71
|
||||
#define REG_ONESECOND_FRAME_CPBIT_ERR_MSB 0x72
|
||||
#define REG_ONESECOND_FRAME_CPBIT_ERR_LSB 0x73
|
||||
|
||||
#define REG_LINE_INTERFACE_DRIVE 0x80
|
||||
#define BIT_LINE_INTERFACE_DRIVE_REQB 0x20
|
||||
#define BIT_LINE_INTERFACE_DRIVE_TAOS 0x10
|
||||
#define BIT_LINE_INTERFACE_DRIVE_ENCODIS 0x08
|
||||
#define BIT_LINE_INTERFACE_DRIVE_TxLEV 0x04
|
||||
#define BIT_LINE_INTERFACE_DRIVE_RLOOP 0x02
|
||||
#define BIT_LINE_INTERFACE_DRIVE_LLOOP 0x01
|
||||
|
||||
#define REG_LINE_INTERFACE_SCAN 0x81
|
||||
#define BIT_LINE_INTERFACE_SCAN_DMO 0x04
|
||||
#define BIT_LINE_INTERFACE_SCAN_RLOL 0x02
|
||||
#define BIT_LINE_INTERFACE_SCAN_RLOS 0x01
|
||||
|
||||
/* T3/E3 CPLD register */
|
||||
#define REG_CPLD_CNTRL 0x00
|
||||
#define BIT_CPLD_CNTRL_REQEN 0x20
|
||||
#define BIT_CPLD_CNTRL_TxLEV 0x10
|
||||
#define BIT_CPLD_CNTRL_RxMON 0x08
|
||||
#define BIT_CPLD_CNTRL_LOSMUT 0x04
|
||||
#define BIT_CPLD_CNTRL_STS_1 0x02
|
||||
#define BIT_CPLD_CNTRL_E3 0x01
|
||||
|
||||
#define REG_CPLD_STATUS 0x01
|
||||
#define BIT_CPLD_STATUS_TAOS 0x80
|
||||
#define BIT_CPLD_STATUS_RLB 0x40
|
||||
#define BIT_CPLD_STATUS_LLB 0x20
|
||||
#define BIT_CPLD_STATUS_RLOL 0x04
|
||||
#define BIT_CPLD_STATUS_RLOS 0x02
|
||||
#define BIT_CPLD_STATUS_DMO 0x01
|
||||
|
||||
/* T3/E3 Exar Shark CPLD register */
|
||||
#define REG_EXAR_CPLD_CNTRL 0x00
|
||||
#define BIT_EXAR_CPLD_CNTRL_RxRED 0x100
|
||||
#define BIT_EXAR_CPLD_CNTRL_RxAIS 0x080
|
||||
#define BIT_EXAR_CPLD_CNTRL_RxOOF 0x040
|
||||
#define BIT_EXAR_CPLD_CNTRL_RxLOS 0x020
|
||||
#define BIT_EXAR_CPLD_CNTRL_TxAIS 0x010
|
||||
#define BIT_EXAR_CPLD_CNTRL_RMON 0x008
|
||||
#define BIT_EXAR_CPLD_CNTRL_LMUT 0x004
|
||||
#define BIT_EXAR_CPLD_CNTRL_E3 0x002
|
||||
#define BIT_EXAR_CPLD_CNTRL_DS3 0x001
|
||||
|
||||
|
||||
#endif /* __SDLA_TE3_REG_H */
|
|
@ -0,0 +1,114 @@
|
|||
/*******************************************************************************
|
||||
** sdla_remora.h
|
||||
**
|
||||
** Author: Alex Feldman <al.feldman@sangoma.com>
|
||||
**
|
||||
** Copyright: (c) 2005 Sangoma Technologies Inc.
|
||||
**
|
||||
** This program is free software; you can redistribute it and/or
|
||||
** modify it under the terms of the GNU General Public License
|
||||
** as published by the Free Software Foundation; either version
|
||||
** 2 of the License, or (at your option) any later version.
|
||||
** ============================================================================
|
||||
** Oct 6, 2005 Alex Feldman Initial version.
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef __SDLA_USB_REMORA_H
|
||||
# define __SDLA_USB_REMORA_H
|
||||
|
||||
#ifdef __SDLA_REMORA_SRC
|
||||
# define WP_EXTERN
|
||||
#else
|
||||
# define WP_EXTERN extern
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
** DEFINES and MACROS
|
||||
*******************************************************************************/
|
||||
|
||||
#define IS_FXOFXS_CARD(card) IS_FXOFXS_FEMEDIA(&(card)->fe)
|
||||
|
||||
#define MAX_USB_REMORA_MODULES 2
|
||||
#define MAX_USB_FXOFXS_CHANNELS MAX_USB_REMORA_MODULES
|
||||
|
||||
/* Front-End UDP command */
|
||||
#if defined(__WINDOWS__)
|
||||
#define WAN_FE_TONES 13
|
||||
#define WAN_FE_RING (WAN_FE_TONES + 1)
|
||||
#define WAN_FE_REGDUMP (WAN_FE_TONES + 2)
|
||||
#define WAN_FE_STATS (WAN_FE_TONES + 3)
|
||||
#else
|
||||
#define WAN_FE_TONES (WAN_FE_UDP_CMD_START + 0)
|
||||
#define WAN_FE_RING (WAN_FE_UDP_CMD_START + 1)
|
||||
#define WAN_FE_REGDUMP (WAN_FE_UDP_CMD_START + 2)
|
||||
#define WAN_FE_STATS (WAN_FE_UDP_CMD_START + 3)
|
||||
#endif
|
||||
|
||||
#define WAN_RM_SET_ECHOTUNE _IOW (ZT_CODE, 63, struct wan_rm_echo_coefs)
|
||||
|
||||
/* RM interrupt types */
|
||||
#define WAN_RM_INTR_NONE 0x00
|
||||
#define WAN_RM_INTR_GLOBAL 0x01
|
||||
|
||||
/* Signalling types */
|
||||
#define __WAN_RM_SIG_FXO (1 << 12) /* Never use directly */
|
||||
#define __WAN_RM_SIG_FXS (1 << 13) /* Never use directly */
|
||||
|
||||
#define WAN_RM_SIG_NONE (0) /* Channel not configured */
|
||||
#define WAN_RM_SIG_FXSLS ((1 << 0) | __WAN_RM_SIG_FXS) /* FXS, Loopstart */
|
||||
#define WAN_RM_SIG_FXSGS ((1 << 1) | __WAN_RM_SIG_FXS) /* FXS, Groundstart */
|
||||
#define WAN_RM_SIG_FXSKS ((1 << 2) | __WAN_RM_SIG_FXS) /* FXS, Kewlstart */
|
||||
|
||||
#define WAN_RM_SIG_FXOLS ((1 << 3) | __WAN_RM_SIG_FXO) /* FXO, Loopstart */
|
||||
#define WAN_RM_SIG_FXOGS ((1 << 4) | __WAN_RM_SIG_FXO) /* FXO, Groupstart */
|
||||
#define WAN_RM_SIG_FXOKS ((1 << 5) | __WAN_RM_SIG_FXO) /* FXO, Kewlstart */
|
||||
|
||||
#define WAN_RM_SIG_EM (1 << 6) /* Ear & Mouth (E&M) */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** TYPEDEF STRUCTURE
|
||||
*******************************************************************************/
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
#define NUM_CAL_REGS 12
|
||||
|
||||
#if !defined(WAN_DEBUG_FE)
|
||||
# define WRITE_USB_RM_REG(mod_no,reg,val) \
|
||||
fe->write_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)reg, (int)val)
|
||||
# define READ_USB_RM_REG(mod_no,reg) \
|
||||
fe->read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)reg)
|
||||
#else
|
||||
# define WRITE_USB_RM_REG(mod_no,reg,val) \
|
||||
fe->write_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)reg, (int)val,__FILE__,(int)__LINE__)
|
||||
# define READ_USB_RM_REG(mod_no,reg) \
|
||||
fe->read_fe_reg( ((sdla_t*)fe->card)->hw, \
|
||||
(int)mod_no, \
|
||||
(int)reg,__FILE__,(int)__LINE__)
|
||||
#endif
|
||||
|
||||
/* Sangoma A200 event bit map */
|
||||
#define WAN_RM_EVENT_DTMF 1 /* DTMF event */
|
||||
#define WAN_RM_EVENT_LC 2 /* Loop closure event */
|
||||
#define WAN_RM_EVENT_RING_TRIP 3 /* Ring trip event */
|
||||
#define WAN_RM_EVENT_POWER 4 /* Power event */
|
||||
#define WAN_RM_EVENT_RING 5 /* Ring event */
|
||||
#define WAN_RM_EVENT_TONE 6 /* Play tone */
|
||||
#define WAN_RM_EVENT_RING_DETECT 7 /* Ring detect event */
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
/*******************************************************************************
|
||||
** FUNCTION PROTOTYPES
|
||||
*******************************************************************************/
|
||||
extern int wp_usb_remora_iface_init(void*, void*);
|
||||
|
||||
#undef WP_EXTERN
|
||||
#endif /* __SDLA_USB_REMORA_H */
|
|
@ -0,0 +1,789 @@
|
|||
/*****************************************************************************
|
||||
* sdla_x25.h Sangoma X.25 firmware API definitions.
|
||||
*
|
||||
* Author: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2000 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Feb 28, 2000 Nenad Corbic Updated for socket based x25api
|
||||
* Dec 13, 1996 Gene Kozin Initial version
|
||||
*****************************************************************************/
|
||||
#ifndef _SDLA_X25_H
|
||||
#define _SDLA_X25_H
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Notes:
|
||||
* ------
|
||||
* 1. All structures defined in this file are byte-alined.
|
||||
* Compiler Platform
|
||||
* -------- --------
|
||||
* GNU C Linux
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#include "wanpipe_x25_kernel.h"
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/****** CONSTANTS DEFINITIONS ***********************************************/
|
||||
|
||||
#define X25_MAX_CHAN 255 /* max number of open X.25 circuits */
|
||||
#define X25_MAX_DATA 1024 /* max length of X.25 data buffer */
|
||||
/*
|
||||
* X.25 shared memory layout.
|
||||
*/
|
||||
#define X25_MBOX_OFFS 0x16B0 /* general mailbox block */
|
||||
#define X25_RXMBOX_OFFS 0x1AD0 /* receive mailbox */
|
||||
#define X25_STATUS_OFFS 0x1EF0 /* X.25 status structure */
|
||||
#define X25_MB_VECTOR 0xE000 /* S514 mailbox window vecotr */
|
||||
#define X25_MISC_HDLC_BITS 0x1F00 /*X.25 miscallaneous HDLC bits */
|
||||
#define X25_MODEM_STATE_OFFS 0xF6AF /* Mode state offset */
|
||||
#define X25_TX_TIMEOUT_OFFS 0xF6AE /* Tx Timeout: detect no tx clock */
|
||||
|
||||
/* code levels */
|
||||
#define HDLC_LEVEL 0x01
|
||||
#define X25_LEVEL 0x02
|
||||
#define X25_AND_HDLC_LEVEL 0x03
|
||||
#define DO_HDLC_LEVEL_ERROR_CHECKING 0x04
|
||||
|
||||
/****** DATA STRUCTURES *****************************************************/
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X.25 Command Block.
|
||||
*/
|
||||
typedef struct X25Cmd
|
||||
{
|
||||
unsigned char command ; /* command code */
|
||||
unsigned short length ; /* transfer data length */
|
||||
unsigned char result ; /* return code */
|
||||
unsigned char pf ; /* P/F bit */
|
||||
unsigned short lcn ; /* logical channel */
|
||||
unsigned char qdm ; /* Q/D/M bits */
|
||||
unsigned char cause ; /* cause field */
|
||||
unsigned char diagn ; /* diagnostics */
|
||||
unsigned char pktType ; /* packet type */
|
||||
unsigned char resrv[4] ; /* reserved */
|
||||
} TX25Cmd;
|
||||
|
||||
/*
|
||||
* Defines for the 'command' field.
|
||||
*/
|
||||
/*----- General commands --------------*/
|
||||
#define X25_SET_GLOBAL_VARS 0x0B /* set global variables */
|
||||
#define X25_READ_MODEM_STATUS 0x0C /* read modem status */
|
||||
#define X25_READ_CODE_VERSION 0x15 /* read firmware version number */
|
||||
#define X25_TRACE_CONFIGURE 0x14 /* configure trace facility */
|
||||
#define X25_READ_TRACE_DATA 0x16 /* read trace data */
|
||||
#define X25_SET_INTERRUPT_MODE 0x17 /* set interrupt generation mode */
|
||||
#define X25_READ_INTERRUPT_MODE 0x18 /* read interrupt generation mode */
|
||||
/*----- HDLC-level commands -----------*/
|
||||
#define X25_HDLC_LINK_CONFIGURE 0x01 /* configure HDLC link level */
|
||||
#define X25_HDLC_LINK_OPEN 0x02 /* open HDLC link */
|
||||
#define X25_HDLC_LINK_CLOSE 0x03 /* close HDLC link */
|
||||
#define X25_HDLC_LINK_SETUP 0x04 /* set up HDLC link */
|
||||
#define X25_HDLC_LINK_DISC 0x05 /* disconnect DHLC link */
|
||||
#define X25_HDLC_LINK_STATUS 0x06 /* read DHLC link status */
|
||||
#define X25_HDLC_READ_STATS 0x07 /* read operational statistics */
|
||||
#define X25_HDLC_FLUSH_STATS 0x08 /* flush operational statistics */
|
||||
#define X25_HDLC_READ_COMM_ERR 0x09 /* read error statistics */
|
||||
#define X25_HDLC_FLUSH_COMM_ERR 0x0A /* flush error statistics */
|
||||
#define X25_HDLC_FLUSH_BUFFERS 0x0D /* flush HDLC-level data buffers */
|
||||
#define X25_HDLC_SPRVS_CNT_STAT 0x0F /* read surervisory count status */
|
||||
#define X25_HDLC_SEND_UI_FRAME 0x10 /* send unnumbered information frame */
|
||||
#define X25_HDLC_WRITE 0x11 /* send HDLC information frame */
|
||||
#define X25_HDLC_READ 0x21 /* read HDLC information frame */
|
||||
#define X25_HDLC_READ_CONFIG 0x12 /* read HDLC configuration */
|
||||
#define X25_HDLC_SET_CONFIG 0x13 /* set HDLC configuration */
|
||||
#define SET_PROTOCOL_LEVEL 0x1F /* set protocol level */
|
||||
/*----- X.25-level commands -----------*/
|
||||
#define X25_READ 0x22 /* read X.25 packet */
|
||||
#define X25_WRITE 0x23 /* send X.25 packet */
|
||||
#define X25_PLACE_CALL 0x30 /* place a call on SVC */
|
||||
#define X25_ACCEPT_CALL 0x31 /* accept incomming call */
|
||||
#define X25_CLEAR_CALL 0x32 /* clear call */
|
||||
#define X25_CLEAR_CONFRM 0x33 /* send clear confirmation packet */
|
||||
#define X25_RESET 0x34 /* send reset request packet */
|
||||
#define X25_RESET_CONFRM 0x35 /* send reset confirmation packet */
|
||||
#define X25_RESTART 0x36 /* send restart request packet */
|
||||
#define X25_RESTART_CONFRM 0x37 /* send restart confirmation packet */
|
||||
#define X25_WP_INTERRUPT 0x38 /* send interrupt request packet */
|
||||
#define X25_INTERRUPT_CONFRM 0x39 /* send interrupt confirmation pkt */
|
||||
#define X25_REGISTRATION_RQST 0x3A /* send registration request packet */
|
||||
#define X25_REGISTRATION_CONFRM 0x3B /* send registration confirmation */
|
||||
#define X25_IS_DATA_AVAILABLE 0x40 /* querry receive queue */
|
||||
#define X25_INCOMMING_CALL_CTL 0x41 /* select incomming call options */
|
||||
#define X25_CONFIGURE_PVC 0x42 /* configure PVC */
|
||||
#define X25_GET_ACTIVE_CHANNELS 0x43 /* get a list of active circuits */
|
||||
#define X25_READ_CHANNEL_CONFIG 0x44 /* read virt. circuit configuration */
|
||||
#define X25_FLUSH_DATA_BUFFERS 0x45 /* flush X.25-level data buffers */
|
||||
#define X25_READ_HISTORY_TABLE 0x46 /* read asynchronous event log */
|
||||
#define X25_HISTORY_TABLE_CTL 0x47 /* control asynchronous event log */
|
||||
#define X25_GET_TX_D_BIT_STATUS 0x48 /* is packet with D-bit acknowleged */
|
||||
#define X25_READ_STATISTICS 0x49 /* read X.25-level statistics */
|
||||
#define X25_FLUSH_STATISTICS 0x4A /* flush X.25-level statistics */
|
||||
#define X25_READ_CONFIGURATION 0x50 /* read HDLC & X.25 configuration */
|
||||
#define X25_SET_CONFIGURATION 0x51 /* set HDLC & X.25 configuration */
|
||||
|
||||
/*
|
||||
* Defines for the 'result' field.
|
||||
*/
|
||||
/*----- General results ---------------*/
|
||||
#define X25RES_OK 0x00
|
||||
#define X25RES_ERROR 0x01
|
||||
#define X25RES_LINK_NOT_IN_ABM 0x02 /* link is not in ABM mode */
|
||||
#define X25RES_LINK_CLOSED 0x03
|
||||
#define X25RES_INVAL_LENGTH 0x04
|
||||
#define X25RES_INVAL_CMD 0x05
|
||||
#define X25RES_UNNUMBERED_FRAME 0x06 /* unnunbered frame received */
|
||||
#define X25RES_FRM_REJECT_MODE 0x07 /* link is in Frame Reject mode */
|
||||
#define X25RES_MODEM_FAILURE 0x08 /* DCD and/or CTS dropped */
|
||||
#define X25RES_N2_RETRY_LIMIT 0x09 /* N2 retry limit has been exceeded */
|
||||
#define X25RES_INVAL_LCN 0x30 /* invalid logical channel number */
|
||||
#define X25RES_INVAL_STATE 0x31 /* channel is not in data xfer mode */
|
||||
#define X25RES_INVAL_DATA_LEN 0x32 /* invalid data length */
|
||||
#define X25RES_NOT_READY 0x33 /* no data available / buffers full */
|
||||
#define X25RES_NETWORK_DOWN 0x34
|
||||
#define X25RES_CHANNEL_IN_USE 0x35 /* there is data queued on this LCN */
|
||||
#define X25RES_REGST_NOT_SUPPRT 0x36 /* registration not supported */
|
||||
#define X25RES_INVAL_FORMAT 0x37 /* invalid packet format */
|
||||
#define X25RES_D_BIT_NOT_SUPPRT 0x38 /* D-bit pragmatics not supported */
|
||||
#define X25RES_FACIL_NOT_SUPPRT 0x39 /* Call facility not supported */
|
||||
#define X25RES_INVAL_CALL_ARG 0x3A /* errorneous call arguments */
|
||||
#define X25RES_INVAL_CALL_DATA 0x3B /* errorneous call user data */
|
||||
#define X25RES_ASYNC_PACKET 0x40 /* asynchronous packet received */
|
||||
#define X25RES_PROTO_VIOLATION 0x41 /* protocol violation occured */
|
||||
#define X25RES_PKT_TIMEOUT 0x42 /* X.25 packet time out */
|
||||
#define X25RES_PKT_RETRY_LIMIT 0x43 /* X.25 packet retry limit exceeded */
|
||||
/*----- Command-dependant results -----*/
|
||||
#define X25RES_LINK_DISC 0x00 /* HDLC_LINK_STATUS */
|
||||
#define X25RES_LINK_IN_ABM 0x01 /* HDLC_LINK_STATUS */
|
||||
#define X25RES_NO_DATA 0x01 /* HDLC_READ/READ_TRACE_DATA*/
|
||||
#define X25RES_TRACE_INACTIVE 0x02 /* READ_TRACE_DATA */
|
||||
#define X25RES_LINK_IS_OPEN 0x01 /* HDLC_LINK_OPEN */
|
||||
#define X25RES_LINK_IS_DISC 0x02 /* HDLC_LINK_DISC */
|
||||
#define X25RES_LINK_IS_CLOSED 0x03 /* HDLC_LINK_CLOSE */
|
||||
#define X25RES_INVAL_PARAM 0x31 /* INCOMMING_CALL_CTL */
|
||||
#define X25RES_INVAL_CONFIG 0x35 /* REGISTR_RQST/CONFRM */
|
||||
|
||||
/*
|
||||
* Defines for the 'qdm_bits' field.
|
||||
*/
|
||||
#define X25CMD_Q_BIT_MASK 0x04
|
||||
#define X25CMD_D_BIT_MASK 0x02
|
||||
#define X25CMD_M_BIT_MASK 0x01
|
||||
|
||||
/*
|
||||
* Defines for the 'pkt_type' field.
|
||||
*/
|
||||
/*----- Asynchronous events ------*/
|
||||
|
||||
#define ASE_LAPB_DOWN 0x00
|
||||
#define ASE_MODEM_DOWN X25_READ_MODEM_STATUS
|
||||
|
||||
#define ASE_CLEAR_RQST 0x02
|
||||
#define ASE_RESET_RQST 0x04
|
||||
#define ASE_RESTART_RQST 0x08
|
||||
#define ASE_INTERRUPT 0x10
|
||||
#define ASE_DTE_REGISTR_RQST 0x20
|
||||
#define ASE_CALL_RQST 0x30
|
||||
#define ASE_CALL_ACCEPTED 0x31
|
||||
#define ASE_CLEAR_CONFRM 0x32
|
||||
#define ASE_RESET_CONFRM 0x33
|
||||
#define ASE_RESTART_CONFRM 0x34
|
||||
#define ASE_INTERRUPT_CONFRM 0x35
|
||||
#define ASE_DCE_REGISTR_CONFRM 0x36
|
||||
#define ASE_DIAGNOSTIC 0x37
|
||||
#define ASE_CALL_AUTO_CLEAR 0x38
|
||||
#define AUTO_RESPONSE_FLAG 0x80
|
||||
/*----- Time-Out events ----------*/
|
||||
#define TOE_RESTART_RQST 0x03
|
||||
#define TOE_CALL_RQST 0x05
|
||||
#define TOE_CLEAR_RQST 0x08
|
||||
#define TOE_RESET_RQST 0x0A
|
||||
/*----- Protocol Violation events */
|
||||
#define PVE_CLEAR_RQST 0x32
|
||||
#define PVE_RESET_RQST 0x33
|
||||
#define PVE_RESTART_RQST 0x34
|
||||
#define PVE_DIAGNOSTIC 0x37
|
||||
|
||||
#define INTR_ON_RX_FRAME 0x01
|
||||
#define INTR_ON_TX_FRAME 0x02
|
||||
#define INTR_ON_MODEM_STATUS_CHANGE 0x04
|
||||
#define INTR_ON_COMMAND_COMPLETE 0x08
|
||||
#define INTR_ON_X25_ASY_TRANSACTION 0x10
|
||||
#define INTR_ON_TRACE_DATA 0x20
|
||||
#define INTR_ON_TIMER 0x40
|
||||
#define DIRECT_RX_INTR_USAGE 0x80
|
||||
|
||||
#define NO_INTR_PENDING 0x00
|
||||
#define RX_INTR_PENDING 0x01
|
||||
#define TX_INTR_PENDING 0x02
|
||||
#define MODEM_INTR_PENDING 0x04
|
||||
#define COMMAND_COMPLETE_INTR_PENDING 0x08
|
||||
#define X25_ASY_TRANS_INTR_PENDING 0x10
|
||||
#define TRACE_INTR_PENDING 0x20
|
||||
#define TIMER_INTR_PENDING 0x40
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X.25 Mailbox.
|
||||
* This structure is located at offsets X25_MBOX_OFFS and X25_RXMBOX_OFFS
|
||||
* into shared memory window.
|
||||
*/
|
||||
typedef struct X25Mbox
|
||||
{
|
||||
unsigned char opflag ; /* 00h: execution flag */
|
||||
TX25Cmd cmd ; /* 01h: command block */
|
||||
unsigned char data[1] ; /* 10h: data buffer */
|
||||
} TX25Mbox;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X.25 Time Stamp Structure.
|
||||
*/
|
||||
typedef struct X25TimeStamp
|
||||
{
|
||||
unsigned char month ;
|
||||
unsigned char date ;
|
||||
unsigned char sec ;
|
||||
unsigned char min ;
|
||||
unsigned char hour ;
|
||||
} TX25TimeStamp;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X.25 Status Block.
|
||||
* This structure is located at offset X25_STATUS_OFF into shared memory
|
||||
* window.
|
||||
*/
|
||||
typedef struct X25Status
|
||||
{
|
||||
unsigned short pvc_map ; /* 00h: PVC map */
|
||||
unsigned short icc_map ; /* 02h: Incomming Chan. map */
|
||||
unsigned short twc_map ; /* 04h: Two-way Cnan. map */
|
||||
unsigned short ogc_map ; /* 06h: Outgoing Chan. map */
|
||||
TX25TimeStamp tstamp ; /* 08h: timestamp (BCD) */
|
||||
unsigned char iflags ; /* 0Dh: interrupt flags */
|
||||
unsigned char imask ; /* 0Eh: interrupt mask */
|
||||
unsigned char resrv ; /* 0Eh: */
|
||||
unsigned char gflags ; /* 10h: misc. HDLC/X25 flags */
|
||||
unsigned char cflags[X25_MAX_CHAN] ; /* channel status bytes */
|
||||
} TX25Status;
|
||||
|
||||
/*
|
||||
* Bitmasks for the 'iflags' field.
|
||||
*/
|
||||
#define X25_RX_INTR 0x01 /* receive interrupt */
|
||||
#define X25_TX_INTR 0x02 /* transmit interrupt */
|
||||
#define X25_MODEM_INTR 0x04 /* modem status interrupt (CTS/DCD) */
|
||||
#define X25_EVENT_INTR 0x10 /* asyncronous event encountered */
|
||||
#define X25_CMD_INTR 0x08 /* interface command complete */
|
||||
|
||||
/*
|
||||
* Bitmasks for the 'gflags' field.
|
||||
*/
|
||||
#define X25_HDLC_ABM 0x01 /* HDLC is in ABM mode */
|
||||
#define X25_RX_READY 0x02 /* X.25 data available */
|
||||
#define X25_TRACE_READY 0x08 /* trace data available */
|
||||
#define X25_EVENT_IND 0x20 /* asynchronous event indicator */
|
||||
#define X25_TX_READY 0x40 /* space is available in Tx buf.*/
|
||||
|
||||
/*
|
||||
* Bitmasks for the 'cflags' field.
|
||||
*/
|
||||
#define X25_XFER_MODE 0x80 /* channel is in data transfer mode */
|
||||
#define X25_TXWIN_OPEN 0x40 /* transmit window open */
|
||||
#define X25_RXBUF_MASK 0x3F /* number of data buffers available */
|
||||
|
||||
/*****************************************************************************
|
||||
* Following definitions structurize contents of the TX25Mbox.data field for
|
||||
* different X.25 interface commands.
|
||||
****************************************************************************/
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_SET_GLOBAL_VARS Command.
|
||||
*/
|
||||
typedef struct X25GlobalVars
|
||||
{
|
||||
unsigned char resrv ; /* 00h: reserved */
|
||||
unsigned char dtrCtl ; /* 01h: DTR control code */
|
||||
unsigned char resErr ; /* 01h: '1' - reset modem error */
|
||||
} TX25GlobalVars;
|
||||
|
||||
/*
|
||||
* Defines for the 'dtrCtl' field.
|
||||
*/
|
||||
#define X25_RAISE_DTR 0x01
|
||||
#define X25_DROP_DTR 0x02
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_READ_MODEM_STATUS Command.
|
||||
*/
|
||||
typedef struct X25ModemStatus
|
||||
{
|
||||
unsigned char status ; /* 00h: modem status */
|
||||
} TX25ModemStatus;
|
||||
|
||||
/*
|
||||
* Defines for the 'status' field.
|
||||
*/
|
||||
#define X25_CTS_MASK 0x20
|
||||
#define X25_DCD_MASK 0x08
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_HDLC_LINK_STATUS Command.
|
||||
*/
|
||||
typedef struct X25LinkStatus
|
||||
{
|
||||
unsigned char txQueued ; /* 00h: queued Tx I-frames*/
|
||||
unsigned char rxQueued ; /* 01h: queued Rx I-frames*/
|
||||
unsigned char station ; /* 02h: DTE/DCE config. */
|
||||
unsigned char reserved ; /* 03h: reserved */
|
||||
unsigned char sfTally ; /* 04h: supervisory frame tally */
|
||||
} TX25LinkStatus;
|
||||
|
||||
/*
|
||||
* Defines for the 'station' field.
|
||||
*/
|
||||
#define X25_STATION_DTE 0x01 /* station configured as DTE */
|
||||
#define X25_STATION_DCE 0x02 /* station configured as DCE */
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_HDLC_READ_STATS Command.
|
||||
*/
|
||||
typedef struct HdlcStats
|
||||
{ /* a number of ... */
|
||||
unsigned short rxIFrames ; /* 00h: ready Rx I-frames */
|
||||
unsigned short rxNoseq ; /* 02h: frms out-of-sequence */
|
||||
unsigned short rxNodata ; /* 04h: I-frms without data */
|
||||
unsigned short rxDiscarded ; /* 06h: discarded frames */
|
||||
unsigned short rxTooLong ; /* 08h: frames too long */
|
||||
unsigned short rxBadAddr ; /* 0Ah: frms with inval.addr*/
|
||||
unsigned short txAcked ; /* 0Ch: acknowledged I-frms */
|
||||
unsigned short txRetransm ; /* 0Eh: re-transmit. I-frms */
|
||||
unsigned short t1Timeout ; /* 10h: T1 timeouts */
|
||||
unsigned short rxSABM ; /* 12h: received SABM frames */
|
||||
unsigned short rxDISC ; /* 14h: received DISC frames */
|
||||
unsigned short rxDM ; /* 16h: received DM frames */
|
||||
unsigned short rxFRMR ; /* 18h: FRMR frames received */
|
||||
unsigned short txSABM ; /* 1Ah: transm. SABM frames*/
|
||||
unsigned short txDISC ; /* 1Ch: transm. DISC frames*/
|
||||
unsigned short txDM ; /* 1Eh: transm. DM frames */
|
||||
unsigned short txFRMR ; /* 20h: transm. FRMR frames*/
|
||||
} THdlcStats;
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_HDLC_READ_COMM_ERR Command.
|
||||
*/
|
||||
typedef struct HdlcCommErr
|
||||
{ /* a number of ... */
|
||||
unsigned char rxOverrun ; /* 00h: Rx overrun errors */
|
||||
unsigned char rxBadCrc ; /* 01h: Rx CRC errors */
|
||||
unsigned char rxAborted ; /* 02h: Rx aborted frames */
|
||||
unsigned char rxDropped ; /* 03h: frames lost */
|
||||
unsigned char txAborted ; /* 04h: Tx aborted frames */
|
||||
unsigned char txUnderrun ; /* 05h: Tx underrun errors */
|
||||
unsigned char txMissIntr ; /* 06h: missed underrun ints */
|
||||
unsigned char reserved ; /* 07h: reserved */
|
||||
unsigned char droppedDCD ; /* 08h: times DCD dropped */
|
||||
unsigned char droppedCTS ; /* 09h: times CTS dropped */
|
||||
} THdlcCommErr;
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_SET_CONFIGURATION & X25_READ_CONFIGURATION Commands.
|
||||
*/
|
||||
typedef struct X25Config
|
||||
{
|
||||
unsigned char baudRate ; /* 00h: */
|
||||
unsigned char t1 ; /* 01h: */
|
||||
unsigned char t2 ; /* 02h: */
|
||||
unsigned char n2 ; /* 03h: */
|
||||
unsigned short hdlcMTU ; /* 04h: */
|
||||
unsigned char hdlcWindow ; /* 06h: */
|
||||
unsigned char t4 ; /* 07h: */
|
||||
unsigned char autoModem ; /* 08h: */
|
||||
unsigned char autoHdlc ; /* 09h: */
|
||||
unsigned char hdlcOptions ; /* 0Ah: */
|
||||
unsigned char station ; /* 0Bh: */
|
||||
unsigned char pktWindow ; /* 0Ch: */
|
||||
unsigned short defPktSize ; /* 0Dh: */
|
||||
unsigned short pktMTU ; /* 0Fh: */
|
||||
unsigned short loPVC ; /* 11h: */
|
||||
unsigned short hiPVC ; /* 13h: */
|
||||
unsigned short loIncommingSVC ; /* 15h: */
|
||||
unsigned short hiIncommingSVC ; /* 17h: */
|
||||
unsigned short loTwoWaySVC ; /* 19h: */
|
||||
unsigned short hiTwoWaySVC ; /* 1Bh: */
|
||||
unsigned short loOutgoingSVC ; /* 1Dh: */
|
||||
unsigned short hiOutgoingSVC ; /* 1Fh: */
|
||||
unsigned short options ; /* 21h: */
|
||||
unsigned char responseOpt ; /* 23h: */
|
||||
unsigned short facil1 ; /* 24h: */
|
||||
unsigned short facil2 ; /* 26h: */
|
||||
unsigned short ccittFacil ; /* 28h: */
|
||||
unsigned short otherFacil ; /* 2Ah: */
|
||||
unsigned short ccittCompat ; /* 2Ch: */
|
||||
unsigned char t10t20 ; /* 2Eh: */
|
||||
unsigned char t11t21 ; /* 2Fh: */
|
||||
unsigned char t12t22 ; /* 30h: */
|
||||
unsigned char t13t23 ; /* 31h: */
|
||||
unsigned char t16t26 ; /* 32H: */
|
||||
unsigned char t28 ; /* 33h: */
|
||||
unsigned char r10r20 ; /* 34h: */
|
||||
unsigned char r12r22 ; /* 35h: */
|
||||
unsigned char r13r23 ; /* 36h: */
|
||||
} TX25Config;
|
||||
|
||||
#define X25_PACKET_WINDOW 0x02 /* Default value for Window Size */
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_READ_CHANNEL_CONFIG Command.
|
||||
*/
|
||||
typedef struct X25ChanAlloc /*----- Channel allocation -*/
|
||||
{
|
||||
unsigned short loPVC ; /* 00h: lowest PVC number */
|
||||
unsigned short hiPVC ; /* 02h: highest PVC number */
|
||||
unsigned short loIncommingSVC ; /* 04h: lowest incoming SVC */
|
||||
unsigned short hiIncommingSVC ; /* 06h: highest incoming SVC */
|
||||
unsigned short loTwoWaySVC ; /* 08h: lowest two-way SVC */
|
||||
unsigned short hiTwoWaySVC ; /* 0Ah: highest two-way SVC */
|
||||
unsigned short loOutgoingSVC ; /* 0Ch: lowest outgoing SVC */
|
||||
unsigned short hiOutgoingSVC ; /* 0Eh: highest outgoing SVC */
|
||||
} TX25ChanAlloc;
|
||||
|
||||
typedef struct X25ChanCfg /*------ Channel configuration -----*/
|
||||
{
|
||||
unsigned char type ; /* 00h: channel type */
|
||||
unsigned char txConf ; /* 01h: Tx packet and window sizes */
|
||||
unsigned char rxConf ; /* 01h: Rx packet and window sizes */
|
||||
} TX25ChanCfg;
|
||||
|
||||
/*
|
||||
* Defines for the 'type' field.
|
||||
*/
|
||||
#define X25_PVC 0x01 /* PVC */
|
||||
#define X25_SVC_IN 0x03 /* Incoming SVC */
|
||||
#define X25_SVC_TWOWAY 0x07 /* Two-way SVC */
|
||||
#define X25_SVC_OUT 0x0B /* Outgoing SVC */
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X25_READ_STATISTICS Command.
|
||||
*/
|
||||
typedef struct X25Stats
|
||||
{ /* number of packets Tx/Rx'ed */
|
||||
unsigned short txRestartRqst ; /* 00h: Restart Request */
|
||||
unsigned short rxRestartRqst ; /* 02h: Restart Request */
|
||||
unsigned short txRestartConf ; /* 04h: Restart Confirmation */
|
||||
unsigned short rxRestartConf ; /* 06h: Restart Confirmation */
|
||||
unsigned short txResetRqst ; /* 08h: Reset Request */
|
||||
unsigned short rxResetRqst ; /* 0Ah: Reset Request */
|
||||
unsigned short txResetConf ; /* 0Ch: Reset Confirmation */
|
||||
unsigned short rxResetConf ; /* 0Eh: Reset Confirmation */
|
||||
unsigned short txCallRequest ; /* 10h: Call Request */
|
||||
unsigned short rxCallRequest ; /* 12h: Call Request */
|
||||
unsigned short txCallAccept ; /* 14h: Call Accept */
|
||||
unsigned short rxCallAccept ; /* 16h: Call Accept */
|
||||
unsigned short txClearRqst ; /* 18h: Clear Request */
|
||||
unsigned short rxClearRqst ; /* 1Ah: Clear Request */
|
||||
unsigned short txClearConf ; /* 1Ch: Clear Confirmation */
|
||||
unsigned short rxClearConf ; /* 1Eh: Clear Confirmation */
|
||||
unsigned short txDiagnostic ; /* 20h: Diagnostic */
|
||||
unsigned short rxDiagnostic ; /* 22h: Diagnostic */
|
||||
unsigned short txRegRqst ; /* 24h: Registration Request */
|
||||
unsigned short rxRegRqst ; /* 26h: Registration Request */
|
||||
unsigned short txRegConf ; /* 28h: Registration Confirm.*/
|
||||
unsigned short rxRegConf ; /* 2Ah: Registration Confirm.*/
|
||||
unsigned short txInterrupt ; /* 2Ch: Interrupt */
|
||||
unsigned short rxInterrupt ; /* 2Eh: Interrupt */
|
||||
unsigned short txIntrConf ; /* 30h: Interrupt Confirm. */
|
||||
unsigned short rxIntrConf ; /* 32h: Interrupt Confirm. */
|
||||
unsigned short txData ; /* 34h: Data */
|
||||
unsigned short rxData ; /* 36h: Data */
|
||||
unsigned short txRR ; /* 38h: RR */
|
||||
unsigned short rxRR ; /* 3Ah: RR */
|
||||
unsigned short txRNR ; /* 3Ch: RNR */
|
||||
unsigned short rxRNR ; /* 3Eh: RNR */
|
||||
} TX25Stats;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* X25_READ_HISTORY_TABLE Command.
|
||||
*/
|
||||
typedef struct X25EventLog
|
||||
{
|
||||
unsigned char type ; /* 00h: transaction type */
|
||||
unsigned short lcn ; /* 01h: logical channel num */
|
||||
unsigned char packet ; /* 03h: async packet type */
|
||||
unsigned char cause ; /* 04h: X.25 cause field */
|
||||
unsigned char diag ; /* 05h: X.25 diag field */
|
||||
TX25TimeStamp ts ; /* 06h: time stamp */
|
||||
} TX25EventLog;
|
||||
|
||||
/*
|
||||
* Defines for the 'type' field.
|
||||
*/
|
||||
#define X25LOG_INCOMMING 0x00
|
||||
#define X25LOG_APPLICATION 0x01
|
||||
#define X25LOG_AUTOMATIC 0x02
|
||||
#define X25LOG_ERROR 0x04
|
||||
#define X25LOG_TIMEOUT 0x08
|
||||
#define X25LOG_RECOVERY 0x10
|
||||
|
||||
/*
|
||||
* Defines for the 'packet' field.
|
||||
*/
|
||||
#define X25LOG_CALL_RQST 0x0B
|
||||
#define X25LOG_CALL_ACCEPTED 0x0F
|
||||
#define X25LOG_CLEAR_RQST 0x13
|
||||
#define X25LOG_CLEAR_CONFRM 0x17
|
||||
#define X25LOG_RESET_RQST 0x1B
|
||||
#define X25LOG_RESET_CONFRM 0x1F
|
||||
#define X25LOG_RESTART_RQST 0xFB
|
||||
#define X25LOG_RESTART_COMFRM 0xFF
|
||||
#define X25LOG_DIAGNOSTIC 0xF1
|
||||
#define X25LOG_DTE_REG_RQST 0xF3
|
||||
#define X25LOG_DTE_REG_COMFRM 0xF7
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_TRACE_CONFIGURE Command.
|
||||
*/
|
||||
typedef struct X25TraceCfg
|
||||
{
|
||||
unsigned char flags ; /* 00h: trace configuration flags */
|
||||
unsigned char timeout ; /* 01h: timeout for trace delay mode*/
|
||||
} TX25TraceCfg;
|
||||
|
||||
/*
|
||||
* Defines for the 'flags' field.
|
||||
*/
|
||||
#define X25_TRC_ENABLE 0x01 /* bit0: '1' - trace enabled */
|
||||
#define X25_TRC_TIMESTAMP 0x02 /* bit1: '1' - time stamping enabled*/
|
||||
#define X25_TRC_DELAY 0x04 /* bit2: '1' - trace delay enabled */
|
||||
#define X25_TRC_DATA 0x08 /* bit3: '1' - trace data packets */
|
||||
#define X25_TRC_SUPERVISORY 0x10 /* bit4: '1' - trace suprvisory pkts*/
|
||||
#define X25_TRC_ASYNCHRONOUS 0x20 /* bit5: '1' - trace asynch. packets*/
|
||||
#define X25_TRC_HDLC 0x40 /* bit6: '1' - trace all packets */
|
||||
#define X25_TRC_READ 0x80 /* bit7: '1' - get current config. */
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* X25_READ_TRACE_DATA Command.
|
||||
*/
|
||||
typedef struct X25Trace /*----- Trace data structure -------*/
|
||||
{
|
||||
unsigned short length ; /* 00h: trace data length */
|
||||
unsigned char type ; /* 02h: trace type */
|
||||
unsigned char lost_cnt ; /* 03h: N of traces lost */
|
||||
TX25TimeStamp tstamp ; /* 04h: mon/date/sec/min/hour */
|
||||
unsigned short millisec ; /* 09h: ms time stamp */
|
||||
unsigned char data[0] ; /* 0Bh: traced frame */
|
||||
} TX25Trace;
|
||||
|
||||
/*
|
||||
* Defines for the 'type' field.
|
||||
*/
|
||||
#define X25_TRC_TYPE_MASK 0x0F /* bits 0..3: trace type */
|
||||
#define X25_TRC_TYPE_RX_FRAME 0x00 /* received frame trace */
|
||||
#define X25_TRC_TYPE_TX_FRAME 0x01 /* transmitted frame */
|
||||
#define X25_TRC_TYPE_ERR_FRAME 0x02 /* error frame */
|
||||
|
||||
#define X25_TRC_ERROR_MASK 0xF0 /* bits 4..7: error code */
|
||||
#define X25_TRCERR_RX_ABORT 0x10 /* receive abort error */
|
||||
#define X25_TRCERR_RX_BADCRC 0x20 /* receive CRC error */
|
||||
#define X25_TRCERR_RX_OVERRUN 0x30 /* receiver overrun error */
|
||||
#define X25_TRCERR_RX_TOO_LONG 0x40 /* excessive frame length error */
|
||||
#define X25_TRCERR_TX_ABORT 0x70 /* aborted frame transmittion error */
|
||||
#define X25_TRCERR_TX_UNDERRUN 0x80 /* transmit underrun error */
|
||||
|
||||
/*****************************************************************************
|
||||
* Following definitions describe HDLC frame and X.25 packet formats.
|
||||
****************************************************************************/
|
||||
|
||||
typedef struct HDLCFrame /*----- DHLC Frame Format ----------*/
|
||||
{
|
||||
unsigned char addr ; /* address field */
|
||||
unsigned char cntl ; /* control field */
|
||||
unsigned char data[0] ;
|
||||
} THDLCFrame;
|
||||
|
||||
typedef struct X25Pkt /*----- X.25 Paket Format ----------*/
|
||||
{
|
||||
unsigned char lcn_hi ; /* 4 MSB of Logical Channel Number */
|
||||
unsigned char lcn_lo ; /* 8 LSB of Logical Channel Number */
|
||||
unsigned char type ;
|
||||
unsigned char data[0] ;
|
||||
} TX25Pkt;
|
||||
|
||||
/*
|
||||
* Defines for the 'lcn_hi' field.
|
||||
*/
|
||||
#define X25_Q_BIT_MASK 0x80 /* Data Qualifier Bit mask */
|
||||
#define X25_D_BIT_MASK 0x40 /* Delivery Confirmation Bit mask */
|
||||
#define X25_M_BITS_MASK 0x30 /* Modulo Bits mask */
|
||||
#define X25_LCN_MSB_MASK 0x0F /* LCN most significant bits mask */
|
||||
|
||||
/*
|
||||
* Defines for the 'type' field.
|
||||
*/
|
||||
#define X25PKT_DATA 0x01 /* Data packet mask */
|
||||
#define X25PKT_SUPERVISORY 0x02 /* Supervisory packet mask */
|
||||
#define X25PKT_CALL_RQST 0x0B /* Call Request/Incoming */
|
||||
#define X25PKT_CALL_ACCEPTED 0x0F /* Call Accepted/Connected */
|
||||
#define X25PKT_CLEAR_RQST 0x13 /* Clear Request/Indication */
|
||||
#define X25PKT_CLEAR_CONFRM 0x17 /* Clear Confirmation */
|
||||
#define X25PKT_RESET_RQST 0x1B /* Reset Request/Indication */
|
||||
#define X25PKT_RESET_CONFRM 0x1F /* Reset Confirmation */
|
||||
#define X25PKT_RESTART_RQST 0xFB /* Restart Request/Indication */
|
||||
#define X25PKT_RESTART_CONFRM 0xFF /* Restart Confirmation */
|
||||
#define X25PKT_INTERRUPT 0x23 /* Interrupt */
|
||||
#define X25PKT_INTERRUPT_CONFRM 0x27 /* Interrupt Confirmation */
|
||||
#define X25PKT_DIAGNOSTIC 0xF1 /* Diagnostic */
|
||||
#define X25PKT_REGISTR_RQST 0xF3 /* Registration Request */
|
||||
#define X25PKT_REGISTR_CONFRM 0xF7 /* Registration Confirmation */
|
||||
#define X25PKT_RR_MASKED 0x01 /* Receive Ready packet after masking */
|
||||
#define X25PKT_RNR_MASKED 0x05 /* Receive Not Ready after masking */
|
||||
|
||||
|
||||
typedef struct {
|
||||
TX25Cmd cmd ;
|
||||
char data[X25_MAX_DATA] ;
|
||||
} mbox_cmd_t;
|
||||
|
||||
|
||||
#if 0
|
||||
typedef struct {
|
||||
unsigned char qdm ; /* Q/D/M bits */
|
||||
unsigned char cause ; /* cause field */
|
||||
unsigned char diagn ; /* diagnostics */
|
||||
unsigned char pktType ;
|
||||
unsigned short length ;
|
||||
unsigned char result ;
|
||||
unsigned short lcn ;
|
||||
unsigned short mtu ;
|
||||
unsigned short mru ;
|
||||
char reserved[3] ;
|
||||
}x25api_hdr_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
x25api_hdr_t hdr ;
|
||||
char data[X25_MAX_DATA] ;
|
||||
}x25api_t;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* XPIPEMON Definitions
|
||||
*/
|
||||
|
||||
/* valid ip_protocol for UDP management */
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
#define UDPMGMT_XPIPE_SIGNATURE "XLINK8ND"
|
||||
#define UDPMGMT_DRVRSTATS_SIGNATURE "DRVSTATS"
|
||||
|
||||
/* values for request/reply byte */
|
||||
#define UDPMGMT_REQUEST 0x01
|
||||
#define UDPMGMT_REPLY 0x02
|
||||
#define UDP_OFFSET 12
|
||||
|
||||
#if 0
|
||||
typedef struct {
|
||||
unsigned char opp_flag ; /* the opp flag */
|
||||
unsigned char command ; /* command code */
|
||||
unsigned short length ; /* transfer data length */
|
||||
unsigned char result ; /* return code */
|
||||
unsigned char pf ; /* P/F bit */
|
||||
unsigned short lcn ; /* logical channel */
|
||||
unsigned char qdm ; /* Q/D/M bits */
|
||||
unsigned char cause ; /* cause field */
|
||||
unsigned char diagn ; /* diagnostics */
|
||||
unsigned char pktType ; /* packet type */
|
||||
unsigned char resrv[4] ; /* reserved */
|
||||
} cblock_t;
|
||||
|
||||
typedef struct {
|
||||
ip_pkt_t ip_pkt ;
|
||||
udp_pkt_t udp_pkt ;
|
||||
wp_mgmt_t wp_mgmt ;
|
||||
cblock_t cblock ;
|
||||
unsigned char data[4080] ;
|
||||
} x25_udp_pkt_t;
|
||||
#endif
|
||||
|
||||
typedef struct read_hdlc_stat {
|
||||
unsigned short inf_frames_rx_ok ;
|
||||
unsigned short inf_frames_rx_out_of_seq ;
|
||||
unsigned short inf_frames_rx_no_data ;
|
||||
unsigned short inf_frames_rx_dropped ;
|
||||
unsigned short inf_frames_rx_data_too_long ;
|
||||
unsigned short inf_frames_rx_invalid_addr ;
|
||||
unsigned short inf_frames_tx_ok ;
|
||||
unsigned short inf_frames_tx_retransmit ;
|
||||
unsigned short T1_timeouts ;
|
||||
unsigned short SABM_frames_rx ;
|
||||
unsigned short DISC_frames_rx ;
|
||||
unsigned short DM_frames_rx ;
|
||||
unsigned short FRMR_frames_rx ;
|
||||
unsigned short SABM_frames_tx ;
|
||||
unsigned short DISC_frames_tx ;
|
||||
unsigned short DM_frames_tx ;
|
||||
unsigned short FRMR_frames_tx ;
|
||||
} read_hdlc_stat_t;
|
||||
|
||||
typedef struct read_comms_err_stats{
|
||||
unsigned char overrun_err_rx ;
|
||||
unsigned char CRC_err ;
|
||||
unsigned char abort_frames_rx ;
|
||||
unsigned char frames_dropped_buf_full ;
|
||||
unsigned char abort_frames_tx ;
|
||||
unsigned char transmit_underruns ;
|
||||
unsigned char missed_tx_underruns_intr ;
|
||||
unsigned char reserved ;
|
||||
unsigned char DCD_drop ;
|
||||
unsigned char CTS_drop ;
|
||||
} read_comms_err_stats_t;
|
||||
|
||||
typedef struct trace_data {
|
||||
unsigned short length ;
|
||||
unsigned char type ;
|
||||
unsigned char trace_dropped ;
|
||||
unsigned char reserved[5] ;
|
||||
unsigned short timestamp ;
|
||||
unsigned int sec ;
|
||||
unsigned int usec ;
|
||||
unsigned char data[0] ;
|
||||
} trace_data_t;
|
||||
|
||||
enum {UDP_XPIPE_TYPE};
|
||||
|
||||
#define XPIPE_ENABLE_TRACING 0x14
|
||||
#define XPIPE_DISABLE_TRACING 0x14
|
||||
#define XPIPE_GET_TRACE_INFO 0x16
|
||||
#define XPIPE_FT1_READ_STATUS 0x90
|
||||
#define XPIPE_DRIVER_STAT_IFSEND 0x91
|
||||
#define XPIPE_DRIVER_STAT_INTR 0x92
|
||||
#define XPIPE_DRIVER_STAT_GEN 0x93
|
||||
#define XPIPE_FLUSH_DRIVER_STATS 0x94
|
||||
#define XPIPE_ROUTER_UP_TIME 0x95
|
||||
#define XPIPE_SET_FT1_MODE 0x96
|
||||
#define XPIPE_FT1_STATUS_CTRL 0x97
|
||||
|
||||
|
||||
/* error messages */
|
||||
#define NO_BUFFS_OR_CLOSED_WIN 0x33
|
||||
#define DATA_LENGTH_TOO_BIG 0x32
|
||||
#define NO_DATA_AVAILABLE 0x33
|
||||
#define Z80_TIMEOUT_ERROR 0x0a
|
||||
#define NO_BUFFS 0x08
|
||||
|
||||
|
||||
/* Trace options */
|
||||
#define TRACE_DEFAULT 0x03
|
||||
#define TRACE_SUPERVISOR_FRMS 0x10
|
||||
#define TRACE_ASYNC_FRMS 0x20
|
||||
#define TRACE_ALL_HDLC_FRMS 0x40
|
||||
#define TRACE_DATA_FRMS 0x08
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* _SDLA_X25_H */
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,124 @@
|
|||
/**
|
||||
* \file sdladrv_usb.h
|
||||
* \brief SDLADRV USB Interface
|
||||
*
|
||||
* Authors: Alex Feldman <alex@sangoma.com>
|
||||
*
|
||||
* Copyright (c) 2008-09, Sangoma Technologies
|
||||
* All rights reserved.
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of the Sangoma Technologies nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Sangoma Technologies ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Sangoma Technologies BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* ===============================================================================
|
||||
*/
|
||||
|
||||
#if !defined(__SDLADRV_USB_H)
|
||||
# define __SDLADRV_USB_H
|
||||
|
||||
/* Internal USB-FXO CPU registers */
|
||||
#define SDLA_USB_CPU_REG_DEVICEID 0x00
|
||||
#define SDLA_USB_DEVICEID 0x55
|
||||
|
||||
#define SDLA_USB_CPU_REG_HARDWAREVER 0x01
|
||||
|
||||
#define SDLA_USB_CPU_REG_FIRMWAREVER 0x02
|
||||
|
||||
#define SDLA_USB_CPU_REG_CTRL 0x03
|
||||
#define SDLA_USB_CPU_BIT_CTRL_RESET 0x80
|
||||
#define SDLA_USB_CPU_BIT_CTRL_FWUPDATE 0x40
|
||||
#define SDLA_USB_CPU_BIT_CTRL_TS1_HWEC_EN 0x08
|
||||
#define SDLA_USB_CPU_BIT_CTRL_TS0_HWEC_EN 0x04
|
||||
#define SDLA_USB_CPU_BIT_CTRL_TS1_EVENT_EN 0x02
|
||||
#define SDLA_USB_CPU_BIT_CTRL_TS0_EVENT_EN 0x01
|
||||
|
||||
#define SDLA_USB_CPU_REG_FIFO_STATUS 0x04
|
||||
#define SDLA_USB_CPU_BIT_FIFO_STATUS_TS1_TX_UF 0x80
|
||||
#define SDLA_USB_CPU_BIT_FIFO_STATUS_TS1_TX_OF 0x40
|
||||
#define SDLA_USB_CPU_BIT_FIFO_STATUS_TS0_TX_UF 0x20
|
||||
#define SDLA_USB_CPU_BIT_FIFO_STATUS_TS0_TX_OF 0x10
|
||||
#define SDLA_USB_CPU_BIT_FIFO_STATUS_TS1_RX_UF 0x08
|
||||
#define SDLA_USB_CPU_BIT_FIFO_STATUS_TS1_RX_OF 0x04
|
||||
#define SDLA_USB_CPU_BIT_FIFO_STATUS_TS0_RX_UF 0x02
|
||||
#define SDLA_USB_CPU_BIT_FIFO_STATUS_TS0_RX_OF 0x01
|
||||
|
||||
#define SDLA_USB_CPU_REG_UART_STATUS 0x05
|
||||
#define SDLA_USB_CPU_BIT_UART_STATUS_LOST_SYNC 0x10
|
||||
#define SDLA_USB_CPU_BIT_UART_STATUS_CMD_UNKNOWN 0x10
|
||||
#define SDLA_USB_CPU_BIT_UART_STATUS_RX_UF 0x08
|
||||
#define SDLA_USB_CPU_BIT_UART_STATUS_RX_OF 0x04
|
||||
#define SDLA_USB_CPU_BIT_UART_STATUS_TX_UF 0x02
|
||||
#define SDLA_USB_CPU_BIT_UART_STATUS_TX_OF 0x01
|
||||
|
||||
#define SDLA_USB_CPU_REG_HOSTIF_STATUS 0x06
|
||||
#define SDLA_USB_CPU_BIT_HOSTIF_STATUS_RX_UF 0x08
|
||||
#define SDLA_USB_CPU_BIT_HOSTIF_STATUS_RX_OF 0x04
|
||||
#define SDLA_USB_CPU_BIT_HOSTIF_STATUS_TX_UF 0x02
|
||||
#define SDLA_USB_CPU_BIT_HOSTIF_STATUS_TX_OF 0x01
|
||||
|
||||
#define SDLA_USB_CPU_REG_LED_CONTROL 0x07
|
||||
#define SDLA_USB_CPU_BIT_LED_CONTROL_TS1_GRN 0x08
|
||||
#define SDLA_USB_CPU_BIT_LED_CONTROL_TS1_RED 0x04
|
||||
#define SDLA_USB_CPU_BIT_LED_CONTROL_TS0_GRN 0x02
|
||||
#define SDLA_USB_CPU_BIT_LED_CONTROL_TS0_RED 0x01
|
||||
|
||||
#define SDLA_USB_CPU_REG_DEBUG 0x08
|
||||
#define SDLA_USB_CPU_BIT_DEBUG_WEN_ACK 0x08
|
||||
#define SDLA_USB_CPU_BIT_DEBUG_DTMF 0x04
|
||||
#define SDLA_USB_CPU_BIT_DEBUG_LOCAL_LB 0x02
|
||||
#define SDLA_USB_CPU_BIT_DEBUG_LINE_LB 0x01
|
||||
|
||||
#define SDLA_USB_CPU_REG_EC_NUM 0x09
|
||||
|
||||
#define SDLA_USB_CPU_REG_FWUPDATE_MAGIC 0x0A
|
||||
#define SDLA_USB_CPU_BITS_FWUPDATE_MAGIC 0x5A
|
||||
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
# include "sdladrv.h"
|
||||
|
||||
extern int sdla_usb_init(void);
|
||||
extern int sdla_usb_exit(void);
|
||||
extern int sdla_usb_setup(sdlahw_card_t*, int);
|
||||
extern int sdla_usb_down(sdlahw_card_t*, int force);
|
||||
|
||||
/*usb interface */
|
||||
extern int sdla_usb_cpu_read(void *phw, unsigned char off, unsigned char *data);
|
||||
extern int sdla_usb_cpu_write(void *phw, unsigned char off, unsigned char data);
|
||||
extern int sdla_usb_write_poll(void *phw, unsigned char off, unsigned char data);
|
||||
extern int sdla_usb_read_poll(void *phw, unsigned char off, unsigned char *data);
|
||||
extern int sdla_usb_hwec_enable(void *phw, int mod_no, int enable);
|
||||
extern int sdla_usb_rxevent_enable(void *phw, int mod_no, int enable);
|
||||
extern int sdla_usb_rxevent(void *phw, int mod_no, u8 *regs, int);
|
||||
extern int sdla_usb_rxtx_data_init(void *phw, int, unsigned char **, unsigned char **);
|
||||
extern int sdla_usb_rxdata_enable(void *phw, int enable);
|
||||
extern int sdla_usb_fwupdate_enable(void *phw);
|
||||
extern int sdla_usb_txdata_raw(void *phw, unsigned char*, int);
|
||||
extern int sdla_usb_txdata_raw_ready(void *phw);
|
||||
extern int sdla_usb_rxdata_raw(void *phw, unsigned char*, int);
|
||||
extern int sdla_usb_set_intrhand(void*, wan_pci_ifunc_t*, void*, int);
|
||||
extern int sdla_usb_restore_intrhand(void*, int);
|
||||
extern int sdla_usb_err_stats(void*,void*,int);
|
||||
extern int sdla_usb_flush_err_stats(void*);
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#endif /* __SDLADRV_USB_H */
|
|
@ -0,0 +1,207 @@
|
|||
/*****************************************************************************
|
||||
* sdlapci.h WANPIPE(tm) Multiprotocol WAN Link Driver.
|
||||
* Definitions for the SDLA PCI adapter.
|
||||
*
|
||||
* Author: Gideon Hack <ghack@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1999-2000 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Jun 02, 1999 Gideon Hack Initial version.
|
||||
*****************************************************************************/
|
||||
#ifndef _SDLAPCI_H
|
||||
#define _SDLAPCI_H
|
||||
|
||||
/****** Defines *************************************************************/
|
||||
|
||||
/* Definitions for identifying and finding S514 PCI adapters */
|
||||
#define V3_VENDOR_ID 0x11B0 /* V3 vendor ID number */
|
||||
#define V3_DEVICE_ID 0x0002 /* V3 device ID number */
|
||||
#define SANGOMA_SUBSYS_VENDOR 0x4753 /* ID for Sangoma */
|
||||
#define PCI_DEV_SLOT_MASK 0x1F /* mask for slot numbering */
|
||||
#define PCI_IRQ_NOT_ALLOCATED 0xFF /* interrupt line for no IRQ */
|
||||
|
||||
/* Vendor id lisr for Sangoma cards */
|
||||
#define SANGOMA_PCI_VENDOR 0x1923 /* Old value -> 0x11B0 */
|
||||
#define SANGOMA_PCI_VENDOR_OLD 0x10EE /* Old value -> 0x11B0 */
|
||||
|
||||
/* Device id list for Sangoma cards */
|
||||
#define SANGOMA_PCI_DEVICE 0x0300 /* Old value -> 0x0200 */
|
||||
#define SANGOMA_PCI_4_DEVICE 0x0400 /* */
|
||||
#define SANGOMA_S2E_300_PCI_DEVICE 0x0030 /* Xilinx-300 SPARTAN-2e */
|
||||
#define SANGOMA_S3_400_PCI_DEVICE 0x0040 /* Xilinx-400 SPARTAN-3 */
|
||||
#define SANGOMA_S3_1000_PCI_DEVICE 0x0100 /* Xilinx-1000 SPARTAN-3 */
|
||||
#define SANGOMA_S3E_250_PCI_DEVICE 0x0025 /* Xilinx-250 SPARTAN-3e */
|
||||
#define SANGOMA_S3E_500_PCI_DEVICE 0x0050 /* Xilinx-500 SPARTAN-3e */
|
||||
#define SANGOMA_S3E_1200_PCI_DEVICE 0x0120 /* Xilinx-1200 SPARTAN-3e */
|
||||
#define SANGOMA_GP_ADSL_PCI_DEVICE 0x0001 /* Globe-Span ADSL */
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
#define SANGOMA_PCI_4_SHARK_DEVICE 0x0100 /* A104D */
|
||||
#define SANGOMA_PCI_16_SHARK_DEVICE 0x0160 /* A116 */
|
||||
#define SANGOMA_PCI_A200_SHARK_DEVICE 0x0040 /* A200 (D) */
|
||||
#define SANGOMA_PCI_A056_SHARK_DEVICE 0x0020 /* A056 */
|
||||
#define SANGOMA_PCI_B600_SHARK_DEVICE 0x0025 /* B600 */
|
||||
#endif
|
||||
|
||||
/* Definition for identifying and finding PLX PCI bridge adapters */
|
||||
#define PLX_VENDOR_ID 0x10b5 /* PLX vendor ID number */
|
||||
#define PLX_DEVICE_ID 0x8111 /* PLX device ID number */
|
||||
#define PLX2_DEVICE_ID 0x8112 /* PLX device ID number rev 2 */
|
||||
|
||||
#define TUNDRA_VENDOR_ID 0x10E3 /* TUNDRA vendor ID number */
|
||||
#define TUNDRA_DEVICE_ID 0x8111 /* TUNDRA device ID number */
|
||||
|
||||
#define PLX_EEPROM_ENABLE 0x5A
|
||||
#define PLX_EEPROM_VENDOR_OFF 0x7C /* 2 bytes for Card vendor id */
|
||||
|
||||
#define A101_1TE1_SUBSYS_VENDOR 0xA010 /* A101 with T1/E1 1 line */
|
||||
#define A101_2TE1_SUBSYS_VENDOR 0xA011 /* A101 with T1/E1 2 lines */
|
||||
#define A104_4TE1_SUBSYS_VENDOR 0xA013 /* A104 with T1/E1 4 lines */
|
||||
#define A300_UTE3_SUBSYS_VENDOR 0xA020 /* A300 with T3/E3 (unchannelized) */
|
||||
#define A305_CT3_SUBSYS_VENDOR 0xA030 /* A305 with T3 (channelized) */
|
||||
|
||||
#define S5141_SERIAL_SUBSYS_VENDOR 0x0011 /* S5141, single CPU, serial */
|
||||
#define S5142_SERIAL_SUBSYS_VENDOR 0x0012 /* S5142, dual CPU, serial */
|
||||
#define S5143_SERIAL_SUBSYS_VENDOR 0x0013 /* S5143, single CPU, FT1 */
|
||||
#define S5144_SERIAL_SUBSYS_VENDOR 0x0014 /* S5144, single CPU, T1/E1 */
|
||||
#define S5145_SERIAL_SUBSYS_VENDOR 0x0015 /* S5145, single CPU, 56K */
|
||||
#define S5147_SERIAL_SUBSYS_VENDOR 0x0017 /* S5147, dual CPU, T1/E1 */
|
||||
#define S5148_SERIAL_SUBSYS_VENDOR 0x0018 /* S5148, single CPU, T1/E1 */
|
||||
|
||||
#define AFT_1TE1_SHARK_SUBSYS_VENDOR 0xA111 /* A101-SHARK T1/E1 1 lines */
|
||||
#define AFT_2TE1_SHARK_SUBSYS_VENDOR 0xA112 /* A102-SHARK T1/E1 2 lines */
|
||||
#define AFT_4TE1_SHARK_SUBSYS_VENDOR 0xA113 /* A104-SHARK T1/E1 4 lines */
|
||||
#define AFT_8TE1_SHARK_SUBSYS_VENDOR 0xA114 /* A108-SHARK T1/E1 8 lines */
|
||||
#define A300_UTE3_SHARK_SUBSYS_VENDOR 0xA115 /* A300-SHARK with T3/E3 (unchannelized) */
|
||||
#define A305_CTE3_SHARK_SUBSYS_VENDOR 0xA116 /* A305-SHARK with T3 (channelized) */
|
||||
#define AFT_16TE1_SHARK_SUBSYS_VENDOR 0xA117 /* A116-SHARK T1/E1 16 lines */
|
||||
#define AFT_T116_SUBSYS_VENDOR 0xA118 /* T116 T1/E1 16 lines Tapping */
|
||||
#define A200_REMORA_SHARK_SUBSYS_VENDOR 0xA200 /* AFT-REMORA SHARK analog board */
|
||||
#define A400_REMORA_SHARK_SUBSYS_VENDOR 0xA400 /* AFT-REMORA SHARK analog board */
|
||||
|
||||
#define AFT_ISDN_BRI_SHARK_SUBSYS_VENDOR 0xA500 /* AFT-ISDN BRI SHARK board */
|
||||
#define B500_SHARK_SUBSYS_VENDOR 0xB500 /* AFT-B500 SHARK BRI B500 board */
|
||||
#define A700_SHARK_SUBSYS_VENDOR 0xA700 /* AFT-700 SHARK FLEX-BRI board */
|
||||
#define AFT_56K_SHARK_SUBSYS_VENDOR 0xA056 /* AFT-56K SHARK board */
|
||||
|
||||
#define AFT_A600_SUBSYS_VENDOR 0xA600 /* AFT-B600 Series board */
|
||||
#define AFT_B601_SUBSYS_VENDOR 0xA601 /* AFT-B600 Series board */
|
||||
#define AFT_B610_SUBSYS_VENDOR 0xA610 /* AFT-B610 single FXS Series board */
|
||||
|
||||
#define AFT_W400_SUBSYS_VENDOR 0xF400 /* AFT-W400 (GSM card) */
|
||||
|
||||
#define AFT_B800_SUBSYS_VENDOR 0xB800 /* AFT-B800 2/4 FXO or 2/4 FXS board */
|
||||
|
||||
#define AFT_2SERIAL_V35X21_SUBSYS_VENDOR 0xA031 /* AFT-A142 2 Port V.35/X.21 board */
|
||||
#define AFT_4SERIAL_V35X21_SUBSYS_VENDOR 0xA032 /* AFT-A144 4 Port V.35/X.21 board */
|
||||
#define AFT_2SERIAL_RS232_SUBSYS_VENDOR 0xA033 /* AFT-A142 2 Port RS232 board */
|
||||
#define AFT_4SERIAL_RS232_SUBSYS_VENDOR 0xA034 /* AFT-A144 4 Port RS232 board */
|
||||
|
||||
|
||||
#define AFT_CORE_ID_MASK 0x00FF
|
||||
#define AFT_CORE_REV_MASK 0xFF00
|
||||
#define AFT_CORE_REV_SHIFT 8
|
||||
#define AFT_HDLC_CORE_ID 0x00 /* HDLC core */
|
||||
#define AFT_ANALOG_FE_CORE_ID 0x00 /* A200 FXS/FXO core */
|
||||
#define AFT_ATM_CORE_ID 0x01 /* ATM core */
|
||||
#define AFT_SS7_CORE_ID 0x02 /* SS7 core */
|
||||
#define AFT_HDLC_EC_CORE_ID 0x10 /* HDLC & EC */
|
||||
#define AFT_PMC_FE_CORE_ID 0x10 /* HDLC & EC (with PMC FE) */
|
||||
#define AFT_DS_FE_CORE_ID 0x13 /* HDLC & EC (with Dallas FE) */
|
||||
#define AFT_CORE_ID(subsys_id) (subsys_id & AFT_CORE_ID_MASK)
|
||||
#define AFT_CORE_REV(subsys_id) ((subsys_id >> AFT_CORE_REV_SHIFT) & 0xFF)
|
||||
#define AFT_CORE_ID_DECODE(core_id) \
|
||||
(core_id == AFT_HDLC_CORE_ID) ? "HDLC" : \
|
||||
(core_id == AFT_ATM_CORE_ID) ? "ATM" : \
|
||||
(core_id == AFT_SS7_CORE_ID) ? "SS7" : \
|
||||
(core_id == AFT_HDLC_EC_CORE_ID) ? "HDLC" : \
|
||||
(core_id == AFT_DS_FE_CORE_ID) ? "HDLC (DS)" : \
|
||||
"Unknown"
|
||||
|
||||
#define AFT_CHIP_UNKNOWN 0x0000
|
||||
#define AFT_CHIP_OLD_X300 0x0300
|
||||
#define AFT_CHIP_OLD_X400 0x0400
|
||||
#define AFT_CHIP_X200 0x0020
|
||||
#define AFT_CHIP_X250 0x0025
|
||||
#define AFT_CHIP_X300 0x0030
|
||||
#define AFT_CHIP_X400 0x0040
|
||||
#define AFT_CHIP_X1000 0x0100
|
||||
#define AFT_CHIP_X1600 0x0160
|
||||
|
||||
#define AFT_PCI_MEM_SIZE 0x002FF
|
||||
#define XILINX_PCI_LATENCY 0x0000FF00
|
||||
|
||||
#define AFT2_PCI_MEM_SIZE 0x07FFF
|
||||
#define AFT4_PCI_MEM_SIZE 0x0FFFF
|
||||
#define AFT8_PCI_MEM_SIZE 0x1FFFF
|
||||
#define AFT16_PCI_MEM_SIZE 0x3FFFF
|
||||
|
||||
#define XILINX_PCI_CMD_REG 0x04
|
||||
#define XILINX_PCI_LATENCY_REG 0x0D
|
||||
|
||||
/* Local PCI register offsets */
|
||||
#define PCI_VENDOR_ID_WORD 0x00 /* vendor ID */
|
||||
#define PCI_DEVICE_ID_WORD 0x02 /* device ID */
|
||||
#define PCI_REVISION_ID_BYTE 0x08 /* revision ID */
|
||||
#define PCI_SUBCLASS_ID_BYTE 0x0a /* subclass ID byte */
|
||||
#define PCI_IO_BASE_DWORD 0x10 /* IO base */
|
||||
#define PCI_MEM_BASE0_DWORD 0x14 /* memory base - apperture 0 */
|
||||
#define PCI_MEM_BASE1_DWORD 0x18 /* memory base - apperture 1 */
|
||||
#define PCI_SUBSYS_VENDOR_WORD 0x2C /* subsystem vendor ID */
|
||||
#define PCI_SUBSYS_ID_WORD 0x2E /* subsystem ID */
|
||||
#define PCI_INT_LINE_BYTE 0x3C /* interrupt line */
|
||||
#define PCI_INT_PIN_BYTE 0x3D /* interrupt pin */
|
||||
#define PCI_MAP0_DWORD 0x40 /* PCI to local bus address 0 */
|
||||
#define PCI_MAP1_DWORD 0x44 /* PCI to local bus address 1 */
|
||||
#define PCI_INT_STATUS 0x48 /* interrupt status */
|
||||
#define PCI_INT_CONFIG 0x4C /* interrupt configuration */
|
||||
#define PCI_CORE_REV_REG 0xFC /* firmware version */
|
||||
#define WAN_INVALID_FIRMWARE 0x42 /* Implies the card is using new style firmware version */
|
||||
|
||||
/* Local PCI register usage */
|
||||
#define PCI_MEMORY_ENABLE 0x00000003 /* enable PCI memory */
|
||||
#define PCI_CPU_A_MEM_DISABLE 0x00000002 /* disable CPU A memory */
|
||||
#define PCI_CPU_B_MEM_DISABLE 0x00100002 /* disable CPU B memory */
|
||||
#define PCI_ENABLE_IRQ_CPU_A 0x005A0004 /* enable IRQ for CPU A */
|
||||
#define PCI_ENABLE_IRQ_CPU_B 0x005A0008 /* enable IRQ for CPU B */
|
||||
#define PCI_ENABLE_IRQ_DMA0 0x01000000 /* enable IRQ for DMA 0 */
|
||||
#define PCI_ENABLE_IRQ_DMA1 0x02000000 /* enable IRQ for DMA 1 */
|
||||
#define PCI_DISABLE_IRQ_CPU_A 0x00000004 /* disable IRQ for CPU A */
|
||||
#define PCI_DISABLE_IRQ_CPU_B 0x00000008 /* disable IRQ for CPU B */
|
||||
#define PCI_DISABLE_IRQ_DMA0 0x01000000 /* disable IRQ for DMA 0 */
|
||||
#define PCI_DISABLE_IRQ_DMA1 0x02000000 /* disable IRQ for DMA 1 */
|
||||
|
||||
/* Setting for the Interrupt Status register */
|
||||
#define IRQ_DMA0 0x01000000 /* IRQ for DMA0 */
|
||||
#define IRQ_DMA1 0x02000000 /* IRQ for DMA1 */
|
||||
#define IRQ_LOCAL_CPU_A 0x00000004 /* IRQ for CPU A */
|
||||
#define IRQ_LOCAL_CPU_B 0x00000008 /* IRQ for CPU B */
|
||||
#define IRQ_CPU_A 0x04 /* IRQ for CPU A */
|
||||
#define IRQ_CPU_B 0x08 /* IRQ for CPU B */
|
||||
|
||||
/* The maximum size of the S514 memory */
|
||||
#define MAX_SIZEOF_S514_MEMORY (256 * 1024)
|
||||
|
||||
/* S514 control register offsets within the memory address space */
|
||||
#define S514_CTRL_REG_BYTE 0x80000
|
||||
|
||||
/* S514 adapter control bytes */
|
||||
#define S514_CPU_HALT 0x00
|
||||
#define S514_CPU_START 0x01
|
||||
|
||||
/* The maximum number of S514 adapters supported */
|
||||
#define MAX_S514_CARDS 20
|
||||
|
||||
/* ADSL Hardware Defines */
|
||||
#define GSI_PCI_MEMORY_SIZE (8 * (4 * 2 * 1024))
|
||||
#define PCI_VENDOR_ID_GSI 0x14BC
|
||||
#define PCI_DEVICE_ID_GSI_PULSAR 0xD002
|
||||
#define PCI_DEVICE_ID_GSI_ADSL PCI_DEVICE_ID_GSI_PULSAR
|
||||
#define PCI_DEVICE_ID_GSI_ADSL_V2 0xD001
|
||||
|
||||
#endif /* _SDLAPCI_H */
|
|
@ -0,0 +1,376 @@
|
|||
/*****************************************************************************
|
||||
* sdlasfm.h WANPIPE(tm) Multiprotocol WAN Link Driver.
|
||||
* Definitions for the SDLA Firmware Module (SFM).
|
||||
*
|
||||
* Author: Gideon Hack
|
||||
*
|
||||
* Copyright: (c) 1995-1999 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Jun 02, 1999 Gideon Hack Added support for the S514 adapter.
|
||||
* Dec 11, 1996 Gene Kozin Cosmetic changes
|
||||
* Apr 16, 1996 Gene Kozin Changed adapter & firmware IDs. Version 2
|
||||
* Dec 15, 1995 Gene Kozin Structures chaned
|
||||
* Nov 09, 1995 Gene Kozin Initial version.
|
||||
*****************************************************************************/
|
||||
#ifndef _SDLASFM_H
|
||||
#define _SDLASFM_H
|
||||
|
||||
/****** Defines *************************************************************/
|
||||
|
||||
#define SFM_VERSION 2
|
||||
#define SFM_SIGNATURE "SFM - Sangoma SDLA Firmware Module"
|
||||
|
||||
/* min/max */
|
||||
#define SFM_IMAGE_SIZE 0x8000 /* max size of SDLA code image file */
|
||||
#define SFM_DESCR_LEN 256 /* max length of description string */
|
||||
#define SFM_MAX_SDLA 16 /* max number of compatible adapters */
|
||||
|
||||
/* Adapter types */
|
||||
#define SDLA_S502A 5020
|
||||
#define SDLA_S502E 5021
|
||||
#define SDLA_S503 5030
|
||||
#define SDLA_S508 5080
|
||||
#define SDLA_S507 5070
|
||||
#define SDLA_S509 5090
|
||||
#define SDLA_S514 5140
|
||||
#define SDLA_ADSL 6000
|
||||
#define SDLA_AFT 7000
|
||||
#define SDLA_USB 7001
|
||||
|
||||
/* S514 PCI adapter CPU numbers */
|
||||
#define S514_CPU_A 'A'
|
||||
#define S514_CPU_B 'B'
|
||||
#define SDLA_CPU_A 1
|
||||
#define SDLA_CPU_B 2
|
||||
#define SDLA_GET_CPU(cpu_no) (cpu_no==SDLA_CPU_A)?S514_CPU_A:S514_CPU_B
|
||||
|
||||
|
||||
/* Firmware identification numbers:
|
||||
* 0 .. 999 Test & Diagnostics
|
||||
* 1000 .. 1999 Streaming HDLC
|
||||
* 2000 .. 2999 Bisync
|
||||
* 3000 .. 3999 SDLC
|
||||
* 4000 .. 4999 HDLC
|
||||
* 5000 .. 5999 X.25
|
||||
* 6000 .. 6999 Frame Relay
|
||||
* 7000 .. 7999 PPP
|
||||
* 8000 .. 8999 Cisco HDLC
|
||||
*/
|
||||
#define SFID_CALIB502 200
|
||||
#define SFID_STRM502 1200
|
||||
#define SFID_STRM508 1800
|
||||
#define SFID_BSC502 2200
|
||||
#define SFID_BSCMP514 2201
|
||||
#define SFID_SDLC502 3200
|
||||
#define SFID_HDLC502 4200
|
||||
#define SFID_HDLC508 4800
|
||||
#define SFID_X25_502 5200
|
||||
#define SFID_X25_508 5800
|
||||
#define SFID_FR502 6200
|
||||
#define SFID_FR508 6800
|
||||
#define SFID_PPP502 7200
|
||||
#define SFID_PPP508 7800
|
||||
#define SFID_PPP514 7140
|
||||
#define SFID_CHDLC508 8800
|
||||
#define SFID_CHDLC514 8140
|
||||
#define SFID_BITSTRM 10000
|
||||
#define SFID_EDU_KIT 8141
|
||||
#define SFID_SS7514 9000
|
||||
#define SFID_BSCSTRM 2205
|
||||
#define SFID_ADSL 20000
|
||||
#define SFID_SDLC514 3300
|
||||
#define SFID_ATM 11000
|
||||
#define SFID_POS 12000
|
||||
#define SFID_ADCCP 13000
|
||||
#define SFID_AFT 30000
|
||||
|
||||
/****** Data Types **********************************************************/
|
||||
|
||||
typedef struct sfm_info /* firmware module information */
|
||||
{
|
||||
unsigned short codeid; /* firmware ID */
|
||||
unsigned short version; /* firmaware version number */
|
||||
unsigned short adapter[SFM_MAX_SDLA]; /* compatible adapter types */
|
||||
unsigned int memsize; /* minimum memory size */
|
||||
unsigned short reserved[2]; /* reserved */
|
||||
unsigned short startoffs; /* entry point offset */
|
||||
unsigned short winoffs; /* dual-port memory window offset */
|
||||
unsigned short codeoffs; /* code load offset */
|
||||
unsigned short codesize; /* code size */
|
||||
unsigned short dataoffs; /* configuration data load offset */
|
||||
unsigned short datasize; /* configuration data size */
|
||||
} sfm_info_t;
|
||||
|
||||
typedef struct sfm /* SDLA firmware file structire */
|
||||
{
|
||||
char signature[80]; /* SFM file signature */
|
||||
unsigned short version; /* file format version */
|
||||
unsigned short checksum; /* info + image */
|
||||
unsigned short reserved[6]; /* reserved */
|
||||
char descr[SFM_DESCR_LEN]; /* description string */
|
||||
sfm_info_t info; /* firmware module info */
|
||||
unsigned char image[1]; /* code image (variable size) */
|
||||
} sfm_t;
|
||||
|
||||
/* settings for the 'adapter_type' */
|
||||
enum {
|
||||
S5141_ADPTR_1_CPU_SERIAL = 0x01,/* S5141, single CPU, serial */
|
||||
S5142_ADPTR_2_CPU_SERIAL, /* S5142, dual CPU, serial */
|
||||
S5143_ADPTR_1_CPU_FT1, /* S5143, single CPU, FT1 */
|
||||
S5144_ADPTR_1_CPU_T1E1, /* S5144, single CPU, T1/E1 */
|
||||
S5145_ADPTR_1_CPU_56K, /* S5145, single CPU, 56K */
|
||||
S5147_ADPTR_2_CPU_T1E1, /* S5147, dual CPU, T1/E1 */
|
||||
S5148_ADPTR_1_CPU_T1E1, /* S5148, single CPU, T1/E1 */
|
||||
S518_ADPTR_1_CPU_ADSL, /* S518, adsl card */
|
||||
A101_ADPTR_1TE1, /* 1 Channel T1/E1 */
|
||||
A101_ADPTR_2TE1, /* 2 Channels T1/E1 */
|
||||
A104_ADPTR_4TE1, /* Quad line T1/E1 */
|
||||
A104_ADPTR_4TE1_PCIX, /* Quad line T1/E1 PCI Express */
|
||||
A108_ADPTR_8TE1, /* 8 Channels T1/E1 */
|
||||
A100_ADPTR_U_1TE3, /* 1 Channel T3/E3 (Proto) */
|
||||
A300_ADPTR_U_1TE3, /* 1 Channel T3/E3 (unchannelized) */
|
||||
A305_ADPTR_C_1TE3, /* 1 Channel T3/E3 (channelized) */
|
||||
A200_ADPTR_ANALOG, /* AFT-200 REMORA analog board */
|
||||
A400_ADPTR_ANALOG, /* AFT-400 REMORA analog board */
|
||||
AFT_ADPTR_ISDN, /* AFT ISDN BRI board */
|
||||
AFT_ADPTR_56K, /* AFT 56K board */
|
||||
AFT_ADPTR_2SERIAL_V35X21, /* AFT-A142 2 Port V.35/X.21 board */
|
||||
AFT_ADPTR_4SERIAL_V35X21, /* AFT-A144 4 Port V.35/X.21 board */
|
||||
AFT_ADPTR_2SERIAL_RS232, /* AFT-A142 2 Port RS232 board */
|
||||
AFT_ADPTR_4SERIAL_RS232, /* AFT-A144 4 Port RS232 board */
|
||||
U100_ADPTR, /* USB board */
|
||||
AFT_ADPTR_A600, /* AFT-A600 board */
|
||||
AFT_ADPTR_B601, /* AFT-B601 board */
|
||||
AFT_ADPTR_B800, /* AFT-B800 board */
|
||||
AFT_ADPTR_FLEXBRI, /* AFT-A700 FlexBRI board */
|
||||
AFT_ADPTR_B500, /* AFT B500 BRI board */
|
||||
AFT_ADPTR_W400, /* AFT-W400 (GSM) */
|
||||
AFT_ADPTR_B610, /* AFT-B610 Single FXS board */
|
||||
A116_ADPTR_16TE1, /* 16 Channels T1/E1 */
|
||||
AFT_ADPTR_T116, /* 16 Channels T1/E1 Tapping board*/
|
||||
AFT_ADPTR_LAST /* NOTE: Keep it as a last line */
|
||||
};
|
||||
#define MAX_ADPTRS AFT_ADPTR_LAST
|
||||
|
||||
#define OPERATE_T1E1_AS_SERIAL 0x8000 /* For bitstreaming only
|
||||
* Allow the applicatoin to
|
||||
* E1 front end */
|
||||
|
||||
/* settings for the 'adapter_subtype' */
|
||||
#define AFT_SUBTYPE_NORMAL 0x00
|
||||
#define AFT_SUBTYPE_SHARK 0x01
|
||||
#define IS_ADPTR_SHARK(type) ((type) == AFT_SUBTYPE_SHARK)
|
||||
|
||||
/* settings for the 'adapter_security' */
|
||||
#define AFT_SECURITY_NONE 0x00
|
||||
#define AFT_SECURITY_CHAN 0x01
|
||||
#define AFT_SECURITY_UNCHAN 0x02
|
||||
|
||||
/* settings for the 'adptr_subtype' */
|
||||
#define AFT_SUBTYPE_SHIFT 8
|
||||
#define AFT_SUBTYPE_MASK 0x0F
|
||||
|
||||
/* CPLD interface */
|
||||
#define AFT_MCPU_INTERFACE_ADDR 0x46
|
||||
#define AFT_MCPU_INTERFACE 0x44
|
||||
|
||||
#define AFT56K_MCPU_INTERFACE_ADDR 0x46
|
||||
#define AFT56K_MCPU_INTERFACE 0x44
|
||||
|
||||
/* CPLD definitions */
|
||||
#define AFT_SECURITY_1LINE_UNCH 0x00
|
||||
#define AFT_SECURITY_1LINE_CH 0x01
|
||||
#define AFT_SECURITY_2LINE_UNCH 0x02
|
||||
#define AFT_SECURITY_2LINE_CH 0x03
|
||||
|
||||
#define AFT_BIT_DEV_ADDR_CLEAR 0x600
|
||||
#define AFT_BIT_DEV_ADDR_CPLD 0x200
|
||||
#define AFT4_BIT_DEV_ADDR_CLEAR 0x800
|
||||
#define AFT4_BIT_DEV_ADDR_CPLD 0x800
|
||||
#define AFT56K_BIT_DEV_ADDR_CPLD 0x800
|
||||
|
||||
/* Maxim CPLD definitions */
|
||||
#define AFT8_BIT_DEV_ADDR_CLEAR 0x1800 /* QUAD */
|
||||
#define AFT8_BIT_DEV_ADDR_CPLD 0x800
|
||||
#define AFT8_BIT_DEV_MAXIM_ADDR_CPLD 0x1000
|
||||
|
||||
/* Aft Serial CPLD definitions */
|
||||
#define AFT_SERIAL_BIT_DEV_ADDR_CLEAR 0x1800 /* QUAD */
|
||||
#define AFT_SERIAL_BIT_DEV_ADDR_CPLD 0x800
|
||||
#define AFT_SERIAL_BIT_DEV_MAXIM_ADDR_CPLD 0x1000
|
||||
|
||||
#define AFT3_BIT_DEV_ADDR_EXAR_CLEAR 0x600
|
||||
#define AFT3_BIT_DEV_ADDR_EXAR_CPLD 0x400
|
||||
|
||||
#define AFT_SECURITY_CPLD_REG 0x09
|
||||
#define AFT_SECURITY_CPLD_SHIFT 0x02
|
||||
#define AFT_SECURITY_CPLD_MASK 0x03
|
||||
|
||||
#define AFT_A300_VER_CUSTOMER_ID 0x0A
|
||||
#define AFT_A300_VER_SHIFT 6
|
||||
#define AFT_A300_VER_MASK 0x03
|
||||
#define AFT_A300_CUSTOMER_ID_SHIFT 0
|
||||
#define AFT_A300_CUSTOMER_ID_MASK 0x3F
|
||||
|
||||
/* AFT SHARK CPLD */
|
||||
#define AFT_SH_CPLD_BOARD_CTRL_REG 0x00
|
||||
#define AFT_SH_CPLD_BOARD_STATUS_REG 0x01
|
||||
#define A200_SH_CPLD_BOARD_STATUS_REG 0x09
|
||||
|
||||
#define AFT_SH_SECURITY_MASK 0x07
|
||||
#define AFT_SH_SECURITY_SHIFT 1
|
||||
#define AFT_SH_SECURITY(reg) \
|
||||
(((reg) >> AFT_SH_SECURITY_SHIFT) & AFT_SH_SECURITY_MASK)
|
||||
|
||||
#define A104_SECURITY_32_ECCHAN 0x00
|
||||
#define A104_SECURITY_64_ECCHAN 0x01
|
||||
#define A104_SECURITY_96_ECCHAN 0x02
|
||||
#define A104_SECURITY_128_ECCHAN 0x03
|
||||
#define A104_SECURITY_256_ECCHAN 0x04
|
||||
#define A104_SECURITY_PROTO_128_ECCHAN 0x05
|
||||
#define A104_SECURITY_0_ECCHAN 0x07
|
||||
|
||||
#define A108_SECURITY_32_ECCHAN 0x00
|
||||
#define A108_SECURITY_64_ECCHAN 0x01
|
||||
#define A108_SECURITY_96_ECCHAN 0x02
|
||||
#define A108_SECURITY_128_ECCHAN 0x03
|
||||
#define A108_SECURITY_256_ECCHAN 0x04
|
||||
#define A108_SECURITY_0_ECCHAN 0x05
|
||||
|
||||
#define A500_SECURITY_16_ECCHAN 0x00
|
||||
#define A500_SECURITY_64_ECCHAN 0x01
|
||||
#define A500_SECURITY_0_ECCHAN 0x05
|
||||
|
||||
#define A104_ECCHAN(val) \
|
||||
((val) == A104_SECURITY_32_ECCHAN) ? 32 : \
|
||||
((val) == A104_SECURITY_64_ECCHAN) ? 64 : \
|
||||
((val) == A104_SECURITY_96_ECCHAN) ? 96 : \
|
||||
((val) == A104_SECURITY_128_ECCHAN) ? 128 : \
|
||||
((val) == A104_SECURITY_PROTO_128_ECCHAN) ? 128 : \
|
||||
((val) == A104_SECURITY_256_ECCHAN) ? 256 : 0
|
||||
|
||||
#define A108_ECCHAN(val) \
|
||||
((val) == A108_SECURITY_32_ECCHAN) ? 32 : \
|
||||
((val) == A108_SECURITY_64_ECCHAN) ? 64 : \
|
||||
((val) == A108_SECURITY_96_ECCHAN) ? 96 : \
|
||||
((val) == A108_SECURITY_128_ECCHAN) ? 128 : \
|
||||
((val) == A108_SECURITY_256_ECCHAN) ? 256 : 0
|
||||
|
||||
#define A500_ECCHAN(val) \
|
||||
((val) == A500_SECURITY_16_ECCHAN) ? 16 : \
|
||||
((val) == A500_SECURITY_64_ECCHAN) ? 64 : 0
|
||||
|
||||
#define AFT_RM_SECURITY_16_ECCHAN 0x00
|
||||
#define AFT_RM_SECURITY_32_ECCHAN 0x01
|
||||
#define AFT_RM_SECURITY_0_ECCHAN 0x05
|
||||
#define AFT_RM_ECCHAN(val) \
|
||||
((val) == AFT_RM_SECURITY_16_ECCHAN) ? 16 : \
|
||||
((val) == AFT_RM_SECURITY_32_ECCHAN) ? 32 : 0
|
||||
|
||||
#define AFT_A600_SECURITY_00_ECCHAN 0x00
|
||||
#define AFT_A600_SECURITY_05_ECCHAN 0x01
|
||||
#define A600_ECCHAN(val) \
|
||||
((val) == AFT_A600_SECURITY_00_ECCHAN) ? 0 : \
|
||||
((val) == AFT_A600_SECURITY_05_ECCHAN) ? 5 : 0
|
||||
|
||||
#define AFT_B601_SECURITY_00_ECCHAN 0x00
|
||||
#define AFT_B601_SECURITY_64_ECCHAN 0x01
|
||||
#define B601_ECCHAN(val) \
|
||||
((val) == AFT_B601_SECURITY_00_ECCHAN) ? 0 : \
|
||||
((val) == AFT_B601_SECURITY_64_ECCHAN) ? 64 : 0
|
||||
|
||||
|
||||
#define SDLA_ADPTR_NAME(adapter_type) \
|
||||
(adapter_type == S5141_ADPTR_1_CPU_SERIAL) ? "S514-1-PCI" : \
|
||||
(adapter_type == S5142_ADPTR_2_CPU_SERIAL) ? "S514-2-PCI" : \
|
||||
(adapter_type == S5143_ADPTR_1_CPU_FT1) ? "S514-3-PCI" : \
|
||||
(adapter_type == S5144_ADPTR_1_CPU_T1E1) ? "S514-4-PCI" : \
|
||||
(adapter_type == S5145_ADPTR_1_CPU_56K) ? "S514-5-PCI" : \
|
||||
(adapter_type == S5147_ADPTR_2_CPU_T1E1) ? "S514-7-PCI" : \
|
||||
(adapter_type == S518_ADPTR_1_CPU_ADSL) ? "S518-PCI" : \
|
||||
(adapter_type == A101_ADPTR_1TE1) ? "AFT-A101" : \
|
||||
(adapter_type == A101_ADPTR_2TE1) ? "AFT-A102" : \
|
||||
(adapter_type == A104_ADPTR_4TE1) ? "AFT-A104" : \
|
||||
(adapter_type == A108_ADPTR_8TE1) ? "AFT-A108" : \
|
||||
(adapter_type == A116_ADPTR_16TE1) ? "AFT-A116" : \
|
||||
(adapter_type == A300_ADPTR_U_1TE3) ? "AFT-A301" : \
|
||||
(adapter_type == A200_ADPTR_ANALOG) ? "AFT-A200" : \
|
||||
(adapter_type == A400_ADPTR_ANALOG) ? "AFT-A400" : \
|
||||
(adapter_type == AFT_ADPTR_ISDN) ? "AFT-A500" : \
|
||||
(adapter_type == AFT_ADPTR_B500) ? "AFT-B500" : \
|
||||
(adapter_type == AFT_ADPTR_56K) ? "AFT-A056" : \
|
||||
(adapter_type == AFT_ADPTR_2SERIAL_V35X21) ? "AFT-A142" : \
|
||||
(adapter_type == AFT_ADPTR_4SERIAL_V35X21) ? "AFT-A144" : \
|
||||
(adapter_type == AFT_ADPTR_2SERIAL_RS232) ? "AFT-A142" : \
|
||||
(adapter_type == AFT_ADPTR_4SERIAL_RS232) ? "AFT-A144" : \
|
||||
(adapter_type == U100_ADPTR) ? "U100" : \
|
||||
(adapter_type == AFT_ADPTR_A600) ? "AFT-B600" : \
|
||||
(adapter_type == AFT_ADPTR_B601) ? "AFT-B601" : \
|
||||
(adapter_type == AFT_ADPTR_B610) ? "AFT-B610" : \
|
||||
(adapter_type == AFT_ADPTR_B800) ? "AFT-B800" : \
|
||||
(adapter_type == AFT_ADPTR_FLEXBRI) ? "AFT-B700" : \
|
||||
(adapter_type == AFT_ADPTR_W400) ? "AFT-W400" : \
|
||||
(adapter_type == AFT_ADPTR_T116) ? "AFT-T116" : \
|
||||
"UNKNOWN"
|
||||
|
||||
#define AFT_GET_SECURITY(security) \
|
||||
((security >> AFT_SECURITY_CPLD_SHIFT) & AFT_SECURITY_CPLD_MASK)
|
||||
|
||||
#define AFT_SECURITY(adapter_security) \
|
||||
(adapter_security == AFT_SECURITY_CHAN) ? "c" : \
|
||||
(adapter_security == AFT_SECURITY_UNCHAN) ? "u" : ""
|
||||
|
||||
#define AFT_SECURITY_DECODE(adapter_security) \
|
||||
(adapter_security == AFT_SECURITY_CHAN) ? "Channelized" : \
|
||||
(adapter_security == AFT_SECURITY_UNCHAN) ? "Unchannelized" : ""
|
||||
|
||||
#define AFT_SUBTYPE(adptr_subtype) \
|
||||
(adptr_subtype == AFT_SUBTYPE_NORMAL) ? "" : \
|
||||
(adptr_subtype == AFT_SUBTYPE_SHARK) ? "-SH" : ""
|
||||
|
||||
#define AFT_SUBTYPE_DECODE(adptr_subtype) \
|
||||
(adptr_subtype == AFT_SUBTYPE_NORMAL) ? "" : \
|
||||
(adptr_subtype == AFT_SUBTYPE_SHARK) ? "SHARK" : ""
|
||||
|
||||
#define AFT_PCITYPE_DECODE(hwcard) \
|
||||
((hwcard)->u_pci.pci_bridge_dev) ? "PCIe" : "PCI"
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
#define AFT_PCIBRIDGE_DECODE(hwcard) "not defined"
|
||||
#else
|
||||
#define AFT_PCIBRIDGE_DECODE(hwcard) \
|
||||
(!(hwcard)->u_pci.pci_bridge_dev) ? "NONE" : \
|
||||
((hwcard)->u_pci.pci_bridge_dev->vendor == PLX_VENDOR_ID && \
|
||||
(hwcard)->u_pci.pci_bridge_dev->device == PLX_DEVICE_ID) ? "PLX1" : \
|
||||
((hwcard)->u_pci.pci_bridge_dev->vendor == PLX_VENDOR_ID && \
|
||||
(hwcard)->u_pci.pci_bridge_dev->device == PLX2_DEVICE_ID) ? "PLX2" : \
|
||||
((hwcard)->u_pci.pci_bridge_dev->vendor == TUNDRA_VENDOR_ID && \
|
||||
(hwcard)->u_pci.pci_bridge_dev->device == TUNDRA_DEVICE_ID) ? "TUND" : "NONE"
|
||||
#endif
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
#define DECODE_CARD_SUBTYPE(card_sub_type) \
|
||||
(card_sub_type == A101_1TE1_SUBSYS_VENDOR) ? "A101" : \
|
||||
(card_sub_type == AFT_1TE1_SHARK_SUBSYS_VENDOR) ? "A101D" : \
|
||||
(card_sub_type == A101_2TE1_SUBSYS_VENDOR) ? "A102" : \
|
||||
(card_sub_type == AFT_2TE1_SHARK_SUBSYS_VENDOR) ? "A102D" : \
|
||||
(card_sub_type == A104_4TE1_SUBSYS_VENDOR) ? "A104" : \
|
||||
(card_sub_type == AFT_4TE1_SHARK_SUBSYS_VENDOR) ? "A104D" : \
|
||||
(card_sub_type == AFT_8TE1_SHARK_SUBSYS_VENDOR) ? "A108D" : \
|
||||
(card_sub_type == AFT_16TE1_SHARK_SUBSYS_VENDOR) ? "A116D" : \
|
||||
(card_sub_type == AFT_ADPTR_FLEXBRI) ? "B700" : \
|
||||
(card_sub_type == A200_REMORA_SHARK_SUBSYS_VENDOR)? "A200" : "Unknown"
|
||||
|
||||
#define SDLA_CARD_TYPE_DECODE(cardtype) \
|
||||
((cardtype == SDLA_S514) ? "S514" : \
|
||||
(cardtype == SDLA_ADSL) ? "S518-ADSL" : \
|
||||
(cardtype == SDLA_AFT) ? "AFT" : "Invalid card")
|
||||
#endif/* __WINDOWS__ */
|
||||
|
||||
#endif /* _SDLASFM_H */
|
||||
|
|
@ -0,0 +1,96 @@
|
|||
#ifndef _SFMDEF_H
|
||||
#define _SFMDEF_H
|
||||
/*****************************************************************************
|
||||
* FILE: sfmdef.h SDLA Firmware Module Definitions
|
||||
* AUTHOR: Gene Kozin
|
||||
* ----------------------------------------------------------------------------
|
||||
* (c) Copyright 1995-1996 Sangoma Technologies Inc. All Rights Reserved.
|
||||
* ============================================================================
|
||||
* Rev.# Date Who Details
|
||||
* ----- ----------- --- ----------------------------------------------
|
||||
* 2.00 Apr.16,1996 GK Changed adapter & firmware codes.
|
||||
* 1.01 Dec.15,1995 GK
|
||||
* 1.00 Nov.09,1995 GK Initial version.
|
||||
*****************************************************************************/
|
||||
|
||||
/****** Defines *************************************************************/
|
||||
|
||||
#define SFM_VERSION 2
|
||||
#define SFM_SIGNATURE "SFM - Sangoma SDLA Firmware Module"
|
||||
|
||||
/*
|
||||
*----- Min/Max --------------------------------------------------------------
|
||||
*/
|
||||
#define SFM_IMAGE_SIZE 0x8000 /* max size of SDLA code image file */
|
||||
#define SFM_DESCR_LEN 256 /* max length of description string */
|
||||
#define SFM_MAX_SDLA 16 /* max number of compatible adapters */
|
||||
|
||||
/*
|
||||
*----- Adapter Types --------------------------------------------------------
|
||||
*/
|
||||
#ifndef SDLA_TYPES
|
||||
# define SDLA_TYPES
|
||||
# define SDLA_S502A 5020
|
||||
# define SDLA_S502E 5021
|
||||
# define SDLA_S503 5030
|
||||
# define SDLA_S508 5080
|
||||
# define SDLA_S507 5070
|
||||
# define SDLA_S509 5090
|
||||
#endif /* SDLA_TYPES */
|
||||
|
||||
/*
|
||||
*----- Firmware Identification Numbers --------------------------------------
|
||||
* 0 .. 999 Test & Diagnostics
|
||||
* 1000 .. 1999 Streaming HDLC
|
||||
* 2000 .. 2999 Bisync
|
||||
* 3000 .. 3999 SDLC
|
||||
* 4000 .. 4999 HDLC
|
||||
* 5000 .. 5999 X.25
|
||||
* 6000 .. 6999 Frame Relay
|
||||
* 7000 .. 7999 PPP
|
||||
*/
|
||||
#ifndef FIRMWARE_IDS
|
||||
# define FIRMWARE_IDS
|
||||
# define SFID_CALIB502 200
|
||||
# define SFID_STRM502 1200
|
||||
# define SFID_STRM508 1800
|
||||
# define SFID_BSC502 2200
|
||||
# define SFID_SDLC502 3200
|
||||
# define SFID_HDLC502 4200
|
||||
# define SFID_X25_502 5200
|
||||
# define SFID_FR502 6200
|
||||
# define SFID_FR508 6800
|
||||
# define SFID_PPP502 7200
|
||||
# define SFID_PPP508 7800
|
||||
#endif /* FIRMWARE_IDS */
|
||||
|
||||
/****** Data Types **********************************************************/
|
||||
|
||||
typedef struct SFMInfo /* SDLA Firmware Module Information Block */
|
||||
{
|
||||
unsigned short codeid; /* firmware ID */
|
||||
unsigned short version; /* firmaware version number */
|
||||
unsigned short adapter[SFM_MAX_SDLA]; /* compatible adapter types */
|
||||
unsigned long memsize; /* minimum memory size */
|
||||
unsigned short reserved[2]; /* reserved */
|
||||
unsigned short startoffs; /* entry point offset */
|
||||
unsigned short winoffs; /* dual-port memory window offset */
|
||||
unsigned short codeoffs; /* code load offset */
|
||||
unsigned short codesize; /* code size */
|
||||
unsigned short dataoffs; /* configuration data load offset */
|
||||
unsigned short datasize; /* configuration data size */
|
||||
} SFMInfo_t;
|
||||
|
||||
typedef struct SFM /* SDLA Firmware Module Structire */
|
||||
{
|
||||
char signature[80]; /* SFM file signature */
|
||||
unsigned short version; /* file format version */
|
||||
unsigned short checksum; /* info + image */
|
||||
unsigned short reserved[6]; /* reserved */
|
||||
char descr[SFM_DESCR_LEN]; /* optional description string */
|
||||
SFMInfo_t info; /* firmware module info */
|
||||
unsigned char image[0]; /* loadable code image */
|
||||
} SFM_t;
|
||||
|
||||
#endif /* _SFMDEF_H */
|
||||
|
|
@ -0,0 +1,87 @@
|
|||
/*************************************************************************
|
||||
ss7_linux.h Sangoma SS7 firmware API definitions
|
||||
|
||||
Author: Gideon Hack
|
||||
Nenad Corbic <ncorbic@sangoma.com>
|
||||
|
||||
Copyright: (c) 1995-2000 Sangoma Technologies Inc.
|
||||
|
||||
This program is free software; you can redistribute it and/or
|
||||
modify it under the term of the GNU General Public License
|
||||
as published by the Free Software Foundation; either version
|
||||
2 of the License, or (at your option) any later version.
|
||||
|
||||
===========================================================================
|
||||
Dec 22, 2000 Gideon Hack Initial Verison
|
||||
Jan 16, 2001 Gideon Hack Header updates
|
||||
===========================================================================
|
||||
|
||||
Descripiton:
|
||||
The 'C' header file for the Sangoma S508/S514 SS7 code API.
|
||||
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef _SS7_LINUX_H
|
||||
#define _SS7_LINUX_H
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
#include <linux/sdla_ss7.h>
|
||||
#include <linux/if_wanpipe.h>
|
||||
|
||||
enum {
|
||||
SIOCC_PC_RESERVED = (SIOC_WANPIPE_DEVPRIVATE),
|
||||
SIOCS_GENERAL_CMD,
|
||||
SIOCS_CHECK_FRONT_STATE,
|
||||
SIOC_RECEIVE,
|
||||
SIOC_SEND,
|
||||
SIOC_RECEIVE_WAIT,
|
||||
SIOC_RECEIVE_AVAILABLE,
|
||||
SIOC_RETRIEVE_MSU_BUFS
|
||||
};
|
||||
|
||||
#define SS7_CMD_BLOCK_SZ (sizeof(wan_mbox_t)-1-SIZEOF_MB_DATA_BFR)
|
||||
|
||||
|
||||
typedef struct {
|
||||
unsigned char status ;
|
||||
unsigned char data_avail ;
|
||||
unsigned short real_length ;
|
||||
unsigned short time_stamp ;
|
||||
unsigned char data[1] ;
|
||||
} trace_pkt_t;
|
||||
|
||||
/* modem status changes */
|
||||
#define DCD_HIGH 0x08
|
||||
#define CTS_HIGH 0x20
|
||||
|
||||
/* Special UDP drivers management commands */
|
||||
#define SPIPE_ENABLE_TRACING 0x50
|
||||
#define SPIPE_DISABLE_TRACING 0x51
|
||||
#define SPIPE_GET_TRACE_INFO 0x52
|
||||
#define SPIPE_GET_IBA_DATA 0x53
|
||||
#define SPIPE_FT1_READ_STATUS 0x54
|
||||
#define SPIPE_DRIVER_STAT_IFSEND 0x55
|
||||
#define SPIPE_DRIVER_STAT_INTR 0x56
|
||||
#define SPIPE_DRIVER_STAT_GEN 0x57
|
||||
#define SPIPE_FLUSH_DRIVER_STATS 0x58
|
||||
#define SPIPE_ROUTER_UP_TIME 0x59
|
||||
|
||||
/* Driver specific commands for API */
|
||||
#define CHDLC_READ_TRACE_DATA 0xE4 /* read trace data */
|
||||
#define TRACE_ALL 0x00
|
||||
#define TRACE_PROT 0x01
|
||||
#define TRACE_DATA 0x02
|
||||
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
|
||||
#ifdef UDPMGMT_SIGNATURE
|
||||
# undef UDPMGMT_SIGNATURE
|
||||
# define UDPMGMT_SIGNATURE "CTPIPEAB" /* "STPIPEAB" */
|
||||
#endif
|
||||
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
/* wan_mem_debug.h */
|
||||
#ifndef __WAN_MEMDEBUG_H_
|
||||
#define __WAN_MEMDEBUG_H_
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
** MEMORY DEBUG F U N C T I O N S
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(WAN_DEBUG_MEM)
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
|
||||
#if defined(BUSENUM_DRV)
|
||||
# define WAN_DEBUG_MEM_CALL
|
||||
#else
|
||||
# define WAN_DEBUG_MEM_CALL DECLSPEC_IMPORT
|
||||
#endif
|
||||
|
||||
int __sdla_memdbg_init(void);
|
||||
int __sdla_memdbg_free(void);
|
||||
int __sdla_memdbg_push(void *mem, const char *func_name, const int line, int len);
|
||||
int __sdla_memdbg_pull(void *mem, const char *func_name, const int line);
|
||||
|
||||
#else
|
||||
|
||||
# define WAN_DEBUG_MEM_CALL
|
||||
|
||||
#endif /* !__WINDOWS__*/
|
||||
|
||||
WAN_DEBUG_MEM_CALL int sdla_memdbg_init(void);
|
||||
WAN_DEBUG_MEM_CALL int sdla_memdbg_free(void);
|
||||
WAN_DEBUG_MEM_CALL int sdla_memdbg_push(void *mem, const char *func_name, const int line, int len);
|
||||
WAN_DEBUG_MEM_CALL int sdla_memdbg_pull(void *mem, const char *func_name, const int line);
|
||||
|
||||
#endif /* WAN_DEBUG_MEM */
|
||||
|
||||
#endif /* __WAN_MEMDEBUG_H_ */
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,218 @@
|
|||
/*****************************************************************************
|
||||
* wanpipe_abstr.h WANPIPE(tm) Kernel Abstraction Layer.
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
* Alex Feldman <al.feldman@sangoma.com>
|
||||
* David Rokhvarg <davidr@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2003 Sangoma Technologies Inc.
|
||||
*
|
||||
* ============================================================================
|
||||
* Jan 20, 2003 Nenad Corbic Initial version
|
||||
*
|
||||
* Nov 27, 2007 David Rokhvarg Implemented functions/definitions for
|
||||
* Sangoma MS Windows Driver and API.
|
||||
*
|
||||
* ============================================================================
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _WANPIPE_ABSTR_H
|
||||
#define _WANPIPE_ABSTR_H
|
||||
|
||||
|
||||
#include "wanpipe_abstr_types.h"
|
||||
|
||||
|
||||
extern unsigned char* wpabs_skb_data(void* skb);
|
||||
extern unsigned char* wpabs_skb_tail(void* skb);
|
||||
extern int wpabs_skb_len(void* skb);
|
||||
extern void* wpabs_skb_alloc(unsigned int len);
|
||||
extern void wpabs_skb_free(void* skb);
|
||||
#if defined(__WINDOWS__) || defined(__FreeBSD__)
|
||||
extern void wpabs_skb_copyback(void*, int, int, caddr_t);
|
||||
#else
|
||||
extern void wpabs_skb_copyback(void*, int, int, unsigned long);
|
||||
#endif
|
||||
|
||||
extern void wpabs_skb_copyback_user(void* skb, int off, int len, ulong_ptr_t cp);
|
||||
extern unsigned char* wpabs_skb_pull(void* skb, int len);
|
||||
extern unsigned char* wpabs_skb_put(void* skb, int len);
|
||||
extern unsigned char* wpabs_skb_push(void* skb, int len);
|
||||
extern void wpabs_skb_reserve(void* skb, int len);
|
||||
extern void wpabs_skb_trim(void* skb, unsigned int len);
|
||||
extern int wpabs_skb_tailroom(void *skb);
|
||||
extern int wpabs_skb_headroom(void *skb);
|
||||
extern void wpabs_skb_init(void* skb, unsigned int len);
|
||||
extern void* wpabs_skb_clone(void* skb);
|
||||
extern void* wpabs_skb_copy(void* skb);
|
||||
|
||||
extern void* wpabs_skb_alloc_queue(void);
|
||||
extern void wpabs_skb_free_queue(void*);
|
||||
extern void wpabs_skb_queue_init(void *);
|
||||
extern void wpabs_skb_queue_purge(void *);
|
||||
extern int wpabs_skb_queue_len(void *);
|
||||
extern void wpabs_skb_queue_tail(void *, void *);
|
||||
extern void wpabs_skb_queue_head(void *,void *);
|
||||
extern void wpabs_skb_append(void *,void *, void*);
|
||||
extern void wpabs_skb_unlink(void *);
|
||||
|
||||
extern void* wpabs_skb_dequeue(void *queue);
|
||||
|
||||
extern void wpabs_skb_set_dev(void *skb, void *dev);
|
||||
extern void wpabs_skb_set_raw(void *skb);
|
||||
extern void wpabs_skb_set_protocol(void *skb, unsigned int prot);
|
||||
extern void wpabs_skb_set_csum(void *skb_new_ptr, unsigned int csum);
|
||||
extern unsigned int wpabs_skb_csum(void *skb_new_ptr);
|
||||
|
||||
|
||||
extern void* wpabs_netif_alloc(unsigned char *,int,int*);
|
||||
extern void wpabs_netif_free(void *);
|
||||
extern unsigned char* wpabs_netif_name(void *);
|
||||
extern int wpabs_netif_queue_stopped(void*);
|
||||
extern int wpabs_netif_dev_up(void*);
|
||||
extern void wpabs_netif_wake_queue(void* dev);
|
||||
|
||||
extern void* wpabs_timer_alloc(void);
|
||||
extern void wpabs_init_timer(void*, void*,
|
||||
#if defined(__WINDOWS__)
|
||||
wan_timer_arg_t);
|
||||
#else
|
||||
unsigned long);
|
||||
#endif
|
||||
|
||||
extern void wpabs_del_timer(void*);
|
||||
extern void wpabs_add_timer(void*,unsigned long);
|
||||
|
||||
extern void* wpabs_malloc(int);
|
||||
extern void* wpabs_kmalloc(int);
|
||||
extern void wpabs_free(void*);
|
||||
|
||||
|
||||
extern unsigned long* wpabs_bus2virt(unsigned long phys_addr);
|
||||
extern unsigned long wpabs_virt2bus(unsigned long* virt_addr);
|
||||
|
||||
extern unsigned char wpabs_bus_read_1(void*, int);
|
||||
extern unsigned long wpabs_bus_read_4(void*, int);
|
||||
extern void wpabs_bus_write_1(void*, int, unsigned char);
|
||||
extern void wpabs_bus_write_4(void*, int, unsigned long);
|
||||
|
||||
extern void wpabs_udelay(unsigned long microsecs);
|
||||
|
||||
extern void* wpabs_spinlock_alloc(void);
|
||||
extern void wpabs_spinlock_free(void*);
|
||||
extern void wpabs_spin_lock_irqsave(void*,unsigned long*);
|
||||
extern void wpabs_spin_unlock_irqrestore(void*,unsigned long*);
|
||||
extern void wpabs_spin_lock_init(void*, char*);
|
||||
|
||||
extern void wpabs_rwlock_init (void*);
|
||||
extern void wpabs_read_rw_lock(void*);
|
||||
extern void wpabs_read_rw_unlock(void*);
|
||||
extern void wpabs_write_rw_lock_irq(void*,unsigned long*);
|
||||
extern void wpabs_write_rw_unlock_irq(void*,unsigned long*);
|
||||
|
||||
extern void wpabs_debug_event(const char * fmt, ...);
|
||||
extern void __wpabs_debug_event(const char * fmt, ...);
|
||||
extern void wpabs_debug_init(const char * fmt, ...);
|
||||
extern void wpabs_debug_cfg(const char * fmt, ...);
|
||||
extern void wpabs_debug_tx(const char * fmt, ...);
|
||||
extern void wpabs_debug_rx(const char * fmt, ...);
|
||||
extern void wpabs_debug_isr(const char * fmt, ...);
|
||||
extern void wpabs_debug_timer(const char * fmt, ...);
|
||||
extern void wpabs_debug_test(const char * fmt, ...);
|
||||
|
||||
extern int wpabs_set_bit(int bit, void *ptr);
|
||||
extern int wpabs_test_bit(int bit, void *ptr);
|
||||
extern int wpabs_test_and_set_bit(int bit, void *ptr);
|
||||
extern int wpabs_clear_bit(int bit, void *ptr);
|
||||
|
||||
extern wan_ticks_t wpabs_get_systemticks(void);
|
||||
extern unsigned long wpabs_get_hz(void);
|
||||
extern unsigned short wpabs_htons(unsigned short data);
|
||||
extern unsigned short wpabs_ntohs(unsigned short);
|
||||
extern unsigned long wpabs_htonl(unsigned long data);
|
||||
extern unsigned long wpabs_ntohl(unsigned long);
|
||||
|
||||
#if 0
|
||||
extern void wpabs_lan_rx(void*,void*,unsigned long,unsigned char*, int);
|
||||
extern void wpabs_tx_complete(void*, int, int);
|
||||
|
||||
extern void* wpabs_ttydriver_alloc(void);
|
||||
extern void wpabs_ttydriver_free(void*);
|
||||
extern void* wpabs_termios_alloc(void);
|
||||
extern void wpabs_tty_hangup(void*);
|
||||
|
||||
extern int wpabs_wan_register(void *,
|
||||
void *,
|
||||
char *,
|
||||
unsigned char);
|
||||
|
||||
extern void wpabs_wan_unregister(void *, unsigned char);
|
||||
#endif
|
||||
|
||||
extern void* wpabs_taskq_alloc(void);
|
||||
extern void wpabs_taskq_init(void *, void *, void *);
|
||||
extern void wpabs_taskq_schedule_event(unsigned int, unsigned long *, void *);
|
||||
|
||||
extern void wpabs_tasklet_kill(void *);
|
||||
extern void wpabs_tasklet_end(void *);
|
||||
extern void wpabs_tasklet_schedule(void *);
|
||||
extern void wpabs_tasklet_init(void *, int , void *, void* );
|
||||
extern void* wpabs_tasklet_alloc(void);
|
||||
|
||||
extern void* wpabs_memset(void *, int , int);
|
||||
extern void* wpabs_strncpy(void *, void* , int);
|
||||
extern void* wpabs_memcpy(void *, void* , int);
|
||||
extern int wpabs_memcmp(void *, void* , int);
|
||||
|
||||
extern int wpabs_strlen(unsigned char *);
|
||||
|
||||
extern void wpabs_debug_print_skb(void*,char);
|
||||
|
||||
extern void wpabs_decode_ipaddr(unsigned long, unsigned char *,int);
|
||||
|
||||
extern int wpabs_detect_prot_header(unsigned char *,int, char*,int);
|
||||
extern int wpabs_net_ratelimit(void);
|
||||
extern void wpabs_get_random_bytes(void *ptr, int len);
|
||||
|
||||
/* ===========================================
|
||||
* FUNCTION PRIVATE TO WANPIPE MODULES
|
||||
* ==========================================*/
|
||||
|
||||
extern void wpabs_set_baud(void*, unsigned int);
|
||||
extern void wpabs_set_state(void*, int);
|
||||
extern char wpabs_get_state(void*);
|
||||
extern unsigned long wpabs_get_ip_addr(void*, int);
|
||||
|
||||
|
||||
extern void wpabs_card_lock_irq(void *,unsigned long *);
|
||||
extern void wpabs_card_unlock_irq(void *,unsigned long *);
|
||||
|
||||
extern void* wpabs_dma_alloc(void*, unsigned long);
|
||||
extern int wpabs_dma_free(void*, void*);
|
||||
extern unsigned long* wpabs_dma_get_vaddr(void*, void*);
|
||||
extern unsigned long wpabs_dma_get_paddr(void*, void*);
|
||||
|
||||
extern int wpabs_trace_queue_len(void *trace_ptr);
|
||||
extern int wpabs_tracing_enabled(void*);
|
||||
extern int wpabs_trace_enqueue(void*, void*);
|
||||
extern int wpabs_trace_purge(void*);
|
||||
extern void* wpabs_trace_info_alloc(void);
|
||||
extern void wpabs_trace_info_init(void *trace_ptr, int max_queue);
|
||||
extern void wpabs_set_last_trace_direction(void *trace_ptr, unsigned char direction);
|
||||
extern unsigned char wpabs_get_last_trace_direction(void *trace_ptr);
|
||||
|
||||
extern int wpabs_bpf_report(void *dev, void *skb, int,int);
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
# if WP_USE_INTERLOCKED_LIST_FUNCTIONS
|
||||
# pragma deprecated(wpabs_skb_append)
|
||||
# pragma deprecated(wpabs_skb_unlink)
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,179 @@
|
|||
/************************************************************************
|
||||
* wanpipe_abstr_types.h WANPIPE(tm) *
|
||||
* *
|
||||
* Wanpipe Kernel Abstraction type definitions *
|
||||
* *
|
||||
* *
|
||||
* Authors: Alex Feldman <al.feldman@sangoma.com> *
|
||||
David Rokhvarg <davidr@sangoma.com> *
|
||||
*=======================================================================*
|
||||
* *
|
||||
* Nov 02, 2009 David Rokhvarg *
|
||||
* Moved definitions for Sangoma MS Windows driver from *
|
||||
* wanpipe_ctypes.h to this file. The wanpipe_ctypes.h is *
|
||||
* not removed, but it will include this file for backward *
|
||||
* compatibility with existing source code. *
|
||||
* *
|
||||
* Jan 24, 2008 Alex Feldman *
|
||||
* Initial version *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_ABSTR_TYPES_H
|
||||
# define __WANPIPE_ABSTR_TYPES_H
|
||||
|
||||
|
||||
|
||||
#if defined(__FreeBSD__)
|
||||
/******************* F R E E B S D ******************************/
|
||||
typedef int wan_ticks_t;
|
||||
typedef unsigned long ulong_ptr_t;
|
||||
typedef long long_t;
|
||||
typedef unsigned long ulong_t;
|
||||
#define wan_timeval timeval
|
||||
#define wan_timeval_t struct timeval
|
||||
#elif defined(__OpenBSD__)
|
||||
/******************* O P E N B S D ******************************/
|
||||
typedef int wan_ticks_t;
|
||||
typedef unsigned long ulong_ptr_t;
|
||||
typedef long long_t;
|
||||
typedef unsigned long ulong_t;
|
||||
#define wan_timeval timeval
|
||||
#define wan_timeval_t struct timeval
|
||||
#elif defined(__NetBSD__)
|
||||
/******************* N E T B S D ******************************/
|
||||
typedef int wan_ticks_t;
|
||||
typedef unsigned long ulong_ptr_t;
|
||||
typedef long long_t ;
|
||||
typedef unsigned long ulong_t;
|
||||
#define wan_timeval timeval
|
||||
#define wan_timeval_t struct timeval
|
||||
#elif defined(__LINUX__)
|
||||
/*********************** L I N U X ******************************/
|
||||
typedef unsigned long wan_ticks_t;
|
||||
typedef unsigned long ulong_ptr_t;
|
||||
typedef unsigned long wan_time_t;
|
||||
typedef unsigned long wan_suseconds_t;
|
||||
typedef long long_t;
|
||||
typedef unsigned long ulong_t;
|
||||
#define wan_timeval timeval
|
||||
#define wan_timeval_t struct timeval
|
||||
typedef unsigned int wan_bitmap_t; /* 32 bit-wide on both 32 and 64 bit systems */
|
||||
#elif defined(__WINDOWS__)
|
||||
/******************* W I N D O W S ******************************/
|
||||
|
||||
/************* Basic data types **********/
|
||||
|
||||
/* signed types */
|
||||
#define int8_t INT8
|
||||
#define int16_t INT16
|
||||
#define int32_t INT32
|
||||
#define int64_t INT64
|
||||
|
||||
typedef int8_t int8;
|
||||
typedef int16_t int16;
|
||||
typedef int32_t int32;
|
||||
typedef int64_t int64;
|
||||
|
||||
/* unsigned types */
|
||||
#define u_int8_t UINT8
|
||||
#define u_int16_t UINT16
|
||||
#define u_int32_t UINT32
|
||||
#define u_int64_t UINT64
|
||||
|
||||
typedef unsigned int wan_ticks_t;
|
||||
typedef __time64_t wan_time_t;
|
||||
typedef unsigned int wan_suseconds_t;
|
||||
|
||||
struct wan_timeval
|
||||
{
|
||||
wan_time_t tv_sec;
|
||||
wan_suseconds_t tv_usec;
|
||||
};
|
||||
|
||||
typedef struct wan_timeval wan_timeval_t;
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
typedef LONG long_t;
|
||||
typedef ULONG ulong_t;
|
||||
|
||||
# if defined(_WIN64)
|
||||
typedef unsigned __int64 ulong_ptr_t;
|
||||
# else
|
||||
typedef unsigned __int32 ulong_ptr_t;
|
||||
# endif
|
||||
|
||||
# define timeval wan_timeval/* kernel-mode only - will NOT conflict with winsock.h */
|
||||
|
||||
# else/* (WAN_KERNEL) */
|
||||
typedef long long_t;
|
||||
typedef unsigned long ulong_t;
|
||||
#endif
|
||||
|
||||
typedef ulong_t u_long;
|
||||
|
||||
typedef u_int8_t uint8_t;
|
||||
typedef u_int16_t uint16_t;
|
||||
typedef u_int32_t uint32_t;
|
||||
typedef u_int64_t uint64_t;
|
||||
|
||||
typedef uint8_t u8;
|
||||
typedef uint16_t u16;
|
||||
typedef uint32_t u32;
|
||||
typedef uint64_t u64;
|
||||
|
||||
typedef uint8_t __u8;
|
||||
typedef uint16_t __u16;
|
||||
typedef uint32_t __u32;
|
||||
typedef uint64_t __u64;
|
||||
|
||||
typedef unsigned int uint;
|
||||
typedef unsigned short ushort;
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
typedef u_int8_t u_char;
|
||||
typedef unsigned int UINT, *PUINT;
|
||||
|
||||
/* AFT DMA addresses are MAXIMUM 32-bit wide!!!
|
||||
* This is why this declaration is safe: */
|
||||
typedef u32 dma_addr_t;
|
||||
/*typedef PHYSICAL_ADDRESS dma_addr_t;*/
|
||||
/*typedef LONGLONG dma_addr_t;*/
|
||||
#endif
|
||||
|
||||
typedef char* caddr_t;
|
||||
typedef struct { long_t counter; } atomic_t; /* Interlocked functions require LONG parameter */
|
||||
typedef ulong_t wan_bitmap_t; /* atomic bit-manupulation require LONG.
|
||||
* 32 bit-wide on both 32 and 64 bit systems */
|
||||
|
||||
/******** End of Basic data types ********/
|
||||
|
||||
typedef u32 gfp_t;
|
||||
|
||||
#if !defined(WAN_KERNEL)
|
||||
#if defined(_WIN64)
|
||||
#define DWL_MSGRESULT DWLP_MSGRESULT
|
||||
#define DWL_USER DWLP_USER
|
||||
#define DLGPROC_RETURN_TYPE INT_PTR
|
||||
#else
|
||||
#define DLGPROC_RETURN_TYPE BOOL
|
||||
#endif
|
||||
#endif/* !defined(WAN_KERNEL) */
|
||||
|
||||
#endif /* __WINDOWS__ */
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
/*
|
||||
* We support 32 bit applications running on 64 bit machines.
|
||||
* This requires pointers used by WAN_COPY_FROM_USER() and
|
||||
* WAN_COPY_TO_USER() to be 64 bit on both platforms.
|
||||
* The WP_POINTER_64 will be used for that.
|
||||
*
|
||||
* Do NOT use "POINTER_64" - some versions of MS compiler
|
||||
* will expand it incorrectly to __ptr32.
|
||||
*/
|
||||
# define WP_POINTER_64 __ptr64
|
||||
#else
|
||||
# define WP_POINTER_64
|
||||
#endif
|
||||
|
||||
#endif /* __WANPIPE_ABSTR_TYPES_H */
|
|
@ -0,0 +1,288 @@
|
|||
/******************************************************************************//**
|
||||
* \file wanpipe_api.h
|
||||
* \brief WANPIPE(tm) Driver API - Provides FULL Wanpipe Driver API Support
|
||||
* \brief Full API includes: Management/Configuration/IO/Events
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
* David Rokhvarg <davidr@sangoma.com>
|
||||
* Alex Feldman <alex@sangoma.com>
|
||||
*
|
||||
* Copyright (c) 2007 - 08, Sangoma Technologies
|
||||
* All rights reserved.
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of the Sangoma Technologies nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Sangoma Technologies ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Sangoma Technologies BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* ===============================================================================
|
||||
*/
|
||||
|
||||
#ifndef _AFT_CORE_API_H__
|
||||
#define _AFT_CORE_API_H__
|
||||
|
||||
#include "aft_core_user.h"
|
||||
#include "wanpipe_api_hdr.h"
|
||||
#include "wanpipe_api_iface.h"
|
||||
#include "wanpipe_codec_iface.h"
|
||||
|
||||
/***************************************************************//**
|
||||
* WANPIPE API HEADER & EVENT STRUCTURE
|
||||
* Common Unified API Header for all Protocols
|
||||
*
|
||||
* (This file is also included at the top. This include
|
||||
* has been added so its easier to follow the api header)
|
||||
*****************************************************************/
|
||||
#include "wanpipe_api_hdr.h"
|
||||
|
||||
|
||||
/****************************************************************//**
|
||||
* WANPIPE LEGACY API
|
||||
*******************************************************************/
|
||||
#include "wanpipe_api_legacy.h"
|
||||
|
||||
|
||||
/*================================================================
|
||||
* UDP API Structure
|
||||
*================================================================*/
|
||||
|
||||
#define GLOBAL_UDP_SIGNATURE "WANPIPE"
|
||||
#define GLOBAL_UDP_SIGNATURE_LEN 7
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/*!
|
||||
\struct wan_mgmt
|
||||
\brief Wanpipe UDP Management Structure
|
||||
|
||||
\typedef wan_mgmt_t
|
||||
*/
|
||||
typedef struct wan_mgmt{
|
||||
unsigned char signature[8];
|
||||
unsigned char request_reply;
|
||||
unsigned char id;
|
||||
unsigned char reserved[6];
|
||||
} wan_mgmt_t;
|
||||
|
||||
/*!
|
||||
\struct wan_udp_hdr
|
||||
\brief Wanpipe UDP Structure used for Maintenance and Debugging
|
||||
|
||||
This structure is used in conjunction with WANPIPE_IOCTL_PIPEMON ioctl.
|
||||
Commands used with this structure are defined in enum WANPIPE_IOCTL_PIPEMON_CMDS
|
||||
|
||||
\typedef wan_udp_hdr_t
|
||||
*/
|
||||
typedef struct wan_udp_hdr{
|
||||
wan_mgmt_t wan_mgmt; /*!< Used by legacy S514 code, not used for AFT */
|
||||
wan_cmd_t wan_cmd; /*!< Stores command/result/data size */
|
||||
union {
|
||||
struct {
|
||||
wan_trace_info_t trace_info; /*!< Used to pass data trace information */
|
||||
unsigned char data[WAN_MAX_DATA_SIZE]; /*!< Data/Result buffer */
|
||||
} chdlc, adsl, atm, ss7,bitstrm,aft;
|
||||
#define xilinx aft
|
||||
//unsigned char data[WAN_MAX_DATA_SIZE];
|
||||
} wan_udphdr_u;
|
||||
#define wan_udphdr_signature wan_mgmt.signature
|
||||
#define wan_udphdr_request_reply wan_mgmt.request_reply
|
||||
#define wan_udphdr_id wan_mgmt.id
|
||||
#define wan_udphdr_opp_flag wan_cmd.wan_cmd_opp_flag
|
||||
#define wan_udphdr_command wan_cmd.wan_cmd_command
|
||||
#define wan_udphdr_data_len wan_cmd.wan_cmd_data_len
|
||||
#define wan_udphdr_return_code wan_cmd.wan_cmd_return_code
|
||||
#define wan_udphdr_fe_force wan_cmd.wan_cmd_fe_force
|
||||
#define wan_udphdr_hdlc_PF_bit wan_cmd.wan_cmd_hdlc_PF_bit
|
||||
#define wan_udphdr_fr_dlci wan_cmd.wan_cmd_fr_dlci
|
||||
#define wan_udphdr_fr_attr wan_cmd.wan_cmd_fr_attr
|
||||
#define wan_udphdr_fr_rxlost1 wan_cmd.wan_cmd_fr_rxlost1
|
||||
#define wan_udphdr_fr_rxlost2 wan_cmd.wan_cmd_fr_rxlost2
|
||||
#define wan_udphdr_x25_pf wan_cmd.wan_cmd_x25_pf
|
||||
#define wan_udphdr_x25_lcn wan_cmd.wan_cmd_x25_lcn
|
||||
#define wan_udphdr_x25_qdm wan_cmd.wan_cmd_x25_qdm
|
||||
#define wan_udphdr_x25_cause wan_cmd.wan_cmd_x25_cause
|
||||
#define wan_udphdr_x25_diagn wan_cmd.wan_cmd_x25_diagn
|
||||
#define wan_udphdr_x25_pktType wan_cmd.wan_cmd_x25_pktType
|
||||
#define wan_udphdr_bscstrm_misc_bits wan_cmd.wan_cmd_bscstrm_misc_bits
|
||||
#define wan_udphdr_bscstrm_Rx_err_bits wan_cmd.wan_cmd_bscstrm_Rx_err_bits
|
||||
#define wan_udphdr_bscstrm_Rx_time_stamp wan_cmd.wan_cmd_bscstrm_Rx_time_stamp
|
||||
#define wan_udphdr_bscstrm_port wan_cmd.wan_cmd_bscstrm_port
|
||||
#define wan_udphdr_bsc_misc_bits wan_cmd.wan_cmd_bsc_misc_bit
|
||||
#define wan_udphdr_bsc_misc_heading_len wan_cmd.wan_cmd_bsc_misc_heading_len
|
||||
#define wan_udphdr_bsc_misc_notify wan_cmd.wan_cmd_bsc_misc_notify
|
||||
#define wan_udphdr_bsc_misc_station wan_cmd.wan_cmd_bsc_misc_station
|
||||
#define wan_udphdr_bsc_misc_poll_add wan_cmd.wan_cmd_bsc_misc_poll_addr
|
||||
#define wan_udphdr_bsc_misc_select_addr wan_cmd.wan_cmd_bsc_misc_select_addr
|
||||
#define wan_udphdr_bsc_misc_device_addr wan_cmd.wan_cmd_bsc_misc_device_addr
|
||||
#define wan_udphdr_chdlc_num_frames wan_udphdr_u.chdlc.trace_info.num_frames
|
||||
#define wan_udphdr_chdlc_ismoredata wan_udphdr_u.chdlc.trace_info.ismoredata
|
||||
#define wan_udphdr_chdlc_data wan_udphdr_u.chdlc.data
|
||||
|
||||
#define wan_udphdr_bitstrm_num_frames wan_udphdr_u.bitstrm.trace_info.num_frames
|
||||
#define wan_udphdr_bitstrm_ismoredata wan_udphdr_u.bitstrm.trace_info.ismoredata
|
||||
#define wan_udphdr_bitstrm_data wan_udphdr_u.bitstrm.data
|
||||
|
||||
#define wan_udphdr_adsl_num_frames wan_udphdr_u.adsl.trace_info.num_frames
|
||||
#define wan_udphdr_adsl_ismoredata wan_udphdr_u.adsl.trace_info.ismoredata
|
||||
#define wan_udphdr_adsl_data wan_udphdr_u.adsl.data
|
||||
#define wan_udphdr_atm_num_frames wan_udphdr_u.atm.trace_info.num_frames
|
||||
#define wan_udphdr_atm_ismoredata wan_udphdr_u.atm.trace_info.ismoredata
|
||||
#define wan_udphdr_atm_data wan_udphdr_u.atm.data
|
||||
#define wan_udphdr_ss7_num_frames wan_udphdr_u.ss7.trace_info.num_frames
|
||||
#define wan_udphdr_ss7_ismoredata wan_udphdr_u.ss7.trace_info.ismoredata
|
||||
#define wan_udphdr_ss7_data wan_udphdr_u.ss7.data
|
||||
|
||||
#define wan_udphdr_aft_trace_info wan_udphdr_u.aft.trace_info
|
||||
#define wan_udphdr_aft_num_frames wan_udphdr_u.aft.trace_info.num_frames
|
||||
#define wan_udphdr_aft_ismoredata wan_udphdr_u.aft.trace_info.ismoredata
|
||||
#define wan_udphdr_aft_data wan_udphdr_u.aft.data
|
||||
#define wan_udphdr_data wan_udphdr_aft_data
|
||||
|
||||
} wan_udp_hdr_t;
|
||||
|
||||
|
||||
|
||||
/*================================================================
|
||||
* KERNEL UDP API Structure
|
||||
*================================================================*/
|
||||
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
typedef struct wan_udp_pkt {
|
||||
iphdr_t ip_hdr;
|
||||
udphdr_t udp_hdr;
|
||||
wan_udp_hdr_t wan_udp_hdr;
|
||||
|
||||
#define wan_ip ip_hdr
|
||||
#define wan_ip_v ip_hdr.w_ip_v
|
||||
#define wan_ip_hl ip_hdr.w_ip_hl
|
||||
#define wan_ip_tos ip_hdr.w_ip_tos
|
||||
#define wan_ip_len ip_hdr.w_ip_len
|
||||
#define wan_ip_id ip_hdr.w_ip_id
|
||||
#define wan_ip_off ip_hdr.w_ip_off
|
||||
#define wan_ip_ttl ip_hdr.w_ip_ttl
|
||||
#define wan_ip_p ip_hdr.w_ip_p
|
||||
#define wan_ip_sum ip_hdr.w_ip_sum
|
||||
#define wan_ip_src ip_hdr.w_ip_src
|
||||
#define wan_ip_dst ip_hdr.w_ip_dst
|
||||
#define wan_udp_sport udp_hdr.w_udp_sport
|
||||
#define wan_udp_dport udp_hdr.w_udp_dport
|
||||
#define wan_udp_len udp_hdr.w_udp_len
|
||||
#define wan_udp_sum udp_hdr.w_udp_sum
|
||||
#define wan_udp_cmd wan_udp_hdr.wan_cmd
|
||||
#define wan_udp_signature wan_udp_hdr.wan_udphdr_signature
|
||||
#define wan_udp_request_reply wan_udp_hdr.wan_udphdr_request_reply
|
||||
#define wan_udp_id wan_udp_hdr.wan_udphdr_id
|
||||
#define wan_udp_opp_flag wan_udp_hdr.wan_udphdr_opp_flag
|
||||
#define wan_udp_command wan_udp_hdr.wan_udphdr_command
|
||||
#define wan_udp_data_len wan_udp_hdr.wan_udphdr_data_len
|
||||
#define wan_udp_return_code wan_udp_hdr.wan_udphdr_return_code
|
||||
#define wan_udp_hdlc_PF_bit wan_udp_hdr.wan_udphdr_hdlc_PF_bit
|
||||
#define wan_udp_fr_dlci wan_udp_hdr.wan_udphdr_fr_dlci
|
||||
#define wan_udp_fr_attr wan_udp_hdr.wan_udphdr_fr_attr
|
||||
#define wan_udp_fr_rxlost1 wan_udp_hdr.wan_udphdr_fr_rxlost1
|
||||
#define wan_udp_fr_rxlost2 wan_udp_hdr.wan_udphdr_fr_rxlost2
|
||||
#define wan_udp_x25_pf wan_udp_hdr.wan_udphdr_x25_pf
|
||||
#define wan_udp_x25_lcn wan_udp_hdr.wan_udphdr_x25_lcn
|
||||
#define wan_udp_x25_qdm wan_udp_hdr.wan_udphdr_x25_qdm
|
||||
#define wan_udp_x25_cause wan_udp_hdr.wan_udphdr_x25_cause
|
||||
#define wan_udp_x25_diagn wan_udp_hdr.wan_udphdr_x25_diagn
|
||||
#define wan_udp_x25_pktType wan_udp_hdr.wan_udphdr_x25_pktType
|
||||
#define wan_udp_bscstrm_misc_bits wan_udp_hdr.wan_udphdr_bscstrm_misc_bits
|
||||
#define wan_udp_bscstrm_Rx_err_bits wan_udp_hdr.wan_udphdr_bscstrm_Rx_err_bits
|
||||
#define wan_udp_bscstrm_Rx_time_stam wan_udp_hdr.wan_udphdr_bscstrm_Rx_time_stamp
|
||||
#define wan_udp_bscstrm_port wan_udp_hdr.wan_udphdr_bscstrm_port
|
||||
#define wan_udp_bsc_misc_bits wan_udp_hdr.wan_udphdr_bsc_misc_bits
|
||||
#define wan_udp_bsc_misc_heading_len wan_udp_hdr.wan_udphdr_bsc_misc_heading_len
|
||||
#define wan_udp_bsc_misc_notify wan_udp_hdr.wan_udphdr_bsc_misc_notify
|
||||
#define wan_udp_bsc_misc_station wan_udp_hdr.wan_udphdr_bsc_misc_station
|
||||
#define wan_udp_bsc_misc_poll_add wan_udp_hdr.wan_udphdr_bsc_misc_poll_add
|
||||
#define wan_udp_bsc_misc_select_addr wan_udp_hdr.wan_udphdr_bsc_misc_select_addr
|
||||
#define wan_udp_bsc_misc_device_addr wan_udp_hdr.wan_udphdr_bsc_misc_device_addr
|
||||
#define wan_udp_bsc_misc_notify_ext wan_udp_hdr.wan_udphdr_bsc_misc_notify_ext
|
||||
#define wan_udp_chdlc_num_frames wan_udp_hdr.wan_udphdr_chdlc_num_frames
|
||||
#define wan_udp_chdlc_ismoredata wan_udp_hdr.wan_udphdr_chdlc_ismoredata
|
||||
#define wan_udp_chdlc_data wan_udp_hdr.wan_udphdr_chdlc_data
|
||||
|
||||
#define wan_udp_bitstrm_num_frames wan_udp_hdr.wan_udphdr_bitstrm_num_frames
|
||||
#define wan_udp_bitstrm_ismoredata wan_udp_hdr.wan_udphdr_bitstrm_ismoredata
|
||||
#define wan_udp_bitstrm_data wan_udp_hdr.wan_udphdr_bitstrm_data
|
||||
|
||||
#define wan_udp_adsl_num_frames wan_udp_hdr.wan_udphdr_adsl_num_frames
|
||||
#define wan_udp_adsl_ismoredata wan_udp_hdr.wan_udphdr_adsl_ismoredata
|
||||
#define wan_udp_adsl_data wan_udp_hdr.wan_udphdr_adsl_data
|
||||
#define wan_udp_atm_num_frames wan_udp_hdr.wan_udphdr_atm_num_frames
|
||||
#define wan_udp_atm_ismoredata wan_udp_hdr.wan_udphdr_atm_ismoredata
|
||||
#define wan_udp_atm_data wan_udp_hdr.wan_udphdr_atm_data
|
||||
#define wan_udp_ss7_num_frames wan_udp_hdr.wan_udphdr_ss7_num_frames
|
||||
#define wan_udp_ss7_ismoredata wan_udp_hdr.wan_udphdr_ss7_ismoredata
|
||||
#define wan_udp_ss7_data wan_udp_hdr.wan_udphdr_ss7_data
|
||||
|
||||
#define wan_udp_aft_trace_info wan_udp_hdr.wan_udphdr_aft_trace_info
|
||||
#define wan_udp_aft_num_frames wan_udp_hdr.wan_udphdr_aft_num_frames
|
||||
#define wan_udp_aft_ismoredata wan_udp_hdr.wan_udphdr_aft_ismoredata
|
||||
#define wan_udp_data wan_udp_hdr.wan_udphdr_data
|
||||
} wan_udp_pkt_t;
|
||||
|
||||
#endif
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/*!
|
||||
\enum wanpipe_aft_devel_events
|
||||
\brief Wanpipe Commands associated with WANPIPE_IOCTL_DEVEL Ioctl
|
||||
|
||||
The Devel Commands are used to debug the driver and firmware.
|
||||
Should only be used during debugging.
|
||||
*/
|
||||
enum wanpipe_aft_devel_events {
|
||||
SIOC_WAN_READ_REG = 0x01,
|
||||
SIOC_WAN_WRITE_REG,
|
||||
SIOC_WAN_HWPROBE,
|
||||
SIOC_WAN_ALL_HWPROBE,
|
||||
SIOC_WAN_ALL_READ_REG,
|
||||
SIOC_WAN_ALL_WRITE_REG,
|
||||
SIOC_WAN_ALL_SET_PCI_BIOS,
|
||||
SIOC_WAN_SET_PCI_BIOS,
|
||||
SIOC_WAN_COREREV,
|
||||
SIOC_WAN_GET_CFG,
|
||||
SIOC_WAN_FE_READ_REG,
|
||||
SIOC_WAN_FE_WRITE_REG,
|
||||
SIOC_WAN_EC_REG,
|
||||
SIOC_WAN_READ_PCIBRIDGE_REG,
|
||||
SIOC_WAN_ALL_READ_PCIBRIDGE_REG,
|
||||
SIOC_WAN_WRITE_PCIBRIDGE_REG,
|
||||
SIOC_WAN_ALL_WRITE_PCIBRIDGE_REG,
|
||||
SIOC_WAN_GET_CARD_TYPE,
|
||||
SIOC_WAN_USB_READ_REG,
|
||||
SIOC_WAN_USB_WRITE_REG,
|
||||
SIOC_WAN_USB_CPU_WRITE_REG,
|
||||
SIOC_WAN_USB_CPU_READ_REG,
|
||||
SIOC_WAN_USB_FE_WRITE_REG,
|
||||
SIOC_WAN_USB_FE_READ_REG,
|
||||
SIOC_WAN_USB_FW_DATA_READ,
|
||||
SIOC_WAN_USB_FW_DATA_WRITE,
|
||||
SIOC_WAN_USB_FWUPDATE_ENABLE,
|
||||
};
|
||||
|
||||
#include "wanpipe_api_deprecated.h"
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,430 @@
|
|||
/******************************************************************************//**
|
||||
* \file wanpipe_api_deprecated.h
|
||||
* \brief WANPIPE(tm) Driver API Interface -
|
||||
* \brief Provies IO/Event API Only
|
||||
*
|
||||
* Copyright (c) 2007 - 08, Sangoma Technologies
|
||||
* All rights reserved.
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of the Sangoma Technologies nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Sangoma Technologies ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Sangoma Technologies BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* ===============================================================================
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __WANPIPE_API_DEPRICATED_H_
|
||||
#define __WANPIPE_API_DEPRICATED_H_
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/***************************************************//**
|
||||
DEPRECATED: TX Header Structure
|
||||
Here for backward compile compatilbity
|
||||
*******************************************************/
|
||||
|
||||
/*
|
||||
\struct api_tdm_event_hdr_t
|
||||
\brief Deprecated: Legacy tx tdm api event
|
||||
*/
|
||||
typedef struct {
|
||||
u_int8_t type;
|
||||
u_int8_t mode;
|
||||
u_int8_t tone;
|
||||
u_int16_t channel;
|
||||
u_int16_t polarity;
|
||||
u_int16_t ohttimer;
|
||||
} api_tdm_event_hdr_t;
|
||||
|
||||
/*
|
||||
\struct api_tx_ss7_hdr_t
|
||||
\brief Deprecated: Legacy ss7 hdr structure
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned char type;
|
||||
unsigned char force_tx;
|
||||
unsigned char data[8];
|
||||
} api_tx_ss7_hdr_t;
|
||||
|
||||
/*
|
||||
\struct api_tx_hdlc_rpt_hdr_t
|
||||
\brief Deprecated: Legacy rtp tap hdr structure
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned char repeat;
|
||||
unsigned char len;
|
||||
unsigned char data[8];
|
||||
} api_tx_hdlc_rpt_hdr_t;
|
||||
|
||||
|
||||
/*
|
||||
\struct wan_api_tx_hdr_t
|
||||
\brief Deprecated: Legacy tx hdr structure, there is only one hdr type for tx and rx now.
|
||||
|
||||
This structure is here for backward compatibility
|
||||
|
||||
*/
|
||||
typedef struct {
|
||||
union{
|
||||
struct {
|
||||
unsigned char attr;
|
||||
unsigned char misc_Tx_bits;
|
||||
}chdlc,hdlc,fr;
|
||||
struct {
|
||||
unsigned char _rbs_rx_bits;
|
||||
unsigned int _time_stamp;
|
||||
}wp_tx;
|
||||
struct {
|
||||
unsigned char sio;
|
||||
unsigned short time_stamp;
|
||||
}ss7_legacy;
|
||||
struct {
|
||||
unsigned char pf;
|
||||
}lapb;
|
||||
struct {
|
||||
unsigned char pf;
|
||||
}xdlc;
|
||||
struct {
|
||||
unsigned char station;
|
||||
unsigned char misc_tx_rx_bits;
|
||||
};
|
||||
struct {
|
||||
union {
|
||||
api_tx_ss7_hdr_t ss7;
|
||||
api_tx_hdlc_rpt_hdr_t hdlc_rpt;
|
||||
api_tdm_event_hdr_t event;
|
||||
}hdr_u;
|
||||
}aft;
|
||||
struct {
|
||||
u_int8_t max_tx_queue_length; /* set on return from IoctlWriteCommand */
|
||||
u_int8_t current_number_of_frames_in_tx_queue; /* set on return from IoctlWriteCommand */
|
||||
}tx_h;
|
||||
unsigned char reserved[WAN_MAX_HDR_SZ];
|
||||
};
|
||||
|
||||
#define wp_api_tx_hdr_event_type aft.hdr_u.event.type
|
||||
#define wp_api_tx_hdr_event_mode aft.hdr_u.event.mode
|
||||
#define wp_api_tx_hdr_event_tone aft.hdr_u.event.tone
|
||||
#define wp_api_tx_hdr_event_channel aft.hdr_u.event.channel
|
||||
#define wp_api_tx_hdr_event_ohttimer aft.hdr_u.event.ohttimer
|
||||
#define wp_api_tx_hdr_event_polarity aft.hdr_u.event.polarity
|
||||
|
||||
|
||||
|
||||
/* FR Old backdward comptabile */
|
||||
#define wp_api_tx_hdr_fr_attr fr.attr
|
||||
#define wp_api_tx_hdr_fr_misc_tx_bits fr.misc_Tx_bits
|
||||
|
||||
/* CHDLC Old backdward comptabile */
|
||||
#define wp_api_tx_hdr_chdlc_attr chdlc.attr
|
||||
#define wp_api_tx_hdr_chdlc_misc_tx_bits chdlc.misc_Tx_bits
|
||||
|
||||
/* SS7 Legacy Old backdward comptabile */
|
||||
#define wp_api_tx_hdr_ss7_legacy_sio ss7_legacy.sio
|
||||
#define wp_api_tx_hdr_ss7_legacy_time_stamp ss7_legacy.time_stamp
|
||||
|
||||
#define wp_api_tx_hdr_event_serial_status aft.hdr_u.event.tone
|
||||
|
||||
} wan_api_tx_hdr_t;
|
||||
|
||||
/* Backward compatible */
|
||||
#define api_tx_hdr_t wan_api_tx_hdr_t
|
||||
|
||||
|
||||
|
||||
typedef struct {
|
||||
wan_api_tx_hdr_t wan_api_tx_hdr;
|
||||
#if defined(__WINDOWS__)
|
||||
/* zero-sized array does not comply to ANSI 'C' standard! */
|
||||
unsigned char data[1];
|
||||
#else
|
||||
unsigned char data[0];
|
||||
#endif
|
||||
}wan_api_tx_element_t;
|
||||
|
||||
/* Backward compatible */
|
||||
# define api_tx_element_t wan_api_tx_element_t
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
/***************************************************//**
|
||||
DEPRECATED: Backward compatible API Commands
|
||||
*******************************************************/
|
||||
|
||||
#define wp_tdm_api_rx_hdr_t wp_api_hdr_t
|
||||
#define wp_tdm_api_rx_element_t wp_api_element_t
|
||||
#define wp_tdm_api_tx_hdr_t wp_api_hdr_t
|
||||
#define wp_tdm_api_tx_element_t wp_api_element_t
|
||||
|
||||
/* Backward compatible IOCTLS */
|
||||
#if defined (__WINDOWS__)
|
||||
#define _IOCTL_CODE WANPIPE_IOCTL_CODE
|
||||
#define IOCTL_WRITE WANPIPE_IOCTL_WRITE
|
||||
#define IOCTL_READ WANPIPE_IOCTL_READ
|
||||
#define IOCTL_MGMT WANPIPE_IOCTL_MGMT
|
||||
#define IOCTL_SET_IDLE_TX_BUFFER WANPIPE_IOCTL_SET_IDLE_TX_BUFFER
|
||||
#define IOCTL_API_POLL WANPIPE_IOCTL_API_POLL
|
||||
#define IOCTL_SET_SHARED_EVENT WANPIPE_IOCTL_SET_SHARED_EVENT
|
||||
#define IOCTL_PORT_MGMT WANPIPE_IOCTL_PORT_MGMT
|
||||
#define IOCTL_PORT_CONFIG WANPIPE_IOCTL_PORT_CONFIG
|
||||
#define SIOC_WAN_TDMV_API_IOCTL WANPIPE_IOCTL_TDM_API
|
||||
#define SIOC_WANPIPE_PIPEMON WANPIPE_IOCTL_PIPEMON
|
||||
#define SIOC_WANPIPE_SNMP_IFSPEED WANPIPE_IOCTL_SNMP_IFSPEED
|
||||
#define SIOC_WANPIPE_SNMP WANPIPE_IOCTL_SNMP
|
||||
#define SIOC_WAN_DEVEL_IOCTL WANPIPE_IOCTL_DEVEL
|
||||
#endif
|
||||
|
||||
#define WP_TDMAPI_EVENT_FE_ALARM WP_TDMAPI_EVENT_ALARM
|
||||
#define SIOC_WP_TDM_GET_LINK_STATUS SIOC_WP_TDM_GET_FE_STATUS
|
||||
|
||||
#define ROUTER_UP_TIME WANPIPEMON_ROUTER_UP_TIME
|
||||
#define ENABLE_TRACING WANPIPEMON_ENABLE_TRACING
|
||||
#define DISABLE_TRACING WANPIPEMON_DISABLE_TRACING
|
||||
#define GET_TRACE_INFO WANPIPEMON_GET_TRACE_INFO
|
||||
#define READ_CODE_VERSION WANPIPEMON_READ_CODE_VERSION
|
||||
#define FLUSH_OPERATIONAL_STATS WANPIPEMON_FLUSH_OPERATIONAL_STATS
|
||||
#define OPERATIONAL_STATS WANPIPEMON_OPERATIONAL_STATS
|
||||
#define READ_OPERATIONAL_STATS WANPIPEMON_READ_OPERATIONAL_STATS
|
||||
#define READ_CONFIGURATION WANPIPEMON_READ_CONFIGURATION
|
||||
#define READ_COMMS_ERROR_STATS WANPIPEMON_READ_COMMS_ERROR_STATS
|
||||
#define FLUSH_COMMS_ERROR_STATS WANPIPEMON_FLUSH_COMMS_ERROR_STATS
|
||||
#define AFT_LINK_STATUS WANPIPEMON_AFT_LINK_STATUS
|
||||
#define AFT_MODEM_STATUS WANPIPEMON_AFT_MODEM_STATUS
|
||||
#define AFT_HWEC_STATUS WANPIPEMON_AFT_HWEC_STATUS
|
||||
#define DIGITAL_LOOPTEST WANPIPEMON_DIGITAL_LOOPTEST
|
||||
#define SET_FT1_MODE WANPIPEMON_SET_FT1_MODE
|
||||
#define WAN_EC_IOCTL WANPIPEMON_EC_IOCTL
|
||||
#define WAN_SET_RBS_BITS WANPIPEMON_SET_RBS_BITS
|
||||
#define WAN_GET_RBS_BITS WANPIPEMON_GET_RBS_BITS
|
||||
#define GET_OPEN_HANDLES_COUNTER WANPIPEMON_GET_OPEN_HANDLES_COUNTER
|
||||
#define WAN_GET_HW_MAC_ADDR WANPIPEMON_GET_HW_MAC_ADDR
|
||||
#define FLUSH_TX_BUFFERS WANPIPEMON_FLUSH_TX_BUFFERS
|
||||
#define WAN_TDMV_API_IOCTL WANPIPEMON_TDM_API
|
||||
|
||||
|
||||
#define WANPIPE_PROTOCOL_PRIVATE WANPIPEMON_DRIVER_PRIVATE
|
||||
|
||||
#if defined (__WINDOWS__)
|
||||
/* definitions for compile-compatibility with older source code */
|
||||
#define SIOC_AFT_CUSTOMER_ID WANPIPEMON_AFT_CUSTOMER_ID
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/***************************************************//**
|
||||
Backward Compatible Defines for wp_api_event_t structre
|
||||
*******************************************************/
|
||||
|
||||
#define wp_tdm_api_event_type wp_api_event_type
|
||||
#define wp_tdm_api_event_mode wp_api_event_mode
|
||||
#define wp_tdm_api_event_channel wp_api_event_channel
|
||||
#define wp_tdm_api_event_span wp_api_event_span
|
||||
#define wp_tdm_api_event_alarm wp_api_event_alarm
|
||||
#define wp_tdm_api_event_rbs_bits wp_api_event_rbs_bits
|
||||
#define wp_tdm_api_event_hook_state wp_api_event_hook_state
|
||||
#define wp_tdm_api_event_hook_sig wp_api_event_hook_sig
|
||||
#define wp_tdm_api_event_ring_state wp_api_event_ring_state
|
||||
#define wp_tdm_api_event_tone_type wp_api_event_tone_type
|
||||
#define wp_tdm_api_event_dtmf_digit wp_api_event_dtmf_digit
|
||||
#define wp_tdm_api_event_dtmf_type wp_api_event_dtmf_type
|
||||
#define wp_tdm_api_event_dtmf_port wp_api_event_dtmf_port
|
||||
#define wp_tdm_api_event_ohttimer wp_api_event_ohttimer
|
||||
#define wp_tdm_api_event_polarity wp_api_event_polarity
|
||||
#define wp_tdm_api_event_link_status wp_api_event_link_status
|
||||
#define wp_serial_event_status wp_api_event_serial_status
|
||||
#define wp_tdm_api_event_time_stamp_sec wp_api_event_time_stamp_sec
|
||||
#define wp_tdm_api_event_time_stamp_usec wp_api_event_time_stamp_usec
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/***************************************************//**
|
||||
Backward Compatible Defines
|
||||
*******************************************************/
|
||||
|
||||
/* Backward compatible define to wp_api_event_t */
|
||||
#define wp_tdm_api_event_t wp_api_event_t
|
||||
|
||||
|
||||
#if defined (__WINDOWS__)
|
||||
#define net_device_stats wanpipe_chan_stats
|
||||
#define net_device_stats_t wanpipe_chan_stats_t
|
||||
#define OID_WANPIPEMON_IOCTL 19720123 /* used by wanpipe.sys (Sangoma NDIS) driver */
|
||||
#endif
|
||||
|
||||
|
||||
#define wan_api_rx_hdr_t wp_api_hdr_t
|
||||
#define api_rx_hdr_t wp_api_hdr_t
|
||||
#define api_header_t wp_api_hdr_t
|
||||
#define wp_tdm_api_rx_hdr_t wp_api_hdr_t
|
||||
|
||||
#define TX_HDR_STRUCT wp_api_hdr_t
|
||||
#define RX_HDR_STRUCT wan_api_rx_hdr_t
|
||||
|
||||
#define wan_rxapi_xdlc_state hdr.wan_hdr_xdlc_state
|
||||
#define wan_rxapi_xdlc_address hdr.wan_hdr_xdlc_address
|
||||
#define wan_rxapi_xdlc_exception hdr.wan_hdr_xdlc_exception
|
||||
|
||||
#define api_header hdr
|
||||
#define api_rx_hdr hdr
|
||||
|
||||
|
||||
#define api_rx_element_t wp_api_element_t
|
||||
#define wan_api_rx_element_t wp_api_element_t
|
||||
|
||||
#define TX_RX_DATA_STRUCT wp_api_element_t
|
||||
#define TX_DATA_STRUCT TX_RX_DATA_STRUCT
|
||||
#define RX_DATA_STRUCT TX_RX_DATA_STRUCT
|
||||
|
||||
|
||||
|
||||
|
||||
/***************************************************//**
|
||||
DEPRECATED: Backward compatible API Commands
|
||||
Deprecated by:
|
||||
*******************************************************/
|
||||
|
||||
|
||||
/*
|
||||
\enum wanpipe_tdm_api_events
|
||||
\brief DEPRECATED: Wanpipe Commands associated with WANPIPE_IOCTL_TDM_API Ioctl
|
||||
|
||||
Deprecated by enum wanpipe_tdm_api_events.
|
||||
|
||||
The TDM API commands are used to enable/disable tdm functions
|
||||
on a TDM API device. These commands are deprecated and the
|
||||
enum wanpipe_tdm_api_events commands defined in wanpipe_api_iface.h.
|
||||
*/
|
||||
enum wanpipe_tdm_api_events {
|
||||
WP_TDMAPI_EVENT_NONE = WP_API_EVENT_NONE,
|
||||
WP_TDMAPI_EVENT_DTMF = WP_API_EVENT_DTMF,
|
||||
WP_TDMAPI_EVENT_RM_DTMF = WP_API_EVENT_RM_DTMF,
|
||||
WP_TDMAPI_EVENT_RXHOOK = WP_API_EVENT_RXHOOK,
|
||||
WP_TDMAPI_EVENT_RING = WP_API_EVENT_RING,
|
||||
WP_TDMAPI_EVENT_TONE = WP_API_EVENT_TONE,
|
||||
WP_TDMAPI_EVENT_RING_DETECT = WP_API_EVENT_RING_DETECT,
|
||||
WP_TDMAPI_EVENT_TXSIG_KEWL = WP_API_EVENT_TXSIG_KEWL,
|
||||
WP_TDMAPI_EVENT_TXSIG_START = WP_API_EVENT_TXSIG_START,
|
||||
WP_TDMAPI_EVENT_TXSIG_OFFHOOK = WP_API_EVENT_TXSIG_OFFHOOK,
|
||||
WP_TDMAPI_EVENT_TXSIG_ONHOOK = WP_API_EVENT_TXSIG_ONHOOK,
|
||||
WP_TDMAPI_EVENT_ONHOOKTRANSFER = WP_API_EVENT_ONHOOKTRANSFER,
|
||||
WP_TDMAPI_EVENT_SETPOLARITY = WP_API_EVENT_SETPOLARITY,
|
||||
WP_TDMAPI_EVENT_BRI_CHAN_LOOPBACK = WP_API_EVENT_BRI_CHAN_LOOPBACK,
|
||||
WP_TDMAPI_EVENT_RING_TRIP_DETECT = WP_API_EVENT_RING_TRIP_DETECT,
|
||||
WP_TDMAPI_EVENT_RBS = WP_API_EVENT_RBS,
|
||||
WP_TDMAPI_EVENT_ALARM = WP_API_EVENT_ALARM,
|
||||
WP_TDMAPI_EVENT_LINK_STATUS = WP_API_EVENT_LINK_STATUS,
|
||||
WP_TDMAPI_EVENT_MODEM_STATUS = WP_API_EVENT_MODEM_STATUS
|
||||
};
|
||||
|
||||
|
||||
enum wanpipe_tdm_api_cmds {
|
||||
|
||||
SIOC_WP_TDM_GET_USR_MTU_MRU = WP_API_CMD_GET_USR_MTU_MRU, /*!< Get Device tx/rx (CHUNK) in bytes, multiple of 8 */
|
||||
SIOC_WP_TDM_SET_USR_PERIOD = WP_API_CMD_SET_USR_PERIOD, /*!< Set chunk period in miliseconds eg: 1ms = 8bytes */
|
||||
SIOC_WP_TDM_GET_USR_PERIOD = WP_API_CMD_GET_USR_PERIOD, /*!< Get configured chunk period in miliseconds eg: 1ms = 8bytes */
|
||||
SIOC_WP_TDM_SET_HW_MTU_MRU = WP_API_CMD_SET_HW_MTU_MRU, /*!< Set hw tx/rx chunk in bytes eg: 1ms = 8bytes */
|
||||
SIOC_WP_TDM_GET_HW_MTU_MRU = WP_API_CMD_GET_HW_MTU_MRU, /*!< Get hw tx/rx chunk in bytes eg: 1ms = 8bytes */
|
||||
SIOC_WP_TDM_SET_CODEC = WP_API_CMD_SET_CODEC, /*!< Set device codec (ulaw/alaw/slinear) */
|
||||
SIOC_WP_TDM_GET_CODEC = WP_API_CMD_GET_CODEC, /*!< Get configured device codec (ulaw/alaw/slinear) */
|
||||
SIOC_WP_TDM_SET_POWER_LEVEL = WP_API_CMD_SET_POWER_LEVEL, /*!< Not implemented */
|
||||
SIOC_WP_TDM_GET_POWER_LEVEL = WP_API_CMD_GET_POWER_LEVEL, /*!< Not implemented */
|
||||
SIOC_WP_TDM_TOGGLE_RX = WP_API_CMD_TOGGLE_RX, /*!< Disable/Enable RX on this device */
|
||||
SIOC_WP_TDM_TOGGLE_TX = WP_API_CMD_TOGGLE_TX, /*!< Disable/Enable TX on this device */
|
||||
SIOC_WP_TDM_GET_HW_CODING = WP_API_CMD_GET_HW_CODING, /*!< Get HW coding configuration (ulaw or alaw) */
|
||||
SIOC_WP_TDM_SET_HW_CODING = WP_API_CMD_SET_HW_CODING, /*!< Set HW coding (ulaw or alaw) */
|
||||
SIOC_WP_TDM_GET_FULL_CFG = WP_API_CMD_GET_FULL_CFG, /*!< Get full device configuration */
|
||||
SIOC_WP_TDM_SET_EC_TAP = WP_API_CMD_SET_EC_TAP, /*!< Not implemented */
|
||||
SIOC_WP_TDM_GET_EC_TAP = WP_API_CMD_GET_EC_TAP, /*!< Not implemented */
|
||||
SIOC_WP_TDM_ENABLE_RBS_EVENTS = WP_API_CMD_ENABLE_RBS_EVENTS, /*!< Enable RBS Event monitoring */
|
||||
SIOC_WP_TDM_DISABLE_RBS_EVENTS = WP_API_CMD_DISABLE_RBS_EVENTS, /*!< Disable RBS Event monitoring */
|
||||
SIOC_WP_TDM_WRITE_RBS_BITS = WP_API_CMD_WRITE_RBS_BITS, /*!< Write RBS bits (ABCD) */
|
||||
SIOC_WP_TDM_GET_STATS = WP_API_CMD_GET_STATS, /*!< Get device statistics */
|
||||
SIOC_WP_TDM_FLUSH_BUFFERS = WP_API_CMD_FLUSH_BUFFERS, /*!< Flush Buffers */
|
||||
SIOC_WP_TDM_READ_EVENT = WP_API_CMD_READ_EVENT, /*!< */
|
||||
SIOC_WP_TDM_SET_EVENT = WP_API_CMD_SET_EVENT, /*!< */
|
||||
SIOC_WP_TDM_SET_RX_GAINS = WP_API_CMD_SET_RX_GAINS, /*!< */
|
||||
SIOC_WP_TDM_SET_TX_GAINS = WP_API_CMD_SET_TX_GAINS, /*!< */
|
||||
SIOC_WP_TDM_CLEAR_RX_GAINS = WP_API_CMD_CLEAR_RX_GAINS, /*!< */
|
||||
SIOC_WP_TDM_CLEAR_TX_GAINS = WP_API_CMD_CLEAR_TX_GAINS, /*!< */
|
||||
SIOC_WP_TDM_GET_FE_ALARMS = WP_API_CMD_GET_FE_ALARMS, /*!< */
|
||||
SIOC_WP_TDM_ENABLE_HWEC = WP_API_CMD_ENABLE_HWEC, /*!< */
|
||||
SIOC_WP_TDM_DISABLE_HWEC = WP_API_CMD_DISABLE_HWEC, /*!< */
|
||||
SIOC_WP_TDM_SET_FE_STATUS = WP_API_CMD_SET_FE_STATUS, /*!< */
|
||||
SIOC_WP_TDM_GET_FE_STATUS = WP_API_CMD_GET_FE_STATUS, /*!< */
|
||||
SIOC_WP_TDM_GET_HW_DTMF = WP_API_CMD_GET_HW_DTMF, /*!< */
|
||||
SIOC_WP_TDM_DRV_MGMNT = WP_API_CMD_DRV_MGMNT, /*!< */
|
||||
|
||||
SIOC_WP_TDM_RESET_STATS = WP_API_CMD_RESET_STATS, /*!< Reset device statistics */
|
||||
|
||||
SIOC_WP_TDM_NOTSUPP = WP_API_CMD_NOTSUPP, /*!< */
|
||||
|
||||
};
|
||||
|
||||
#define WANPIPE_IOCTL_TDM_API WANPIPE_IOCTL_API_CMD
|
||||
|
||||
#define WP_TDMAPI_EVENT_ENABLE WP_API_EVENT_ENABLE
|
||||
#define WP_TDMAPI_EVENT_DISABLE WP_API_EVENT_DISABLE
|
||||
#define WP_TDMAPI_EVENT_MODE_DECODE WP_API_EVENT_MODE_DECODE
|
||||
|
||||
#define WP_TDMAPI_EVENT_RXHOOK_OFF WP_API_EVENT_RXHOOK_OFF
|
||||
#define WP_TDMAPI_EVENT_RXHOOK_ON WP_API_EVENT_RXHOOK_ON
|
||||
#define WP_TDMAPI_EVENT_RXHOOK_DECODE WP_API_EVENT_RXHOOK_DECODE
|
||||
|
||||
#define WP_TDMAPI_EVENT_RING_PRESENT WP_API_EVENT_RING_PRESENT
|
||||
#define WP_TDMAPI_EVENT_RING_STOP WP_API_EVENT_RING_STOP
|
||||
#define WP_TDMAPI_EVENT_RING_DECODE WP_API_EVENT_RING_DECODE
|
||||
|
||||
#define WP_TDMAPI_EVENT_RING_TRIP_PRESENT WP_API_EVENT_RING_TRIP_PRESENT
|
||||
#define WP_TDMAPI_EVENT_RING_TRIP_STOP WP_API_EVENT_RING_TRIP_STOP
|
||||
#define WP_TDMAPI_EVENT_RING_TRIP_DECODE WP_API_EVENT_RING_TRIP_DECODE
|
||||
|
||||
/*Link Status */
|
||||
#define WP_TDMAPI_EVENT_LINK_STATUS_CONNECTED WP_API_EVENT_LINK_STATUS_CONNECTED
|
||||
#define WP_TDMAPI_EVENT_LINK_STATUS_DISCONNECTED WP_API_EVENT_LINK_STATUS_DISCONNECTED
|
||||
#define WP_TDMAPI_EVENT_LINK_STATUS_DECODE WP_API_EVENT_LINK_STATUS_DECODE
|
||||
|
||||
#define WP_TDMAPI_EVENT_TONE_DIAL WP_API_EVENT_TONE_DIAL
|
||||
#define WP_TDMAPI_EVENT_TONE_BUSY WP_API_EVENT_TONE_BUSY
|
||||
#define WP_TDMAPI_EVENT_TONE_RING WP_API_EVENT_TONE_RING
|
||||
#define WP_TDMAPI_EVENT_TONE_CONGESTION WP_API_EVENT_TONE_CONGESTION
|
||||
|
||||
#define wp_tdm_chan_stats_t wanpipe_chan_stats_t
|
||||
#define wanpipe_tdm_cfg_t wanpipe_api_cfg_t
|
||||
#define wanpipe_tdm_api_cmd_t wanpipe_api_cmd_t
|
||||
#define wanpipe_tdm_api_event_t wanpipe_api_callbacks_t
|
||||
#define wanpipe_tdm_api_t wanpipe_api_t
|
||||
#define wanpipe_api_cfg_t wanpipe_api_dev_cfg_t
|
||||
#define wp_tdm_cmd wp_cmd
|
||||
#define wp_tdm_event wp_callback
|
||||
|
||||
#define WP_TDM_FEATURE_DTMF_EVENTS WP_API_FEATURE_DTMF_EVENTS
|
||||
#define WP_TDM_FEATURE_FE_ALARM WP_API_FEATURE_FE_ALARM
|
||||
#define WP_TDM_FEATURE_EVENTS WP_API_FEATURE_EVENTS
|
||||
#define WP_TDM_FEATURE_LINK_STATUS WP_API_FEATURE_LINK_STATUS
|
||||
|
||||
#define SANG_STATUS_TDM_EVENT_AVAILABLE SANG_STATUS_API_EVENT_AVAILABLE
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,660 @@
|
|||
/******************************************************************************//**
|
||||
* \file wanpipe_api_hdr.h
|
||||
* \brief WANPIPE(tm) Driver API Headers and Defines
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
* David Rokhvarg <davidr@sangoma.com>
|
||||
* Alex Fledman <alex@sangoma.com>
|
||||
*
|
||||
* Copyright (c) 2007 - 08, Sangoma Technologies
|
||||
* All rights reserved.
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of the Sangoma Technologies nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Sangoma Technologies ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Sangoma Technologies BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* ===============================================================================
|
||||
*/
|
||||
|
||||
#ifndef __WANPIPE_API_HDR__
|
||||
#define __WANPIPE_API_HDR__
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/*!
|
||||
\def WAN_MAX_EVENT_SZ
|
||||
\brief Size of wanpipe api header used in tx/rx
|
||||
|
||||
The WAN_MAX_HDR_SZ is the size of wp_api_event_t structure
|
||||
It can be used to confirm compilation problems.
|
||||
if (sizeof(wp_api_event_t) != WAN_MAX_HDR_SZ) ...
|
||||
*/
|
||||
#define WAN_MAX_EVENT_SZ 64
|
||||
#define WAN_MAX_EVENT_SZ_UNION WAN_MAX_EVENT_SZ-(sizeof(u_int8_t)*4)-(sizeof(u_int32_t)*2)
|
||||
/*!
|
||||
\struct wp_api_event
|
||||
\brief Wanpipe API Event Structure
|
||||
|
||||
\typedef wp_api_event_t
|
||||
\brief Wanpipe API Event Structure
|
||||
\typedef wp_tdm_api_event_t
|
||||
\brief Wanpipe API Event Structure
|
||||
*/
|
||||
typedef struct wp_api_event
|
||||
{
|
||||
u_int8_t event_type; /*!< Event Type defined in enum wanpipe_tdm_api_events */
|
||||
u_int8_t mode; /*!< Mode (Enable/Disable), WP_TDMAPI_EVENT_DISABLE, WP_TDMAPI_EVENT_ENABLE */
|
||||
u_int8_t channel; /*!< TDM channel num, integer from 1 to 32 */
|
||||
u_int8_t span; /*!< TDM span num, integer from 1 to 255 */
|
||||
u_int32_t time_stamp_sec; /*!< timestamp in sec */
|
||||
u_int32_t time_stamp_usec; /*!< timestamp in microseconds */
|
||||
union {
|
||||
struct {
|
||||
u_int32_t alarm; /*!< contains bit map of T1/E1 alarms */
|
||||
} te1_alarm;
|
||||
struct {
|
||||
u_int8_t rbs_bits; /*!< contains bit map of T1/E1 rbs bits */
|
||||
} te1_rbs;
|
||||
struct {
|
||||
u_int8_t state; /*!< contains rx hook state: WP_TDMAPI_EVENT_RXHOOK_OFF, WP_TDMAPI_EVENT_RXHOOK_ON */
|
||||
u_int8_t sig; /*!< */
|
||||
} rm_hook;
|
||||
struct {
|
||||
u_int8_t state; /*!< Ring state, WP_TDMAPI_EVENT_RING_PRESENT, WP_TDMAPI_EVENT_RING_STOP */
|
||||
} rm_ring;
|
||||
struct {
|
||||
u_int16_t type; /*!< Ring tone type, enum WP_TDMAPI_EVENT_TONE_xxx */
|
||||
} rm_tone;
|
||||
struct {
|
||||
u_int8_t digit; /*!< DTMF: digit */
|
||||
u_int8_t port; /*!< DTMF: SOUT/ROUT */
|
||||
u_int8_t type; /*!< DTMF: PRESET/STOP */
|
||||
} dtmf;
|
||||
struct {
|
||||
u_int16_t polarity; /*!< */
|
||||
u_int16_t ohttimer; /*!< */
|
||||
u_int16_t polarity_reverse; /*!< */
|
||||
} rm_common;
|
||||
struct {
|
||||
int32_t gain;
|
||||
}rm_gain;
|
||||
struct{
|
||||
u_int16_t status; /*!< Link Status (connected/disconnnected) */
|
||||
} linkstatus;
|
||||
struct {
|
||||
u_int32_t status; /*!< Serial Modem Status: DCD/CTS */
|
||||
} serial;
|
||||
unsigned char reserved[WAN_MAX_EVENT_SZ_UNION]; /*!< Padding up to WAN_MAX_EVENT_SZ */
|
||||
};
|
||||
|
||||
/***************************************************//**
|
||||
These defines MUST be used to access wp_api_event_t
|
||||
structure. The wp_api_event_t should not be accessed
|
||||
directly, in order to keep backward compile compatibility.
|
||||
*******************************************************/
|
||||
#define wp_api_event_type event_type
|
||||
#define wp_api_event_mode mode
|
||||
#define wp_api_event_channel channel
|
||||
#define wp_api_event_span span
|
||||
#define wp_api_event_alarm te1_alarm.alarm
|
||||
#define wp_api_event_rbs_bits te1_rbs.rbs_bits
|
||||
#define wp_api_event_hook_state rm_hook.state
|
||||
#define wp_api_event_hook_sig rm_hook.sig
|
||||
#define wp_api_event_ring_state rm_ring.state
|
||||
#define wp_api_event_tone_type rm_tone.type
|
||||
#define wp_api_event_dtmf_digit dtmf.digit
|
||||
#define wp_api_event_dtmf_type dtmf.type
|
||||
#define wp_api_event_dtmf_port dtmf.port
|
||||
#define wp_api_event_ohttimer rm_common.ohttimer
|
||||
#define wp_api_event_polarity rm_common.polarity
|
||||
#define wp_api_event_polarity_reverse rm_common.polarity_reverse
|
||||
#define wp_api_event_link_status linkstatus.status
|
||||
#define wp_api_event_serial_status serial.status
|
||||
#define wp_api_event_time_stamp_sec time_stamp_sec
|
||||
#define wp_api_event_time_stamp_usec time_stamp_usec
|
||||
#define wp_api_event_gain_value rm_gain.gain
|
||||
} wp_api_event_t;
|
||||
|
||||
|
||||
/***************************************************//**
|
||||
* Wanpipe Rx/Tx API Header Structure
|
||||
*
|
||||
* This is a UNIFIED common API Header structure for all protocols
|
||||
* and all APIs.
|
||||
*
|
||||
* data_length
|
||||
* Windows uses this varialbe for data length,
|
||||
* Linux legacy uses this variable as time_stamp
|
||||
*******************************************************/
|
||||
|
||||
/*!
|
||||
\def WAN_MAX_HDR_SZ
|
||||
\brief Size of wanpipe api header used in tx/rx
|
||||
|
||||
The WAN_MAX_HDR_SZ is the size of wp_api_event_t structure
|
||||
It can be used to confirm compilation problems.
|
||||
if (sizeof(wp_api_event_t) != WAN_MAX_HDR_SZ) ...
|
||||
*/
|
||||
#define WAN_MAX_HDR_SZ 64
|
||||
#define WAN_MAX_HDR_SZ_UNION WAN_MAX_HDR_SZ-sizeof(u_int8_t)-sizeof(u_int16_t)-(sizeof(u_int32_t)*2)
|
||||
|
||||
/*!
|
||||
\struct wp_api_hdr
|
||||
\brief Wanpipe API Header Structure
|
||||
|
||||
\typedef wp_api_hdr_t
|
||||
\brief Wanpipe API Header Structure
|
||||
*/
|
||||
typedef struct wp_api_hdr
|
||||
{
|
||||
u_int8_t operation_status; /*!< Status defined in enum SANG_STATUS_T */
|
||||
u_int16_t data_length; /*!< Length of tx/rx data packet */
|
||||
u_int32_t time_stamp_sec; /*!< timestamp in seconds */
|
||||
u_int32_t time_stamp_usec; /*!< timestamp in miliseconds */
|
||||
|
||||
union {
|
||||
/***********************************************//**
|
||||
The rx_h and tx_h are to be used with all AFT Hardware
|
||||
****************************************************/
|
||||
struct {
|
||||
u_int16_t crc; /*!< bit map of possible errors: CRC/ABORT/FRAME/DMA */
|
||||
u_int8_t max_rx_queue_length; /*!< max data queue configured */
|
||||
u_int8_t current_number_of_frames_in_rx_queue; /*!< current buffers in device rx queue */
|
||||
u_int32_t errors; /*!< number of rx errors since driver start */
|
||||
}rx_h;
|
||||
|
||||
struct {
|
||||
u_int8_t max_tx_queue_length; /*!< max data queue configured */
|
||||
u_int8_t current_number_of_frames_in_tx_queue; /*!< current buffers in device tx queue */
|
||||
u_int32_t tx_idle_packets; /*!< number of tx idle packes transmitted */
|
||||
u_int32_t errors; /*!< number of tx errors since driver start */
|
||||
}tx_h;
|
||||
|
||||
/***********************************************//**
|
||||
Defines below are Deprecated and are for
|
||||
backward compability
|
||||
****************************************************/
|
||||
struct {
|
||||
u_int8_t status;
|
||||
}serial;
|
||||
struct {
|
||||
u_int8_t exception;
|
||||
u_int8_t pf;
|
||||
}lapb;
|
||||
struct {
|
||||
u_int8_t state;
|
||||
u_int8_t address;
|
||||
u_int16_t exception;
|
||||
}xdlc;
|
||||
struct {
|
||||
u_int8_t channel;
|
||||
u_int8_t direction;
|
||||
}bitstrm;
|
||||
struct {
|
||||
u_int8_t channel;
|
||||
u_int8_t status;
|
||||
}aft_legacy_rbs;
|
||||
struct {
|
||||
u_int8_t repeat;
|
||||
u_int8_t len;
|
||||
u_int8_t data[8];
|
||||
}rpt;
|
||||
struct {
|
||||
u_int8_t type;
|
||||
u_int8_t force_tx;
|
||||
u_int8_t data[8];
|
||||
}ss7_hw;
|
||||
u_int8_t reserved[WAN_MAX_HDR_SZ_UNION];
|
||||
};
|
||||
|
||||
|
||||
/***************************************************//**
|
||||
These defines MUST be used to access wp_api_hdr_t
|
||||
structure. The wp_api_hdr_t should not be accessed
|
||||
directly, in order to keep backward compile compatibility.
|
||||
*******************************************************/
|
||||
|
||||
#define wp_api_hdr_operation_status operation_status
|
||||
#define wp_api_hdr_data_length data_length
|
||||
#define wp_api_hdr_time_stamp_sec time_stamp_sec
|
||||
#define wp_api_hdr_time_stamp_use time_stamp_usec
|
||||
|
||||
#define wp_api_legacy_rbs_channel aft_legacy_rbs.channel
|
||||
#define wp_api_legacy_rbs_status aft_legacy_rbs.status
|
||||
|
||||
#define wp_api_rx_hdr_crc rx_h.crc
|
||||
#define wp_api_rx_hdr_error_map rx_h.crc
|
||||
#define wp_api_rx_hdr_max_queue_length rx_h.max_rx_queue_length
|
||||
#define wp_api_rx_hdr_number_of_frames_in_queue rx_h.current_number_of_frames_in_rx_queue
|
||||
#define wp_api_rx_hdr_time_stamp_sec time_stamp_sec
|
||||
#define wp_api_rx_hdr_time_stamp_use time_stamp_usec
|
||||
#define wp_api_rx_hdr_errors rx_h.errors
|
||||
|
||||
#define wp_api_tx_hdr_max_queue_length tx_h.max_tx_queue_length
|
||||
#define wp_api_tx_hdr_number_of_frames_in_queue tx_h.current_number_of_frames_in_tx_queue
|
||||
#define wp_api_tx_hdr_tx_idle_packets tx_h.tx_idle_packets
|
||||
#define wp_api_tx_hdr_time_stamp_sec time_stamp_sec
|
||||
#define wp_api_tx_hdr_time_stamp_use time_stamp_usec
|
||||
#define wp_api_tx_hdr_errors tx_h.errors
|
||||
|
||||
/***********************************************//**
|
||||
Defines below are Deprecated and are for
|
||||
backward compability
|
||||
****************************************************/
|
||||
|
||||
#if !defined(__WINDOWS__)
|
||||
#define wp_api_rx_hdr_error_flag operation_status
|
||||
#define wp_api_rx_hdr_station operation_status
|
||||
#define wp_api_rx_hdr_time_stamp data_length
|
||||
#endif
|
||||
|
||||
#define wp_api_tx_hdr_hdlc_rpt_len rpt.len
|
||||
#define wp_api_tx_hdr_hdlc_rpt_data rpt.data
|
||||
#define wp_api_tx_hdr_hdlc_rpt_repeat rpt.repeat
|
||||
|
||||
#define wp_api_tx_hdr_aft_ss7_type ss7_hw.type
|
||||
#define wp_api_tx_hdr_aft_ss7_force_tx ss7_hw.force_tx
|
||||
#define wp_api_tx_hdr_aft_ss7_data ss7_hw.data
|
||||
|
||||
/* XDLC Old backdward comptabile */
|
||||
#define wp_api_rx_hdr_xdlc_state xdlc.state
|
||||
#define wp_api_rx_hdr_xdlc_address xdlc.address
|
||||
#define wp_api_rx_hdr_xdlc_exception xdlc.exception
|
||||
|
||||
#define wan_hdr_xdlc_state xdlc.state
|
||||
#define wan_hdr_xdlc_address xdlc.address
|
||||
#define wan_hdr_xdlc_exception xdlc.exception
|
||||
|
||||
/* CHDLC Old backdward comptabile */
|
||||
#define wp_api_rx_hdr_chdlc_error_flag wp_api_rx_hdr_error_flag
|
||||
#define wp_api_rx_hdr_chdlc_time_stamp wp_api_rx_hdr_time_stamp
|
||||
#define wp_api_rx_hdr_chdlc_time_sec time_stamp_sec
|
||||
#define wp_api_rx_hdr_chdlc_time_usec time_stamp_usec
|
||||
|
||||
#define wan_hdr_chdlc_error_flag wp_api_rx_hdr_chdlc_error_flag
|
||||
#define wan_hdr_chdlc_time_stamp wp_api_rx_hdr_chdlc_time_stamp
|
||||
#define wan_hdr_chdlc_time_sec wp_api_rx_hdr_chdlc_time_sec
|
||||
#define wan_hdr_chdlc_time_usec wp_api_rx_hdr_chdlc_time_usec
|
||||
|
||||
/* BITSTRM Old backdward comptabile */
|
||||
#define wp_api_rx_hdr_bitstrm_error_flag wp_api_rx_hdr_error_flag
|
||||
#define wp_api_rx_hdr_bitstrm_time_stamp wp_api_rx_hdr_time_stamp
|
||||
#define wp_api_rx_hdr_bitstrm_time_sec time_stamp_sec
|
||||
#define wp_api_rx_hdr_bitstrm_time_usec time_stamp_usec
|
||||
#define wp_api_rx_hdr_bitstrm_channel bitstrm.channel
|
||||
#define wp_api_rx_hdr_bitstrm_direction bitstrm.direction
|
||||
|
||||
#define wan_hdr_bitstrm_error_flag wp_api_rx_hdr_bitstrm_error_flag
|
||||
#define wan_hdr_bitstrm_time_stamp wp_api_rx_hdr_bitstrm_data_length
|
||||
#define wan_hdr_bitstrm_time_sec wp_api_rx_hdr_bitstrm_time_sec
|
||||
#define wan_hdr_bitstrm_time_usec wp_api_rx_hdr_bitstrm_time_usec
|
||||
#define wan_hdr_bitstrm_channel wp_api_rx_hdr_bitstrm_channel
|
||||
#define wan_hdr_bitstrm_direction wp_api_rx_hdr_bitstrm_direction
|
||||
|
||||
/* HDLC Old backdward comptabile */
|
||||
#define wp_api_rx_hdr_hdlc_error_flag wp_api_rx_hdr_error_flag
|
||||
#define wp_api_rx_hdr_hdlc_time_stamp wp_api_rx_hdr_time_stamp
|
||||
#define wp_api_rx_hdr_hdlc_time_sec time_stamp_sec
|
||||
#define wp_api_rx_hdr_hdlc_time_usec time_stamp_usec
|
||||
|
||||
#define wan_hdr_hdlc_error_flag wp_api_rx_hdr_error_flag
|
||||
#define wan_hdr_hdlc_time_stamp wp_api_rx_hdr_time_stamp
|
||||
|
||||
/* LAPBS Old backdward comptabile */
|
||||
#define wp_api_rx_hdr_lapb_pf lapb.pf
|
||||
#define wp_api_rx_hdr_lapb_exception lapb.exception
|
||||
#define wp_api_rx_hdr_lapb_time_sec time_stamp_sec
|
||||
#define wp_api_rx_hdr_lapb_time_usec time_stamp_usec
|
||||
|
||||
#define wan_hdr_lapb_pf wp_api_rx_hdr_lapb_pf
|
||||
#define wan_hdr_lapb_exception wp_api_rx_hdr_lapb_exception
|
||||
|
||||
/* FR Old backdward comptabile */
|
||||
#define wp_api_rx_hdr_fr_attr wp_api_rx_hdr_error_flag
|
||||
#define wp_api_rx_hdr_fr_time_stamp wp_api_rx_hdr_time_stamp
|
||||
#define wp_api_rx_hdr_fr_time_sec time_stamp_sec
|
||||
#define wp_api_rx_hdr_fr_time_usec time_stamp_usec
|
||||
|
||||
#define wan_hdr_fr_attr wp_api_rx_hdr_fr_attr
|
||||
#define wan_hdr_fr_time_stamp wp_api_rx_hdr_fr_time_stamp
|
||||
#define wan_hdr_fr_time_sec wp_api_rx_hdr_fr_time_sec
|
||||
#define wan_hdr_fr_time_usec wp_api_rx_hdr_fr_time_usec
|
||||
|
||||
/* SS7 Legacy Old backdward comptabile */
|
||||
#define wp_api_rx_hdr_ss7_legacy_sio wp_api_rx_hdr_error_flag
|
||||
#define wp_api_rx_hdr_ss7_legacy_time_stamp wp_api_rx_hdr_time_stamp
|
||||
|
||||
#define wp_api_rx_hdr_event_serial_status serial.status
|
||||
|
||||
} wp_api_hdr_t;
|
||||
|
||||
|
||||
/***********************************************//**
|
||||
Wanpipe API Element Structure
|
||||
****************************************************/
|
||||
|
||||
/*!
|
||||
\def MAX_NO_DATA_BYTES_IN_FRAME
|
||||
\brief Maximum tx/rx data size
|
||||
*/
|
||||
#define MAX_NO_DATA_BYTES_IN_FRAME 8188
|
||||
|
||||
|
||||
/*!
|
||||
\struct wp_api_element
|
||||
\brief Wanpipe API Element contains header and data
|
||||
|
||||
The Element Structures are suppose to be used as
|
||||
casts to a memory buffer. Windows uses the full
|
||||
size of the element structure to allocate the
|
||||
acutal memory buffer used as an element structure
|
||||
|
||||
\typedef wp_api_element_t
|
||||
\brief Wanpipe API Element contains header and data
|
||||
*/
|
||||
|
||||
typedef struct wp_api_element{
|
||||
|
||||
wp_api_hdr_t hdr; /*!< Header structure */
|
||||
unsigned char data[MAX_NO_DATA_BYTES_IN_FRAME]; /*!< Maximum Tx/Rx Data buffer structure */
|
||||
|
||||
/***************************************************//**
|
||||
These defines MUST be used to access wp_api_element_t
|
||||
structure. The wp_api_element_t should not be accessed
|
||||
directly, in order to keep backward compile compatibility.
|
||||
*******************************************************/
|
||||
|
||||
#define wp_api_el_operation_status hdr.wp_api_hdr_operation_status
|
||||
#define wp_api_el_data_length hdr.wp_api_hdr_data_length
|
||||
#define wp_api_el_time_stamp_sec hdr.wp_api_hdr_time_stamp_sec
|
||||
#define wp_api_el_time_stamp_use hdr.wp_api_hdr_time_stamp_use
|
||||
|
||||
#define wp_api_rx_el_crc hdr.wp_api_rx_hdr_crc
|
||||
#define wp_api_rx_el_max_queue_length hdr.wp_api_rx_hdr_max_queue_length
|
||||
#define wp_api_rx_el_number_of_frames_in_queue hdr.wp_api_rx_hdr_number_of_frames_in_queue
|
||||
|
||||
#define wp_api_tx_el_max_queue_length hdr.wp_api_tx_hdr_max_queue_length
|
||||
#define wp_api_tx_el_number_of_frames_in_queue hdr.wp_api_tx_hdr_number_of_frames_in_queue
|
||||
|
||||
} wp_api_element_t;
|
||||
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
/**************************************************************
|
||||
Sangoma Memory descriptors - passed to/from kernel/user space
|
||||
***************************************************************/
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/*!
|
||||
\struct wan_iovec
|
||||
\brief Memory Descriptor of a single buffer.
|
||||
This structure used internally by libsangoma.
|
||||
|
||||
\typedef wan_iovec_t
|
||||
\brief Memory Descriptor of a single buffer.
|
||||
This structure used internally by libsangoma.
|
||||
*/
|
||||
typedef struct wan_iovec
|
||||
{
|
||||
u_int32_t iov_len;
|
||||
|
||||
void * WP_POINTER_64 iov_base;
|
||||
#ifndef __x86_64__
|
||||
u_int32_t reserved;
|
||||
#endif
|
||||
}wan_iovec_t;
|
||||
|
||||
/*!
|
||||
\struct wan_iovec_list
|
||||
\brief Fixed-length List of Memory Descriptors
|
||||
|
||||
\typedef wan_iovec_list_t
|
||||
\brief Fixed-length List of Memory Descriptors
|
||||
*/
|
||||
#define WAN_IOVEC_LIST_LEN 5
|
||||
typedef struct wan_iovec_list
|
||||
{
|
||||
wan_iovec_t iovec_list[WAN_IOVEC_LIST_LEN];/*!< in 'iovec_list', only buffers with non-NULL 'iov_base' should be accessed */
|
||||
|
||||
}wan_iovec_list_t;
|
||||
|
||||
/*!
|
||||
\struct wan_msghdr
|
||||
\brief Variable-length List of Memory Descriptors
|
||||
|
||||
\typedef wan_msghdr_t
|
||||
\brief Variable-length List of Memory Descriptors
|
||||
*/
|
||||
typedef struct wan_msghdr {
|
||||
u_int32_t msg_iovlen; /*!< Number of blocks */
|
||||
wan_iovec_t * WP_POINTER_64 msg_iov; /*!< Data blocks */
|
||||
#ifndef __x86_64__
|
||||
u_int32_t reserved;
|
||||
#endif
|
||||
}wan_msghdr_t;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/****************************************************************/
|
||||
|
||||
/*!
|
||||
\struct _API_POLL_STRUCT
|
||||
\brief Windows poll structure used to implement blocking poll for read/write/event
|
||||
|
||||
This structure is only used by WINDOWS code
|
||||
|
||||
\typedef API_POLL_STRUCT
|
||||
\brief Windows poll structure used to implement blocking poll for read/write/event
|
||||
*/
|
||||
typedef struct _API_POLL_STRUCT
|
||||
{
|
||||
unsigned char operation_status; /*!< operation completion status, check on return */
|
||||
u_int32_t user_flags_bitmap; /*!< bitmap of events API user is interested to receive */
|
||||
u_int32_t poll_events_bitmap; /*!< bitmap of events available for API user */
|
||||
}API_POLL_STRUCT;
|
||||
|
||||
|
||||
/*!
|
||||
\enum SANG_STATUS
|
||||
\brief Wanpipe API Return codes.
|
||||
|
||||
Extra care should be taken when changing SANG_STATUS_xxx definitions
|
||||
to keep compatibility with existing binary files!
|
||||
|
||||
\typedef SANG_STATUS_T
|
||||
\brief Wanpipe API Return codes.
|
||||
*/
|
||||
typedef enum SANG_STATUS
|
||||
{
|
||||
|
||||
SANG_STATUS_SUCCESS=0, /*!< An operation completed successfully */
|
||||
|
||||
/*************************************//**
|
||||
Return codes specific for data reception:
|
||||
******************************************/
|
||||
SANG_STATUS_RX_DATA_TIMEOUT, /*!< No data was received. NOT an error. */
|
||||
SANG_STATUS_RX_DATA_AVAILABLE, /*!< Data was received. */
|
||||
SANG_STATUS_NO_DATA_AVAILABLE, /*!< There is no RX data in API receive queue */
|
||||
|
||||
/*************************************//**
|
||||
Return codes specific for data transmission:
|
||||
******************************************/
|
||||
SANG_STATUS_TX_TIMEOUT, /*!< Transmit command timed out */
|
||||
SANG_STATUS_TX_DATA_TOO_LONG, /*!< Longer than MTU */
|
||||
SANG_STATUS_TX_DATA_TOO_SHORT, /*!< Shorter than minimum */
|
||||
SANG_STATUS_TX_HDR_TOO_SHORT, /*!< Tx Header is too short */
|
||||
|
||||
/*************************************//**
|
||||
Return codes specific for line status:
|
||||
******************************************/
|
||||
SANG_STATUS_LINE_DISCONNECTED, /*!< Physical line (T1/E1/Serial) is disconnected. */
|
||||
SANG_STATUS_PROTOCOL_DISCONNECTED, /*!< The Communication Protocol (CHDLC/Frame Relay/PPP/LAPD...) is disconnected */
|
||||
SANG_STATUS_LINE_CONNECTED, /*!< Physical line (T1/E1/Serial) is connected. */
|
||||
SANG_STATUS_PROTOCOL_CONNECTED, /*!< The Communication Protocol (CHDLC/Frame Relay/PPP/LAPD...) is connected */
|
||||
|
||||
/*************************************//**
|
||||
Return codes specific for general errors:
|
||||
******************************************/
|
||||
|
||||
SANG_STATUS_COMMAND_ALREADY_RUNNING, /*!< Two threads attempting to access device at the same time. */
|
||||
SANG_STATUS_BUFFER_TOO_SMALL, /*!< Buffer passed to API is too small. */
|
||||
SANG_STATUS_FAILED_TO_LOCK_USER_MEMORY, /*!< Kernel error */
|
||||
SANG_STATUS_FAILED_ALLOCATE_MEMORY, /*!< Memory allocatin failure */
|
||||
SANG_STATUS_INVALID_DEVICE_REQUEST, /*!< Command is invalid for device type. */
|
||||
SANG_STATUS_INVALID_PARAMETER, /*!< Invalid parameter */
|
||||
SANG_STATUS_GENERAL_ERROR, /*!< General interal error */
|
||||
SANG_STATUS_DEVICE_BUSY, /*!< Device is busy */
|
||||
SANG_STATUS_INVALID_DEVICE, /*!< Invalid device selected */
|
||||
SANG_STATUS_IO_ERROR, /*!< IO error on device */
|
||||
SANG_STATUS_UNSUPPORTED_FUNCTION, /*!< Unsupported command or function */
|
||||
SANG_STATUS_UNSUPPORTED_PROTOCOL, /*!< Unsupported protocol selected */
|
||||
SANG_STATUS_DEVICE_ALREADY_EXIST, /*!< Device already exists */
|
||||
SANG_STATUS_DEV_INIT_INCOMPLETE, /*!< Device initialization failed or not done */
|
||||
SANG_STATUS_TRACE_QUEUE_EMPTY, /*!< Trace queue empty */
|
||||
SANG_STATUS_OPTION_NOT_SUPPORTED, /*!< Unsupported command or option */
|
||||
|
||||
/*************************************//**
|
||||
Wanpipe API Event Available
|
||||
******************************************/
|
||||
SANG_STATUS_API_EVENT_AVAILABLE, /*!< Wanpipe API Event is available */
|
||||
|
||||
|
||||
/*************************************//**
|
||||
API Operation Internal errors
|
||||
******************************************/
|
||||
SANG_STATUS_CAN_NOT_STOP_DEVICE_WHEN_ALREADY_STOPPED, /*!< Failed to stop device, already stopped */
|
||||
SANG_STATUS_CAN_NOT_RUN_TWO_PORT_CMDS_AT_THE_SAME_TIME, /*!< Failed to execute command, busy due to collision */
|
||||
SANG_STATUS_ASSOCIATED_IRP_SYSTEM_BUFFER_NULL_ERROR, /*!< */
|
||||
SANG_STATUS_STRUCTURE_SIZE_MISMATCH_ERROR, /*!< Header size mistmatch between user & driver. Recompilation is necessary */
|
||||
|
||||
|
||||
/*************************************//**
|
||||
Windows Specific definitions
|
||||
******************************************/
|
||||
SANG_STATUS_REGISTRY_ERROR=180, /*!< Windows Registry Error */
|
||||
SANG_STATUS_IO_PENDING, /*!< Asynchronous IO */
|
||||
SANG_STATUS_APIPOLL_TIMEOUT, /*!< API Poll timeout - no events or data */
|
||||
SANG_STATUS_NO_FREE_BUFFERS,
|
||||
SANG_STATUS_SHARED_EVENT_INIT_ERROR, /*!< Driver can not use 'shared event' supplied by the API user */
|
||||
|
||||
/****************************************//**
|
||||
For internal API use only.
|
||||
Range reserved for internal API use start
|
||||
*******************************************/
|
||||
SANG_STATUS_DATA_QUEUE_EMPTY=190, /*!< queue empty */
|
||||
SANG_STATUS_DATA_QUEUE_FULL, /*!< queue empty full */
|
||||
SANG_STATUS_INVALID_IRQL /*!< Driver routine was called at invalid IRQL. */
|
||||
|
||||
}SANG_STATUS_T;
|
||||
|
||||
/*!
|
||||
\def SDLA_DECODE_SANG_STATUS
|
||||
\brief Print decode of Sangoma Return Codes
|
||||
|
||||
*/
|
||||
#define SDLA_DECODE_SANG_STATUS(status) \
|
||||
(abs((int)status) == SANG_STATUS_SUCCESS) ? "SANG_STATUS_SUCCESS" :\
|
||||
(abs((int)status) == SANG_STATUS_COMMAND_ALREADY_RUNNING) ? "SANG_STATUS_COMMAND_ALREADY_RUNNING":\
|
||||
(abs((int)status) == SANG_STATUS_BUFFER_TOO_SMALL) ? "SANG_STATUS_BUFFER_TOO_SMALL":\
|
||||
(abs((int)status) == SANG_STATUS_FAILED_TO_LOCK_USER_MEMORY) ? "SANG_STATUS_FAILED_TO_LOCK_USER_MEMORY":\
|
||||
(abs((int)status) == SANG_STATUS_FAILED_ALLOCATE_MEMORY) ? "SANG_STATUS_FAILED_ALLOCATE_MEMORY":\
|
||||
(abs((int)status) == SANG_STATUS_INVALID_DEVICE_REQUEST) ? "SANG_STATUS_INVALID_DEVICE_REQUEST":\
|
||||
(abs((int)status) == SANG_STATUS_INVALID_PARAMETER) ? "SANG_STATUS_INVALID_PARAMETER":\
|
||||
(abs((int)status) == SANG_STATUS_DATA_QUEUE_EMPTY) ? "SANG_STATUS_DATA_QUEUE_EMPTY":\
|
||||
(abs((int)status) == SANG_STATUS_DATA_QUEUE_FULL) ? "SANG_STATUS_DATA_QUEUE_FULL":\
|
||||
(abs((int)status) == SANG_STATUS_RX_DATA_TIMEOUT) ? "SANG_STATUS_RX_DATA_TIMEOUT":\
|
||||
(abs((int)status) == SANG_STATUS_RX_DATA_AVAILABLE) ? "SANG_STATUS_RX_DATA_AVAILABLE":\
|
||||
(abs((int)status) == SANG_STATUS_TX_TIMEOUT) ? "SANG_STATUS_TX_TIMEOUT":\
|
||||
(abs((int)status) == SANG_STATUS_TX_DATA_TOO_LONG) ? "SANG_STATUS_TX_DATA_TOO_LONG":\
|
||||
(abs((int)status) == SANG_STATUS_TX_DATA_TOO_SHORT) ? "SANG_STATUS_TX_DATA_TOO_SHORT":\
|
||||
(abs((int)status) == SANG_STATUS_LINE_DISCONNECTED) ? "SANG_STATUS_LINE_DISCONNECTED":\
|
||||
(abs((int)status) == SANG_STATUS_LINE_CONNECTED) ? "SANG_STATUS_LINE_CONNECTED":\
|
||||
(abs((int)status) == SANG_STATUS_PROTOCOL_DISCONNECTED) ? "SANG_STATUS_PROTOCOL_DISCONNECTED":\
|
||||
(abs((int)status) == SANG_STATUS_PROTOCOL_CONNECTED) ? "SANG_STATUS_PROTOCOL_CONNECTED":\
|
||||
(abs((int)status) == SANG_STATUS_GENERAL_ERROR) ? "SANG_STATUS_GENERAL_ERROR":\
|
||||
(abs((int)status) == SANG_STATUS_DEVICE_BUSY) ? "SANG_STATUS_DEVICE_BUSY":\
|
||||
(abs((int)status) == SANG_STATUS_INVALID_DEVICE) ? "SANG_STATUS_INVALID_DEVICE":\
|
||||
(abs((int)status) == SANG_STATUS_IO_ERROR) ? "SANG_STATUS_IO_ERROR":\
|
||||
(abs((int)status) == SANG_STATUS_UNSUPPORTED_FUNCTION) ? "SANG_STATUS_UNSUPPORTED_FUNCTION":\
|
||||
(abs((int)status) == SANG_STATUS_UNSUPPORTED_PROTOCOL) ? "SANG_STATUS_UNSUPPORTED_PROTOCOL":\
|
||||
(abs((int)status) == SANG_STATUS_DEVICE_ALREADY_EXIST) ? "SANG_STATUS_DEVICE_ALREADY_EXIST":\
|
||||
(abs((int)status) == SANG_STATUS_DEV_INIT_INCOMPLETE) ? "SANG_STATUS_DEV_INIT_INCOMPLETE":\
|
||||
(abs((int)status) == SANG_STATUS_API_EVENT_AVAILABLE) ? "SANG_STATUS_API_EVENT_AVAILABLE":\
|
||||
(abs((int)status) == SANG_STATUS_REGISTRY_ERROR) ? "SANG_STATUS_REGISTRY_ERROR":\
|
||||
(abs((int)status) == SANG_STATUS_CAN_NOT_STOP_DEVICE_WHEN_ALREADY_STOPPED) ? "SANG_STATUS_CAN_NOT_STOP_DEVICE_WHEN_ALREADY_STOPPED":\
|
||||
(abs((int)status) == SANG_STATUS_CAN_NOT_RUN_TWO_PORT_CMDS_AT_THE_SAME_TIME) ? "SANG_STATUS_CAN_NOT_RUN_TWO_PORT_CMDS_AT_THE_SAME_TIME":\
|
||||
(abs((int)status) == SANG_STATUS_ASSOCIATED_IRP_SYSTEM_BUFFER_NULL_ERROR) ? "SANG_STATUS_ASSOCIATED_IRP_SYSTEM_BUFFER_NULL_ERROR":\
|
||||
(abs((int)status) == SANG_STATUS_STRUCTURE_SIZE_MISMATCH_ERROR) ? "SANG_STATUS_STRUCTURE_SIZE_MISMATCH_ERROR":\
|
||||
(abs((int)status) == SANG_STATUS_INVALID_IRQL) ? "SANG_STATUS_INVALID_IRQL":\
|
||||
(abs((int)status) == SANG_STATUS_NO_DATA_AVAILABLE) ? "SANG_STATUS_NO_DATA_AVAILABLE":\
|
||||
(abs((int)status) == SANG_STATUS_IO_PENDING) ? "SANG_STATUS_IO_PENDING":\
|
||||
(abs((int)status) == SANG_STATUS_APIPOLL_TIMEOUT) ? "SANG_STATUS_APIPOLL_TIMEOUT":\
|
||||
(abs((int)status) == SANG_STATUS_NO_FREE_BUFFERS) ? "SANG_STATUS_NO_FREE_BUFFERS":\
|
||||
(abs((int)status) == SANG_STATUS_OPTION_NOT_SUPPORTED) ? "SANG_STATUS_OPTION_NOT_SUPPORTED":\
|
||||
"Status Unknown"
|
||||
|
||||
#define SANG_SUCCESS(status) (status == SANG_STATUS_SUCCESS)
|
||||
#define SANG_ERROR(status) (!SANG_SUCCESS(status))
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
#if defined(WAN_KERNEL) || defined(USE_SANGOMA_ERRNO)
|
||||
/*
|
||||
Cross-Platform return codes.
|
||||
SOME of these return codes are defined in errno.h, but not ALL of them.
|
||||
*/
|
||||
# undef EFAULT
|
||||
# undef EBUSY
|
||||
# undef ENODEV
|
||||
# undef EINVAL
|
||||
# undef EIO
|
||||
# undef EPFNOSUPPORT
|
||||
# undef EPROTONOSUPPORT
|
||||
# undef ENOMEM
|
||||
# undef EEXIST
|
||||
# undef ENOBUFS
|
||||
# undef EOPNOTSUPP
|
||||
# undef ENXIO
|
||||
# undef EAGAIN
|
||||
# undef EFBIG
|
||||
|
||||
# define ETIMEDOUT SANG_STATUS_GENERAL_ERROR
|
||||
# define EFAULT SANG_STATUS_GENERAL_ERROR
|
||||
# define EBUSY SANG_STATUS_DEVICE_BUSY
|
||||
# define ENODEV SANG_STATUS_INVALID_DEVICE
|
||||
# define EINVAL SANG_STATUS_INVALID_PARAMETER
|
||||
# define EIO SANG_STATUS_IO_ERROR
|
||||
# define EPFNOSUPPORT SANG_STATUS_UNSUPPORTED_FUNCTION
|
||||
# define EPROTONOSUPPORT SANG_STATUS_UNSUPPORTED_PROTOCOL
|
||||
# define ENOMEM SANG_STATUS_FAILED_ALLOCATE_MEMORY
|
||||
# define EEXIST SANG_STATUS_DEVICE_ALREADY_EXIST
|
||||
# define ENOBUFS SANG_STATUS_NO_FREE_BUFFERS /* no free tx or rx buffers */
|
||||
# define EOPNOTSUPP SANG_STATUS_OPTION_NOT_SUPPORTED
|
||||
# define ENXIO EFAULT
|
||||
# define ENETDOWN SANG_STATUS_LINE_DISCONNECTED
|
||||
# define EAGAIN SANG_STATUS_DEVICE_BUSY
|
||||
# define EFBIG SANG_STATUS_TX_DATA_TOO_LONG
|
||||
# define EAFNOSUPPORT SANG_STATUS_UNSUPPORTED_FUNCTION
|
||||
#endif
|
||||
#endif /* __WINDOWS */
|
||||
|
||||
#endif/* __WANPIPE_API_HDR__ */
|
|
@ -0,0 +1,814 @@
|
|||
/******************************************************************************//**
|
||||
* \file wanpipe_api_iface.h
|
||||
* \brief WANPIPE(tm) Driver API Interface -
|
||||
* \brief Provides IO/Event API Only
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
* David Rokhvarg <davidr@sangoma.com>
|
||||
*
|
||||
* Copyright (c) 2007 - 08, Sangoma Technologies
|
||||
* All rights reserved.
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of the Sangoma Technologies nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Sangoma Technologies ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Sangoma Technologies BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* ===============================================================================
|
||||
*/
|
||||
|
||||
#ifndef __WANPIPE_API_IFACE_H_
|
||||
#define __WANPIPE_API_IFACE_H_
|
||||
|
||||
#include "wanpipe_api_hdr.h"
|
||||
|
||||
/*!
|
||||
\typedef sng_fd_t
|
||||
\brief Windows/Unix file handle abstraction
|
||||
*/
|
||||
#if defined(__WINDOWS__)
|
||||
typedef HANDLE sng_fd_t;
|
||||
#else
|
||||
typedef int sng_fd_t;
|
||||
#endif
|
||||
|
||||
/* Indicate to library that new features exist */
|
||||
/*!
|
||||
\def WP_API_FEATURE_DTMF_EVENTS
|
||||
\brief Indicates to developer that dtmf feature is available
|
||||
\def WP_API_FEATURE_FE_ALARM
|
||||
\brief Indicates to developer that fe alarm feature is available
|
||||
\def WP_API_FEATURE_EVENTS
|
||||
\brief Indicates to developer that events feature is available
|
||||
\def WP_API_FEATURE_LINK_STATUS
|
||||
\brief Indicates to developer that link status feature is available
|
||||
\def WP_API_FEATURE_POL_REV
|
||||
\brief Indicates to developer that polarity reversal feature is available
|
||||
\def WP_API_FEATURE_LOGGER
|
||||
\brief Indicates to developer that Wanpipe Logger API feature is available
|
||||
\def WP_API_FEATURE_RM_GAIN
|
||||
\brief Indicates to developer that analog hardware gain feature is available
|
||||
\def WP_API_FEATURE_LOOP
|
||||
\brief Indicates to developer that loop feature is available
|
||||
\def WP_API_FEATURE_HWEC
|
||||
\brief Indicates to developer that Hardware Echo canceller feature is available
|
||||
\def WP_API_FEATURE_BUFFER_MULT
|
||||
\brief Indicates to developer that buffer multiplier featere is available
|
||||
\def WP_API_FEATURE_RX_TX_ERRS
|
||||
\brief Indicates to developer that rx tx error reporting feature is available
|
||||
\def WP_API_FEATURE_EC_CHAN_STAT
|
||||
\brief Indicates to developer that echo channel status feature is available
|
||||
*/
|
||||
#define WP_API_FEATURE_DTMF_EVENTS 1
|
||||
#define WP_API_FEATURE_FE_ALARM 1
|
||||
#define WP_API_FEATURE_EVENTS 1
|
||||
#define WP_API_FEATURE_LINK_STATUS 1
|
||||
#define WP_API_FEATURE_POL_REV 1
|
||||
#define WP_API_FEATURE_LOGGER 1
|
||||
#define WP_API_FEATURE_FAX_EVENTS 1
|
||||
#define WP_API_FEATURE_RM_GAIN 1
|
||||
#define WP_API_FEATURE_LOOP 1
|
||||
#define WP_API_FEATURE_BUFFER_MULT 1
|
||||
#define WP_API_FEATURE_RX_TX_ERRS 1
|
||||
#define WP_API_FEATURE_EC_CHAN_STAT 1
|
||||
#define WP_API_FEATURE_LIBSNG_HWEC 1
|
||||
#define WP_API_FEATURE_DRIVER_GAIN 1
|
||||
#define WP_API_FEATURE_FE_RW 1
|
||||
#define WP_API_FEATURE_HWEC_PERSIST 1
|
||||
#define WP_API_FEATURE_FAX_TYPE_EVENTS 1
|
||||
#define WP_API_FEATURE_HARDWARE_RESCAN 1
|
||||
#define WP_API_FEATURE_LED_CTRL 1
|
||||
#define WP_API_FEATURE_SS7_FORCE_RX 1
|
||||
#define WP_API_FEATURE_SS7_CFG_STATUS 1
|
||||
#define WP_API_FEATURE_LIBSNG_HWEC_DTMF_REMOVAL 1
|
||||
|
||||
|
||||
/*!
|
||||
\enum WANPIPE_IOCTL_CODE
|
||||
\brief Wanpipe IOCTL Commands
|
||||
|
||||
Wanpipe System/IOCTL Commands for API Devices
|
||||
The system calls perform, configration/management/operation/io
|
||||
*/
|
||||
enum WANPIPE_IOCTL_CODE {
|
||||
WANPIPE_IOCTL_WRITE=1, /*!< Write cmd, Windows Only */
|
||||
WANPIPE_IOCTL_READ, /*!< Read cmd, Windows Only */
|
||||
WANPIPE_IOCTL_MGMT, /*!< Mgmnt cmd, driver/port configuration/debugging */
|
||||
WANPIPE_IOCTL_SET_IDLE_TX_BUFFER, /*!< Set idle buffer on a device */
|
||||
WANPIPE_IOCTL_API_POLL, /*!< Poll cmd, Windows Only */
|
||||
WANPIPE_IOCTL_SET_SHARED_EVENT, /*!< Shared Event cmd, Windows Only */
|
||||
WANPIPE_IOCTL_PORT_MGMT, /*!< Port Mgmnt Event cmd */
|
||||
WANPIPE_IOCTL_PORT_CONFIG, /*!< Port Config Event */
|
||||
WANPIPE_IOCTL_API_CMD, /*!< Wanpipe API command */
|
||||
WANPIPE_IOCTL_PIPEMON, /*!< PIPEMON command, debugging */
|
||||
WANPIPE_IOCTL_SNMP, /*!< SNMP statistics, not implemented */
|
||||
WANPIPE_IOCTL_SNMP_IFSPEED, /*!< SNMP statistics, not implemented */
|
||||
WANPIPE_IOCTL_DEVEL, /*!< Development Cmds, use only for hw debugging */
|
||||
WANPIPE_IOCTL_WRITE_NON_BLOCKING, /*!< Non-Blocking Write cmd, Windows Only */
|
||||
WANPIPE_IOCTL_READ_NON_BLOCKING, /*!< Non-Blocking Read cmd, Windows Only */
|
||||
WANPIPE_IOCTL_CDEV_CTRL, /*!< Non-Blocking Cdev control cmd, Windows Only */
|
||||
WANPIPE_IOCTL_LOGGER_CMD, /*!< Wanpipe Logger command */
|
||||
};
|
||||
|
||||
|
||||
/*!
|
||||
\enum WANPIPE_IOCTL_PIPEMON_CMDS
|
||||
\brief Commands used with WANPIPE_IOCTL_PIPEMON IOCTL
|
||||
*/
|
||||
enum WANPIPE_IOCTL_PIPEMON_CMDS {
|
||||
WANPIPEMON_ROUTER_UP_TIME = 0x50, /*!< Check router up time */
|
||||
WANPIPEMON_ENABLE_TRACING, /*!< Enable data tracing */
|
||||
WANPIPEMON_DISABLE_TRACING, /*!< Disable data tracing */
|
||||
WANPIPEMON_GET_TRACE_INFO, /*!< Get traced data frame */
|
||||
WANPIPEMON_READ_CODE_VERSION, /*!< Get HW Firmware Version */
|
||||
WANPIPEMON_FLUSH_OPERATIONAL_STATS, /*!< Flush operational stats */
|
||||
WANPIPEMON_OPERATIONAL_STATS, /*!< Get operational stats */
|
||||
WANPIPEMON_READ_OPERATIONAL_STATS, /*!< Get operational stats */
|
||||
WANPIPEMON_READ_CONFIGURATION, /*!< Get device configuration */
|
||||
WANPIPEMON_READ_COMMS_ERROR_STATS, /*!< Read comm statistics*/
|
||||
WANPIPEMON_FLUSH_COMMS_ERROR_STATS, /*!< Flush comm statistics*/
|
||||
WANPIPEMON_AFT_LINK_STATUS, /*!< Get Device Link Status */
|
||||
WANPIPEMON_AFT_MODEM_STATUS, /*!< Get Device Mode Status (Serial Cards Only) */
|
||||
WANPIPEMON_AFT_HWEC_STATUS, /*!< Get Device HWEC Status (Supported or Not) */
|
||||
WANPIPEMON_DIGITAL_LOOPTEST, /*!< Perform a digial loop data integrity test */
|
||||
WANPIPEMON_SET_FT1_MODE, /*!< Set T1 Mode - Legacy Deprecated */
|
||||
|
||||
WANPIPEMON_GET_OPEN_HANDLES_COUNTER, /*!< Get number of open handles on this device */
|
||||
WANPIPEMON_GET_CARD_TYPE, /*!< Get card type A101/2/4/8/A200 */
|
||||
WANPIPEMON_API_NOT_USED, /*!< Not Used */
|
||||
WANPIPEMON_GET_HW_MAC_ADDR, /*!< Get HWE MAC Address (Used by S518 Adsl) */
|
||||
WANPIPEMON_FLUSH_TX_BUFFERS, /*!< Flush Tx Buffers */
|
||||
WANPIPEMON_EC_IOCTL, /*!< HWEC Commands */
|
||||
WANPIPEMON_SET_RBS_BITS, /*!< Set RBS Bits */
|
||||
WANPIPEMON_GET_RBS_BITS, /*!< Read RBS Bits */
|
||||
WANPIPEMON_AFT_CUSTOMER_ID, /*!< Get Unique Custome ID */
|
||||
WANPIPEMON_FT1_READ_STATUS, /*!< Read T1/E1 Status */
|
||||
|
||||
WANPIPEMON_DRIVER_STAT_IFSEND, /*!< Driver statistics ifsend() */
|
||||
WANPIPEMON_DRIVER_STAT_INTR, /*!< Driver statistics interrupts */
|
||||
WANPIPEMON_DRIVER_STAT_GEN, /*!< Driver statistics general */
|
||||
WANPIPEMON_FLUSH_DRIVER_STATS, /*!< Flush driver statistics */
|
||||
WANPIPEMON_GET_IBA_DATA, /*!< Get IBA Data - Deprecated not used */
|
||||
WANPIPEMON_TDM_API, /*!< Windows Legacy- TDM API commands */
|
||||
|
||||
WANPIPEMON_READ_PERFORMANCE_STATS,
|
||||
WANPIPEMON_FLUSH_PERFORMANCE_STATS,
|
||||
WANPIPEMON_GET_BIOS_ENCLOSURE3_SERIAL_NUMBER, /*!< Get Enclosure3 Serial Number from Motherboard BIOS. */
|
||||
|
||||
WANPIPEMON_ENABLE_BERT, /*!< Start BERT for the interface. */
|
||||
WANPIPEMON_DISABLE_BERT, /*!< Stop BERT for the interface. */
|
||||
WANPIPEMON_GET_BERT_STATUS, /*!< Get BERT status/statistics (Locked/Not Locked) */
|
||||
WANPIPEMON_PERFORMANCE_STATS, /*!< Control performance performance statistics */
|
||||
WANPIPEMON_LED_CTRL, /*!< Control led on a port - on/off */
|
||||
|
||||
/* Do not add any non-debugging commands below */
|
||||
WANPIPEMON_CHAN_SEQ_DEBUGGING, /*!< Debugging only - enable/disable span level sequence debugging */
|
||||
WANPIPEMON_GEN_FIFO_ERR_TX, /*!< Debugging only - generate tx fifo error */
|
||||
WANPIPEMON_GEN_FIFO_ERR_RX, /*!< Debugging only - generate rx fifo error */
|
||||
WANPIPEMON_GEN_FE_SYNC_ERR, /*!< Debugging only - generate fe sync error */
|
||||
|
||||
/* All Public commands must be between WANPIPEMON_ROUTER_UP_TIME and WANPIPEMON_PROTOCOL_PRIVATE. */
|
||||
|
||||
WANPIPEMON_PROTOCOL_PRIVATE /*!< Private Wanpipemon commands used by lower layers */
|
||||
};
|
||||
|
||||
|
||||
typedef enum wp_bert_sequence_type{
|
||||
WP_BERT_RANDOM_SEQUENCE = 1,
|
||||
WP_BERT_ASCENDANT_SEQUENCE,
|
||||
WP_BERT_DESCENDANT_SEQUENCE
|
||||
}wp_bert_sequence_type_t;
|
||||
|
||||
#define WP_BERT_DECODE_SEQUENCE_TYPE(sequence) \
|
||||
((sequence) == WP_BERT_RANDOM_SEQUENCE) ? "WP_BERT_RANDOM_SEQUENCE" : \
|
||||
((sequence) == WP_BERT_ASCENDANT_SEQUENCE) ? "WP_BERT_ASCENDANT_SEQUENCE" : \
|
||||
((sequence) == WP_BERT_DESCENDANT_SEQUENCE) ? "WP_BERT_DESCENDANT_SEQUENCE" : \
|
||||
"(Unknown BERT sequence)"
|
||||
|
||||
#define WP_BERT_STATUS_OUT_OF_SYNCH 0
|
||||
#define WP_BERT_STATUS_IN_SYNCH 1
|
||||
|
||||
/*!
|
||||
\struct _wp_bert_status
|
||||
\brief BERT status and statistics
|
||||
|
||||
\typedef wp_bert_status_t
|
||||
*/
|
||||
typedef struct _wp_bert_status{
|
||||
|
||||
unsigned char state; /*!< Current state of BERT */
|
||||
unsigned int errors; /*!< Nuber of errors during BERT */
|
||||
unsigned int synchonized_count; /*!< Number of times BERT got into synch */
|
||||
|
||||
}wp_bert_status_t;
|
||||
|
||||
|
||||
|
||||
/*!
|
||||
\struct wan_api_ss7_status
|
||||
\brief SS7 Hardare/Driver configuration status
|
||||
|
||||
\typedef wan_api_ss7_status_t
|
||||
*/
|
||||
typedef struct wan_api_ss7_cfg_status {
|
||||
unsigned char ss7_hw_enable;
|
||||
unsigned char ss7_hw_mode;
|
||||
unsigned char ss7_hw_lssu_size;
|
||||
unsigned char ss7_driver_repeat;
|
||||
} wan_api_ss7_cfg_status_t;
|
||||
|
||||
/*!
|
||||
\enum wanpipe_api_cmds
|
||||
\brief Commands used with WANPIPE_IOCTL_API_CMD IOCTL
|
||||
*/
|
||||
enum wanpipe_api_cmds
|
||||
{
|
||||
|
||||
WP_API_CMD_GET_USR_MTU_MRU, /*!< Get Device tx/rx (CHUNK) in bytes, multiple of 8 */
|
||||
WP_API_CMD_SET_USR_PERIOD, /*!< Set chunk period in miliseconds eg: 1ms = 8bytes */
|
||||
WP_API_CMD_GET_USR_PERIOD, /*!< Get configured chunk period in miliseconds eg: 1ms = 8bytes */
|
||||
WP_API_CMD_SET_HW_MTU_MRU, /*!< Set hw tx/rx chunk in bytes eg: 1ms = 8bytes */
|
||||
WP_API_CMD_GET_HW_MTU_MRU, /*!< Get hw tx/rx chunk in bytes eg: 1ms = 8bytes */
|
||||
WP_API_CMD_SET_CODEC, /*!< Set device codec (ulaw/alaw/slinear) */
|
||||
WP_API_CMD_GET_CODEC, /*!< Get configured device codec (ulaw/alaw/slinear) */
|
||||
WP_API_CMD_SET_POWER_LEVEL, /*!< Not implemented */
|
||||
WP_API_CMD_GET_POWER_LEVEL, /*!< Not implemented */
|
||||
WP_API_CMD_TOGGLE_RX, /*!< Disable/Enable RX on this device */
|
||||
WP_API_CMD_TOGGLE_TX, /*!< Disable/Enable TX on this device */
|
||||
WP_API_CMD_GET_HW_CODING, /*!< Get HW coding configuration (ulaw or alaw) */
|
||||
WP_API_CMD_SET_HW_CODING, /*!< Set HW coding (ulaw or alaw) */
|
||||
WP_API_CMD_GET_FULL_CFG, /*!< Get full device configuration */
|
||||
WP_API_CMD_SET_EC_TAP, /*!< Not implemented */
|
||||
WP_API_CMD_GET_EC_TAP, /*!< Not implemented */
|
||||
WP_API_CMD_ENABLE_RBS_EVENTS, /*!< Enable RBS Event monitoring */
|
||||
WP_API_CMD_DISABLE_RBS_EVENTS, /*!< Disable RBS Event monitoring */
|
||||
WP_API_CMD_WRITE_RBS_BITS, /*!< Write RBS bits (ABCD) */
|
||||
WP_API_CMD_READ_RBS_BITS, /*!< Read RBS bits (ABCD) */
|
||||
WP_API_CMD_GET_STATS, /*!< Get device statistics */
|
||||
WP_API_CMD_FLUSH_BUFFERS, /*!< Flush Buffers */
|
||||
WP_API_CMD_FLUSH_TX_BUFFERS, /*!< Flush Tx Buffers */
|
||||
WP_API_CMD_FLUSH_RX_BUFFERS, /*!< Flush Rx Buffers */
|
||||
WP_API_CMD_FLUSH_EVENT_BUFFERS, /*!< Flush Event Buffers */
|
||||
WP_API_CMD_READ_EVENT, /*!< */
|
||||
WP_API_CMD_SET_EVENT, /*!< */
|
||||
WP_API_CMD_SET_RX_GAINS, /*!< */
|
||||
WP_API_CMD_SET_TX_GAINS, /*!< */
|
||||
WP_API_CMD_CLEAR_RX_GAINS, /*!< */
|
||||
WP_API_CMD_CLEAR_TX_GAINS, /*!< */
|
||||
WP_API_CMD_GET_FE_ALARMS, /*!< */
|
||||
WP_API_CMD_ENABLE_HWEC, /*!< */
|
||||
WP_API_CMD_DISABLE_HWEC, /*!< */
|
||||
WP_API_CMD_SET_FE_STATUS, /*!< */
|
||||
WP_API_CMD_GET_FE_STATUS, /*!< */
|
||||
WP_API_CMD_GET_HW_DTMF, /*!< Get Status of the HW DTMF. Enabled(1) or Disabled(0) */
|
||||
WP_API_CMD_DRV_MGMNT, /*!< */
|
||||
WP_API_CMD_RESET_STATS, /*!< Reset device statistics */
|
||||
WP_API_CMD_DRIVER_VERSION, /*!< Driver Version */
|
||||
WP_API_CMD_FIRMWARE_VERSION, /*!< Firmware Version */
|
||||
WP_API_CMD_CPLD_VERSION, /*!< CPLD Version */
|
||||
WP_API_CMD_OPEN_CNT, /*!< Open Cnt */
|
||||
WP_API_CMD_SET_TX_Q_SIZE, /*!< Set TX Queue Size */
|
||||
WP_API_CMD_GET_TX_Q_SIZE, /*!< Get TX Queue Size */
|
||||
WP_API_CMD_SET_RX_Q_SIZE, /*!< Set RX Queue Size */
|
||||
WP_API_CMD_GET_RX_Q_SIZE, /*!< Get RX Queue Size */
|
||||
WP_API_CMD_EVENT_CTRL, /*!< */
|
||||
WP_API_CMD_NOTSUPP, /*!< */
|
||||
WP_API_CMD_SET_RM_RXFLASHTIME, /*!< Set rxflashtime for FXS */
|
||||
WP_API_CMD_SET_IDLE_FLAG, /*!< Set Idle Flag (char) for a BitStream (Voice) channel */
|
||||
WP_API_CMD_GET_HW_EC, /*!< Check Status of HW Echo Cancelation. Enabled(1) or Disabled(0) */
|
||||
WP_API_CMD_GET_HW_FAX_DETECT, /*!< Check Status of HW Fax Detect. Enabled(1) or Disabled(0) */
|
||||
WP_API_CMD_ENABLE_LOOP, /*!< Remote Loop the channel */
|
||||
WP_API_CMD_DISABLE_LOOP, /*!< Disable remote loop */
|
||||
WP_API_CMD_BUFFER_MULTIPLIER, /*!< Set Buffer Multiplier - for SPAN voice mode only */
|
||||
WP_API_CMD_GET_HW_EC_CHAN, /*!< Get status of hwec for the current timeslot */
|
||||
WP_API_CMD_GET_HW_EC_PERSIST, /*!< Check if hwec persist mode is on or off */
|
||||
WP_API_CMD_EC_IOCTL, /*!< Execute command in HWEC module of the Driver */
|
||||
WP_API_CMD_SS7_FORCE_RX, /*!< Force SS7 Receive */
|
||||
WP_API_CMD_SS7_GET_CFG_STATUS, /*!< Get current ss7 configuration status */
|
||||
|
||||
/* Add only debugging commands here */
|
||||
WP_API_CMD_GEN_FIFO_ERR_TX=500,
|
||||
WP_API_CMD_GEN_FIFO_ERR_RX,
|
||||
WP_API_CMD_START_CHAN_SEQ_DEBUG,
|
||||
WP_API_CMD_STOP_CHAN_SEQ_DEBUG
|
||||
};
|
||||
|
||||
/*!
|
||||
\enum wanpipe_cdev_ctrl_cmds
|
||||
\brief Commands used with WANPIPE_IOCTL_CDEV_CTRL IOCTL
|
||||
*/
|
||||
enum wanpipe_cdev_ctrl_cmds
|
||||
{
|
||||
WP_CDEV_CMD_SET_DPC_TIMEDIFF_MONITORING_OPTION=1, /* DPC() monitoring */
|
||||
WP_CDEV_CMD_SET_TX_INTERRUPT_TIMEDIFF_MONITORING_OPTION,/* TX ISR() monitoring */
|
||||
WP_CDEV_CMD_SET_RX_INTERRUPT_TIMEDIFF_MONITORING_OPTION,/* RX ISR() monitoring */
|
||||
WP_CDEV_CMD_PRINT_INTERRUPT_TIMEDIFF_MONITORING_INFO, /* print ISR() monitoring info to Wanpipelog */
|
||||
WP_CDEV_CMD_GET_INTERFACE_NAME /* Retrun Interface Name to user-mode application */
|
||||
};
|
||||
|
||||
/*!
|
||||
\enum wanpipe_api_events
|
||||
\brief Events available on wanpipe api device
|
||||
|
||||
The events are can be enabled or disabled by application.
|
||||
Events are passed up to the user application
|
||||
by the driver. If event occours and applicatoin has enabled
|
||||
such event, then event is passed up to the api device.
|
||||
User application will receive a poll() signal idicating
|
||||
that event has occoured.
|
||||
|
||||
*/
|
||||
enum wanpipe_api_events
|
||||
{
|
||||
WP_API_EVENT_NONE, /*!< */
|
||||
WP_API_EVENT_RBS, /*!< Tx: Enable Disable RBS Opertaion Mode (T1: RBS E1: CAS) */
|
||||
WP_API_EVENT_ALARM, /*!< */
|
||||
WP_API_EVENT_DTMF, /*!< Enable Disable HW DTMF Detection */
|
||||
WP_API_EVENT_RM_DTMF, /*!< */
|
||||
WP_API_EVENT_RXHOOK, /*!< */
|
||||
WP_API_EVENT_RING, /*!< */
|
||||
WP_API_EVENT_RING_DETECT, /*!< */
|
||||
WP_API_EVENT_RING_TRIP_DETECT, /*!< */
|
||||
WP_API_EVENT_TONE, /*!< */
|
||||
WP_API_EVENT_TXSIG_KEWL, /*!< */
|
||||
WP_API_EVENT_TXSIG_START, /*!< */
|
||||
WP_API_EVENT_TXSIG_OFFHOOK, /*!< */
|
||||
WP_API_EVENT_TXSIG_ONHOOK, /*!< */
|
||||
WP_API_EVENT_ONHOOKTRANSFER, /*!< */
|
||||
WP_API_EVENT_SETPOLARITY, /*!< */
|
||||
WP_API_EVENT_BRI_CHAN_LOOPBACK, /*!< */
|
||||
WP_API_EVENT_LINK_STATUS, /*!< */
|
||||
WP_API_EVENT_MODEM_STATUS, /*!< */
|
||||
WP_API_EVENT_POLARITY_REVERSE, /*!< */
|
||||
WP_API_EVENT_FAX_DETECT, /*!< Enable Disable HW Fax Detection */
|
||||
WP_API_EVENT_SET_RM_TX_GAIN, /*!< Set Tx Gain for FXO/FXS */
|
||||
WP_API_EVENT_SET_RM_RX_GAIN, /*!< Set Rx Gain for FXO/FXS */
|
||||
WP_API_EVENT_FAX_1100, /*!< IN: FAX 1100 Tone event */
|
||||
WP_API_EVENT_FAX_2100, /*!< IN: FAX 2100 Tone event */
|
||||
WP_API_EVENT_FAX_2100_WSPR, /*!< IN: FAX 2100 WSPR Tone event */
|
||||
};
|
||||
|
||||
|
||||
/*!
|
||||
\def WP_API_EVENT_SET
|
||||
\brief Option to write a particular command
|
||||
\def WP_API_EVENT_GET
|
||||
\brief Option to read a particular command
|
||||
\def WP_API_EVENT_ENABLE
|
||||
\brief Option to enable command
|
||||
\def WP_API_EVENT_DISABLE
|
||||
\brief Option to disable command
|
||||
\def WP_API_EVENT_MODE_DECODE
|
||||
\brief Decode disable/enable command
|
||||
|
||||
*/
|
||||
#define WP_API_EVENT_SET 0x01
|
||||
#define WP_API_EVENT_GET 0x02
|
||||
#define WP_API_EVENT_ENABLE 0x01
|
||||
#define WP_API_EVENT_DISABLE 0x02
|
||||
|
||||
#define WP_API_EVENT_MODE_DECODE(mode) \
|
||||
((mode) == WP_API_EVENT_ENABLE) ? "Enable" : \
|
||||
((mode) == WP_API_EVENT_DISABLE) ? "Disable" : \
|
||||
"(Unknown mode)"
|
||||
|
||||
|
||||
/*!
|
||||
\def WPTDM_A_BIT
|
||||
\brief RBS BIT A
|
||||
\def WPTDM_B_BIT
|
||||
\brief RBS BIT B
|
||||
\def WPTDM_C_BIT
|
||||
\brief RBS BIT C
|
||||
\def WPTDM_C_BIT
|
||||
\brief RBS BIT C
|
||||
*/
|
||||
#define WPTDM_A_BIT WAN_RBS_SIG_A
|
||||
#define WPTDM_B_BIT WAN_RBS_SIG_B
|
||||
#define WPTDM_C_BIT WAN_RBS_SIG_C
|
||||
#define WPTDM_D_BIT WAN_RBS_SIG_D
|
||||
|
||||
|
||||
/*!
|
||||
\def WP_API_EVENT_RXHOOK_OFF
|
||||
\brief Rx Off Hook indication value
|
||||
\def WP_API_EVENT_RXHOOK_ON
|
||||
\brief Rx ON Hook indication value
|
||||
\def WP_API_EVENT_RXHOOK_FLASH
|
||||
\brief Rx WINK FLASH indication value
|
||||
\def WP_API_EVENT_RXHOOK_DECODE
|
||||
\brief Print out the hook state
|
||||
*/
|
||||
#define WP_API_EVENT_RXHOOK_OFF 0x01
|
||||
#define WP_API_EVENT_RXHOOK_ON 0x02
|
||||
#define WP_API_EVENT_RXHOOK_FLASH 0x03
|
||||
#define WP_API_EVENT_RXHOOK_DECODE(state) \
|
||||
((state) == WP_API_EVENT_RXHOOK_OFF) ? "Off-hook" : \
|
||||
((state) == WP_API_EVENT_RXHOOK_FLASH) ? "Flash" : \
|
||||
((state) == WP_API_EVENT_RXHOOK_ON) ? "On-hook" : \
|
||||
"(Unknown state)"
|
||||
/*!
|
||||
\def WP_API_EVENT_RING_PRESENT
|
||||
\brief Ring Present Value
|
||||
\def WP_API_EVENT_RING_STOP
|
||||
\brief Ring Stop Value
|
||||
\def WP_API_EVENT_RING_DECODE
|
||||
\brief Print out the Ring state
|
||||
*/
|
||||
#define WP_API_EVENT_RING_PRESENT 0x01
|
||||
#define WP_API_EVENT_RING_STOP 0x02
|
||||
#define WP_API_EVENT_RING_DECODE(state) \
|
||||
((state) == WP_API_EVENT_RING_PRESENT) ? "Ring Present" : \
|
||||
((state) == WP_API_EVENT_RING_STOP) ? "Ring Stop" : \
|
||||
"(Unknown state)"
|
||||
|
||||
/*!
|
||||
\def WP_API_EVENT_RING_TRIP_PRESENT
|
||||
\brief Ring Trip Present Value
|
||||
\def WP_API_EVENT_RING_TRIP_STOP
|
||||
\brief Ring Trip Stop Value
|
||||
\def WP_API_EVENT_RING_TRIP_DECODE
|
||||
\brief Print out the Ring Trip state
|
||||
*/
|
||||
#define WP_API_EVENT_RING_TRIP_PRESENT 0x01
|
||||
#define WP_API_EVENT_RING_TRIP_STOP 0x02
|
||||
#define WP_API_EVENT_RING_TRIP_DECODE(state) \
|
||||
((state) == WP_API_EVENT_RING_TRIP_PRESENT) ? "Ring Present" : \
|
||||
((state) == WP_API_EVENT_RING_TRIP_STOP) ? "Ring Stop" : \
|
||||
"(Unknown state)"
|
||||
/*Link Status */
|
||||
/*!
|
||||
\def WP_API_EVENT_LINK_STATUS_CONNECTED
|
||||
\brief Link Connected state value
|
||||
\def WP_API_EVENT_LINK_STATUS_DISCONNECTED
|
||||
\brief Link Disconnected state value
|
||||
\def WP_API_EVENT_LINK_STATUS_DECODE
|
||||
\brief Print out the Link state
|
||||
*/
|
||||
#define WP_API_EVENT_LINK_STATUS_CONNECTED 0x01
|
||||
#define WP_API_EVENT_LINK_STATUS_DISCONNECTED 0x02
|
||||
#define WP_API_EVENT_LINK_STATUS_DECODE(status) \
|
||||
((status) == WP_API_EVENT_LINK_STATUS_CONNECTED) ? "Connected" : \
|
||||
((status) == WP_API_EVENT_LINK_STATUS_DISCONNECTED) ? "Disconnected" : \
|
||||
"Unknown"
|
||||
|
||||
/*Polarity Reversal for FXO */
|
||||
/*!
|
||||
\def WP_API_EVENT_POL_REV_POS_TO_NEG
|
||||
\brief Polarity Reversal Postive to Negative
|
||||
\def WP_API_EVENT_POL_REV_NEG_TO_POS
|
||||
\brief Polarity Reversal Negative to Positive
|
||||
\def WP_API_EVENT_POLARITY_REVERSE_DECODE
|
||||
\brief Print out the Polarity state
|
||||
*/
|
||||
#define WP_API_EVENT_POL_REV_POS_TO_NEG 0x01
|
||||
#define WP_API_EVENT_POL_REV_NEG_TO_POS 0x02
|
||||
#define WP_API_EVENT__POL_REV_NEG_TO_POS WP_API_EVENT_POL_REV_NEG_TO_POS
|
||||
#define WP_API_EVENT_POLARITY_REVERSE_DECODE(polarity_reverse) \
|
||||
((polarity_reverse) == WP_API_EVENT_POL_REV_POS_TO_NEG) ? "+ve to -ve" : \
|
||||
((polarity_reverse) == WP_API_EVENT_POL_REV_NEG_TO_POS) ? "-ve to +ve" : \
|
||||
"Unknown"
|
||||
/*!
|
||||
\def WP_API_EVENT_TONE_DIAL
|
||||
\brief Dial tone value
|
||||
\def WP_API_EVENT_TONE_BUSY
|
||||
\brief Busy tone value
|
||||
\def WP_API_EVENT_TONE_RING
|
||||
\brief Ring tone value
|
||||
\def WP_API_EVENT_TONE_CONGESTION
|
||||
\brief Contestion tone value
|
||||
\def WP_API_EVENT_TONE_DTMF
|
||||
\brief Define tone indicates TONE type DTMF
|
||||
\def WP_API_EVENT_TONE_FAXCALLING
|
||||
\brief Define tone indicates TONE type FAXCALLING
|
||||
\def WP_API_EVENT_TONE_FAXCALLED
|
||||
\brief Define tone indicates TONE type FAXCALLED
|
||||
*/
|
||||
#define WP_API_EVENT_TONE_DIAL 0x01
|
||||
#define WP_API_EVENT_TONE_BUSY 0x02
|
||||
#define WP_API_EVENT_TONE_RING 0x03
|
||||
#define WP_API_EVENT_TONE_CONGESTION 0x04
|
||||
#define WP_API_EVENT_TONE_DTMF 0x05
|
||||
#define WP_API_EVENT_TONE_FAXCALLING 0x06
|
||||
#define WP_API_EVENT_TONE_FAXCALLED 0x07
|
||||
|
||||
/* BRI channels list */
|
||||
/*!
|
||||
\def WAN_BRI_BCHAN1
|
||||
\brief BRI Channel 1
|
||||
\def WAN_BRI_BCHAN2
|
||||
\brief BRI Channel 2
|
||||
\def WAN_BRI_DCHAN
|
||||
\brief BRI Dchan Channel
|
||||
*/
|
||||
#define WAN_BRI_BCHAN1 0x01
|
||||
#define WAN_BRI_BCHAN2 0x02
|
||||
#define WAN_BRI_DCHAN 0x03
|
||||
|
||||
|
||||
/*!
|
||||
\def WP_PORT_NAME_FORM
|
||||
\brief String define of a wanpipe port name
|
||||
|
||||
\def WP_INTERFACE_NAME_FORM
|
||||
\brief String define of a wanpipe interface name
|
||||
*/
|
||||
#define WP_PORT_NAME_FORM "wanpipe%d"
|
||||
#define WP_INTERFACE_NAME_FORM "wanpipe%d_if%d"
|
||||
#define WP_CTRL_DEV_NAME "wanpipe_ctrl"
|
||||
#define WP_CONFIG_DEV_NAME "wanpipe"
|
||||
#define WP_TIMER_DEV_NAME_FORM "wanpipe_timer%d"
|
||||
#define WP_LOGGER_DEV_NAME "wanpipe_logger"
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
|
||||
/*!
|
||||
\struct wanpipe_chan_stats
|
||||
\brief TDM API channel statistics
|
||||
|
||||
\typedef wanpipe_chan_stats_t
|
||||
*/
|
||||
typedef struct wanpipe_chan_stats
|
||||
{
|
||||
unsigned int rx_packets; /* total packets received */
|
||||
unsigned int tx_packets; /* total packets transmitted */
|
||||
unsigned int rx_bytes; /* total bytes received */
|
||||
unsigned int tx_bytes; /* total bytes transmitted */
|
||||
|
||||
unsigned int rx_errors; /* total counter of receiver errors. see 'detailed rx_errors' */
|
||||
unsigned int tx_errors; /* total counter of transmitter errors. see 'detailed tx_errors' */
|
||||
|
||||
unsigned int rx_dropped; /* Counter of dropped received packets.
|
||||
* Possible cause: internal driver error, check Driver Message Log. */
|
||||
unsigned int tx_dropped; /* Counter of dropped transmit packets.
|
||||
* Possible cause: internal driver error, check Driver Message Log. */
|
||||
unsigned int multicast; /* Linux Network Interface: multicast packets received */
|
||||
unsigned int collisions; /* Linux Network Interface: eth collisions counter */
|
||||
|
||||
/* detailed rx_errors: */
|
||||
unsigned int rx_length_errors; /* Received HDLC frame is longer than the MRU.
|
||||
* Usualy means "no closing HDLC flag". */
|
||||
unsigned int rx_over_errors; /* Receiver ring buff overflow at driver level (not at hardware) */
|
||||
unsigned int rx_crc_errors; /* Received HDLC frame with CRC error.
|
||||
* Possible cause: bit errors on the line. */
|
||||
unsigned int rx_frame_errors; /* Received HDLC frame alignment error */
|
||||
unsigned int rx_fifo_errors; /* Receiver FIFO overrun at hardware level.
|
||||
* Possible cause: driver was too slow to re-program Rx DMA. */
|
||||
unsigned int rx_missed_errors; /* deprecated */
|
||||
|
||||
/* detailed tx_errors */
|
||||
unsigned int tx_aborted_errors; /* deprecated. The same as tx_fifo_errors. */
|
||||
unsigned int tx_carrier_errors; /* counter of times transmitter was not in operational state */
|
||||
|
||||
unsigned int tx_fifo_errors; /* Transmitter FIFO overrun at hardware level.
|
||||
* Possible cause: driver was too slow to re-program Tx DMA. */
|
||||
unsigned int tx_heartbeat_errors;/* deprecated */
|
||||
unsigned int tx_window_errors; /* deprecated */
|
||||
|
||||
unsigned int tx_idle_packets; /* Counter of Idle Tx Data transmissions.
|
||||
* Occurs in Voice/BitStream mode.
|
||||
* Cause: User application supplies data too slowly. */
|
||||
|
||||
unsigned int errors; /* Total of ALL errors. */
|
||||
|
||||
/* current state of transmitter queue */
|
||||
unsigned int current_number_of_frames_in_tx_queue;
|
||||
unsigned int max_tx_queue_length;
|
||||
|
||||
/* current state of receiver queue */
|
||||
unsigned int current_number_of_frames_in_rx_queue;
|
||||
unsigned int max_rx_queue_length;
|
||||
|
||||
/* current state of Event queue */
|
||||
unsigned int max_event_queue_length;
|
||||
unsigned int current_number_of_events_in_event_queue;
|
||||
|
||||
unsigned int rx_events; /* Total counter of all API Events. (On/Off Hook, DTMF, Ring...)*/
|
||||
unsigned int rx_events_dropped; /* Counter of discarded events due to Rx Event queue being full.
|
||||
* Possible cause: application too slow to "read" the events.*/
|
||||
unsigned int rx_events_tone; /* Counter of Tone Events, such as DTMF. */
|
||||
|
||||
/* HDLC-level abort condition */
|
||||
unsigned int rx_hdlc_abort_counter; /* HDLC-level abort is considered an error by Sangoma HDLC engine.
|
||||
* But, since it is a part of HDLC standard, an application may choose to ignore it. */
|
||||
|
||||
}wanpipe_chan_stats_t;
|
||||
|
||||
|
||||
#define WP_AFT_CHAN_ERROR_STATS(chan_stats,var) chan_stats.var++;chan_stats.errors++
|
||||
|
||||
#define WP_AFT_RX_ERROR_SUM(chan_stats) chan_stats.rx_errors+ \
|
||||
chan_stats.rx_dropped+ \
|
||||
chan_stats.rx_length_errors + \
|
||||
chan_stats.rx_crc_errors + \
|
||||
chan_stats.rx_frame_errors + \
|
||||
chan_stats.rx_fifo_errors + \
|
||||
chan_stats.rx_missed_errors + \
|
||||
chan_stats.rx_hdlc_abort_counter
|
||||
|
||||
#define WP_AFT_TX_ERROR_SUM(chan_stats) chan_stats.tx_errors+ \
|
||||
chan_stats.tx_dropped + \
|
||||
chan_stats.tx_aborted_errors + \
|
||||
chan_stats.tx_carrier_errors + \
|
||||
chan_stats.tx_fifo_errors+ \
|
||||
chan_stats.tx_heartbeat_errors + \
|
||||
chan_stats.tx_window_errors
|
||||
|
||||
typedef struct _DRIVER_VERSION {
|
||||
unsigned int major;
|
||||
unsigned int minor;
|
||||
unsigned int minor1;
|
||||
unsigned int minor2;
|
||||
}wan_driver_version_t, DRIVER_VERSION, *PDRIVER_VERSION;
|
||||
|
||||
#define WANPIPE_API_CMD_SZ 512
|
||||
#define WANPIPE_API_DEV_CFG_MAX_SZ 337
|
||||
|
||||
/* The the union size is max-cmd-result-span-chan-data_len */
|
||||
#define WANPIPE_API_CMD_SZ_UNION WANPIPE_API_CMD_SZ - (sizeof(unsigned int)*3) - (sizeof(unsigned char)*2)
|
||||
|
||||
|
||||
/* Each time you add a parameter to the wanpipe_api_dev_cfg_t you must update
|
||||
WANPIPE_API_CMD_RESERVED_SZ as well as WANPIPE_API_DEV_CFG_SZ */
|
||||
|
||||
/* rxflashtime hw_ec,hw_fax,loop */
|
||||
#define WANPIPE_API_CMD_RESERVED_SZ 128 - sizeof(int)*1 - sizeof(char)*3
|
||||
|
||||
/* The sizeof WANPIPE_API_DEV_CFG_SZ must account for every variable in
|
||||
wanpipe_api_dev_cfg_t strcture */
|
||||
|
||||
/* 20 int 4 chars */
|
||||
#define WANPIPE_API_DEV_CFG_SZ sizeof(int)*20 + sizeof(char)*4 + WANPIPE_API_CMD_RESERVED_SZ + sizeof(wanpipe_chan_stats_t)
|
||||
|
||||
|
||||
/*!
|
||||
\struct wanpipe_api_dev_cfg
|
||||
\brief TDM API Device Configuration Structure
|
||||
|
||||
Contains the configuration of a wanpipe api device.
|
||||
This configuration should only be used for CHAN operation mode.
|
||||
|
||||
\typedef wanpipe_api_dev_cfg_t
|
||||
*/
|
||||
typedef struct wanpipe_api_dev_cfg
|
||||
{
|
||||
unsigned int hw_tdm_coding; /* Set/Get HW TDM coding: uLaw muLaw */
|
||||
unsigned int hw_mtu_mru; /* Set/Get HW TDM MTU/MRU */
|
||||
unsigned int usr_period; /* Set/Get User Period in ms */
|
||||
unsigned int tdm_codec; /* Set/Get TDM Codec: SLinear */
|
||||
unsigned int power_level; /* Set/Get Power level treshold */
|
||||
unsigned int rx_disable; /* Enable/Disable Rx */
|
||||
unsigned int tx_disable; /* Enable/Disable Tx */
|
||||
unsigned int usr_mtu_mru; /* Set/Get User TDM MTU/MRU */
|
||||
unsigned int ec_tap; /* Echo Cancellation Tap */
|
||||
unsigned int rbs_poll; /* Enable/Disable RBS Polling */
|
||||
unsigned int rbs_rx_bits; /* Rx RBS Bits */
|
||||
unsigned int rbs_tx_bits; /* Tx RBS Bits */
|
||||
unsigned int hdlc; /* HDLC based device */
|
||||
unsigned int idle_flag; /* IDLE flag to Tx */
|
||||
unsigned int fe_alarms; /* FE Alarms detected */
|
||||
unsigned char fe_status; /* FE status - Connected or Disconnected */
|
||||
unsigned int hw_dtmf; /* HW DTMF enabled */
|
||||
unsigned int open_cnt; /* Open cnt */
|
||||
unsigned int rx_queue_sz;
|
||||
unsigned int tx_queue_sz;
|
||||
/* Any new paramets should decrement the reserved size */
|
||||
unsigned int rxflashtime; /* Set Rxflash time for Wink-Flash */
|
||||
unsigned char hw_ec;
|
||||
unsigned char hw_fax;
|
||||
unsigned char loop;
|
||||
|
||||
unsigned char reserved[WANPIPE_API_CMD_RESERVED_SZ];
|
||||
/* Duplicate the structure below */
|
||||
wanpipe_chan_stats_t stats; /* TDM Statistics */
|
||||
}wanpipe_api_dev_cfg_t;
|
||||
|
||||
|
||||
/*!
|
||||
\struct wanpipe_api_cmd
|
||||
\brief Wanpipe API Device Command Structure used with WANPIPE_IOCTL_API_CMD
|
||||
|
||||
Wanpipe API Commands structure used to execute WANPIPE_IOCTL_API_CMD iocl commands
|
||||
All commands are defined in:
|
||||
enum wanpipe_api_cmds
|
||||
enum wanpipe_api_events
|
||||
|
||||
\typedef wanpipe_api_cmd_t
|
||||
*/
|
||||
typedef struct wanpipe_api_cmd
|
||||
{
|
||||
unsigned int cmd; /*!< Command defined in enum wanpipe_api_cmds */
|
||||
unsigned int result; /*!< Result defined in: enum SANG_STATUS or SANG_STATUS_t */
|
||||
unsigned char span; /*!< span value, integer 1 to 255 */
|
||||
unsigned char chan; /*!< chan value, integer 1 to 32 */
|
||||
|
||||
union {
|
||||
struct {
|
||||
unsigned int hw_tdm_coding; /*!< Set/Get HW TDM coding: uLaw muLaw */
|
||||
unsigned int hw_mtu_mru; /*!< Set/Get HW TDM MTU/MRU */
|
||||
unsigned int usr_period; /*!< Set/Get User Period in ms */
|
||||
unsigned int tdm_codec; /*!< Set/Get TDM Codec: SLinear */
|
||||
unsigned int power_level; /*!< Set/Get Power level treshold */
|
||||
unsigned int rx_disable; /*!< Enable/Disable Rx */
|
||||
unsigned int tx_disable; /*!< Enable/Disable Tx */
|
||||
unsigned int usr_mtu_mru; /*!< Set/Get User TDM MTU/MRU */
|
||||
unsigned int ec_tap; /*!< Echo Cancellation Tap */
|
||||
unsigned int rbs_poll; /*!< Enable/Disable RBS Polling */
|
||||
unsigned int rbs_rx_bits; /*!< Rx RBS Bits */
|
||||
unsigned int rbs_tx_bits; /*!< Tx RBS Bits */
|
||||
unsigned int hdlc; /*!< HDLC based device */
|
||||
unsigned int idle_flag; /*!< IDLE flag to Tx */
|
||||
unsigned int fe_alarms; /*!< FE Alarms detected */
|
||||
unsigned char fe_status; /*!< FE status - Connected or Disconnected */
|
||||
unsigned int hw_dtmf; /*!< HW DTMF enabled */
|
||||
unsigned int open_cnt; /*!< Open cnt */
|
||||
unsigned int rx_queue_sz; /*!< Rx queue size */
|
||||
unsigned int tx_queue_sz; /*!< Tx queue size */
|
||||
/* Any new paramets should decrement the reserved size */
|
||||
unsigned int rxflashtime; /*!< Set Rxflash time for Wink-Flash */
|
||||
unsigned char hw_ec;
|
||||
unsigned char hw_fax;
|
||||
unsigned char loop;
|
||||
|
||||
unsigned char reserved[WANPIPE_API_CMD_RESERVED_SZ];
|
||||
wanpipe_chan_stats_t stats; /*!< Wanpipe API Statistics */
|
||||
};
|
||||
wp_api_event_t event; /*!< Wanpipe API Event */
|
||||
wan_driver_version_t version;
|
||||
wan_iovec_list_t iovec_list;
|
||||
wan_api_ss7_cfg_status_t ss7_cfg_status;
|
||||
struct {
|
||||
unsigned char data[WANPIPE_API_CMD_SZ_UNION];
|
||||
unsigned int data_len;
|
||||
};
|
||||
};
|
||||
}wanpipe_api_cmd_t;
|
||||
|
||||
/* \brief Initialize 'span' in wanpipe_api_cmd_t */
|
||||
#define WANPIPE_API_CMD_INIT_SPAN(wp_cmd_ptr, span_no) ((wp_cmd_ptr)->span = (unsigned char)span_no)
|
||||
|
||||
/* \brief Initialize 'channel' in wanpipe_api_cmd_t */
|
||||
#define WANPIPE_API_CMD_INIT_CHAN(wp_cmd_ptr, chan_no) ((wp_cmd_ptr)->chan = (unsigned char)chan_no)
|
||||
|
||||
/*!
|
||||
\struct wanpipe_api_callbacks
|
||||
\brief Wanpipe API Callback Structure
|
||||
|
||||
\typedef wanpipe_api_callbacks_t
|
||||
*/
|
||||
typedef struct wanpipe_api_callbacks
|
||||
{
|
||||
int (*wp_rbs_event)(sng_fd_t fd, unsigned char rbs_bits);
|
||||
int (*wp_dtmf_event)(sng_fd_t fd, unsigned char dtmf, unsigned char type, unsigned char port);
|
||||
int (*wp_rxhook_event)(sng_fd_t fd, unsigned char hook_state);
|
||||
int (*wp_ring_detect_event)(sng_fd_t fd, unsigned char ring_state);
|
||||
int (*wp_ring_trip_detect_event)(sng_fd_t fd, unsigned char ring_state);
|
||||
int (*wp_fe_alarm_event)(sng_fd_t fd, unsigned int fe_alarm_event);
|
||||
int (*wp_link_status_event)(sng_fd_t fd, unsigned int link_status_event);
|
||||
}wanpipe_api_callbacks_t;
|
||||
|
||||
/*!
|
||||
\struct wanpipe_api
|
||||
\brief Wanpipe API Command Structure
|
||||
|
||||
The Wanpipe API Command structure is used to execute
|
||||
enum wanpipe_api_events
|
||||
enum wanpipe_api_cmds
|
||||
|
||||
\typedef wanpipe_api_t
|
||||
*/
|
||||
typedef struct wanpipe_api
|
||||
{
|
||||
wanpipe_api_cmd_t wp_cmd; /*!< Contains API command info */
|
||||
wanpipe_api_callbacks_t wp_callback; /*!< Deprecated: Callbacks used by libsangoma */
|
||||
}wanpipe_api_t;
|
||||
|
||||
/* \brief Initialize 'span' in wanpipe_api_t->wp_cmd */
|
||||
#define WANPIPE_API_INIT_SPAN(wanpipe_api_ptr, span_no) WANPIPE_API_CMD_INIT_SPAN(&wanpipe_api_ptr->wp_cmd, span_no)
|
||||
|
||||
/* \brief Initialize 'channel' in wanpipe_api_t->wp_cmd */
|
||||
#define WANPIPE_API_INIT_CHAN(wanpipe_api_ptr, chan_no) WANPIPE_API_CMD_INIT_CHAN(&wanpipe_api_ptr->wp_cmd, chan_no)
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
/***************************************************//**
|
||||
*******************************************************/
|
||||
|
||||
#endif
|
|
@ -0,0 +1,316 @@
|
|||
/******************************************************************************//**
|
||||
* \file wanpipe_api_legacy.h
|
||||
* \brief WANPIPE(tm) Driver Legacy API
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
* David Rokhvarg <davidr@sangoma.com>
|
||||
* Alex Feldman <alex@sangoma.com>
|
||||
*
|
||||
* Copyright (c) 2007 - 08, Sangoma Technologies
|
||||
* All rights reserved.
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of the Sangoma Technologies nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Sangoma Technologies ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Sangoma Technologies BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* ===============================================================================
|
||||
*/
|
||||
|
||||
#ifndef __WANPIPE_API_LEGACY__
|
||||
#define __WANPIPE_API_LEGACY__
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
|
||||
/****************************************************************//**
|
||||
* WANPIPE LEGACY API Structure
|
||||
*******************************************************************/
|
||||
|
||||
|
||||
#define WAN_API_MAX_DATA 4096
|
||||
typedef struct{
|
||||
unsigned char pktType;
|
||||
unsigned short length;
|
||||
unsigned char result;
|
||||
union {
|
||||
struct {
|
||||
unsigned char arg1;
|
||||
unsigned short time_stamp;
|
||||
} chdlc;
|
||||
struct {
|
||||
unsigned char attr;
|
||||
unsigned short time_stamp;
|
||||
} fr;
|
||||
struct {
|
||||
unsigned char qdm;
|
||||
unsigned char cause;
|
||||
unsigned char diagn;
|
||||
unsigned short lcn;
|
||||
} x25;
|
||||
struct {
|
||||
unsigned char station;
|
||||
unsigned char PF_bit;
|
||||
unsigned short poll_interval;
|
||||
unsigned char general_mailbox_byte;
|
||||
}sdlc;
|
||||
struct {
|
||||
unsigned char exception;
|
||||
}xdlc;
|
||||
} wan_protocol;
|
||||
#define wan_apihdr_chdlc_error_flag wan_protocol.chdlc.arg1
|
||||
#define wan_apihdr_chdlc_attr wan_protocol.chdlc.arg1
|
||||
#define wan_apihdr_chdlc_time_stamp wan_protocol.chdlc.time_stamp
|
||||
#define wan_apihdr_fr_attr wan_protocol.fr.attr
|
||||
#define wan_apihdr_fr_time_stamp wan_protocol.fr.time_stamp
|
||||
#define wan_apihdr_x25_qdm wan_protocol.x25.qdm
|
||||
#define wan_apihdr_x25_cause wan_protocol.x25.cause
|
||||
#define wan_apihdr_x25_diagn wan_protocol.x25.diagn
|
||||
#define wan_apihdr_x25_lcn wan_protocol.x25.lcn
|
||||
|
||||
#define wan_apihdr_sdlc_station wan_protocol.sdlc.station
|
||||
#define wan_apihdr_sdlc_pf wan_protocol.sdlc.PF_bit
|
||||
#define wan_apihdr_sdlc_poll_interval wan_protocol.sdlc.poll_interval
|
||||
#define wan_apihdr_sdlc_general_mb_byte wan_protocol.sdlc.general_mailbox_byte
|
||||
|
||||
#define wan_apihdr_xdlc_exception wan_protocol.xdlc.exception
|
||||
} wan_api_hdr_t;
|
||||
|
||||
typedef struct{
|
||||
wan_api_hdr_t api_hdr;
|
||||
unsigned char data[WAN_API_MAX_DATA];
|
||||
#define wan_api_pktType api_hdr.pktType
|
||||
#define wan_api_length api_hdr.length
|
||||
#define wan_api_result api_hdr.result
|
||||
#define wan_api_chdlc_error_flag api_hdr.wan_apihdr_chdlc_error_flag
|
||||
#define wan_api_chdlc_time_stamp api_hdr.wan_apihdr_chdlc_time_stamp
|
||||
#define wan_api_chdlc_attr api_hdr.wan_apihdr_chdlc_attr
|
||||
#define wan_api_chdlc_misc_Tx_bits api_hdr.wan_apihdr_chdlc_misc_Tx_bits
|
||||
#define wan_api_fr_attr api_hdr.wan_apihdr_fr_attr
|
||||
#define wan_api_fr_time_stamp api_hdr.wan_apihdr_fr_time_stamp
|
||||
#define wan_api_x25_qdm api_hdr.wan_apihdr_x25_qdm
|
||||
#define wan_api_x25_cause api_hdr.wan_apihdr_x25_cause
|
||||
#define wan_api_x25_diagn api_hdr.wan_apihdr_x25_diagn
|
||||
#define wan_api_x25_lcn api_hdr.wan_apihdr_x25_lcn
|
||||
#define wan_api_sdlc_station api_hdr.wan_apihdr_sdlc_station
|
||||
#define wan_api_sdlc_pf api_hdr.wan_apihdr_sdlc_pf
|
||||
#define wan_api_sdlc_poll_interval api_hdr.wan_apihdr_sdlc_poll_interval
|
||||
#define wan_api_sdlc_general_mb_byte api_hdr.wan_apihdr_sdlc_general_mb_byte
|
||||
#define wan_api_xdlc_exception api_hdr.wan_apihdr_xdlc_exception
|
||||
} wan_api_t;
|
||||
|
||||
|
||||
#define WAN_MAX_DATA_SIZE 5000
|
||||
#define MAX_LGTH_UDP_MGNT_PKT WAN_MAX_DATA_SIZE
|
||||
|
||||
#define WAN_MAILBOX_SIZE 16
|
||||
#define WAN_MAX_POS_DATA_SIZE 1030
|
||||
#define WAN_MAX_MBOX_DATA_SIZE 2032
|
||||
|
||||
#define WAN_MAX_CMD_DATA_SIZE 990
|
||||
|
||||
/*!
|
||||
\struct wan_cmd_api_
|
||||
\brief Wanpipe UDP CMD Structure
|
||||
|
||||
\typedef wan_cmd_api_t
|
||||
*/
|
||||
typedef struct wan_cmd_api_
|
||||
{
|
||||
unsigned int cmd;
|
||||
unsigned short len;
|
||||
unsigned char bar;
|
||||
unsigned int offset;
|
||||
int ret; /* return value */
|
||||
unsigned char data[WAN_MAX_CMD_DATA_SIZE];
|
||||
} wan_cmd_api_t;
|
||||
|
||||
|
||||
|
||||
|
||||
/*!
|
||||
\struct wan_cmd
|
||||
\brief Wanpipe Legacy Command Structure
|
||||
|
||||
This structure is used as part of the wan_udp_hdr_t strcutre.
|
||||
Its used to hold the command and return return_code
|
||||
|
||||
\typedef wan_cmd_t
|
||||
*/
|
||||
typedef struct wan_cmd {
|
||||
union {
|
||||
struct {
|
||||
unsigned char opp_flag; /*!< Used by legacy S514 cards as cmd complete flag */
|
||||
unsigned char command; /*!< Wanpipemon Command: enum WANPIPE_IOCTL_PIPEMON_CMDS */
|
||||
unsigned short data_len; /*!< Length of the data/result buffer */
|
||||
unsigned char return_code; /*!< Result 0=OK otherwise Error */
|
||||
union {
|
||||
struct {
|
||||
unsigned char PF_bit; /* the HDLC P/F bit */
|
||||
} hdlc;
|
||||
struct {
|
||||
unsigned short dlci; /* DLCI number */
|
||||
unsigned char attr; /* FECN, BECN, DE and C/R bits */
|
||||
unsigned short rxlost1; /* frames discarded at int. level */
|
||||
unsigned int rxlost2; /* frames discarded at app. level */
|
||||
} fr;
|
||||
struct {
|
||||
unsigned char pf; /* P/F bit */
|
||||
unsigned short lcn; /* logical channel */
|
||||
unsigned char qdm; /* Q/D/M bits */
|
||||
unsigned char cause; /* cause field */
|
||||
unsigned char diagn; /* diagnostics */
|
||||
unsigned char pktType; /* packet type */
|
||||
} x25;
|
||||
struct {
|
||||
unsigned char misc_Tx_Rx_bits; /* miscellaneous transmit and receive bits */
|
||||
unsigned char Rx_error_bits; /* an indication of a block received with an error */
|
||||
unsigned short Rx_time_stamp; /* a millisecond receive time stamp */
|
||||
unsigned char port; /* comm port */
|
||||
} bscstrm;
|
||||
struct {
|
||||
unsigned char misc_tx_rx_bits;
|
||||
unsigned short heading_length;
|
||||
unsigned short notify;
|
||||
unsigned char station;
|
||||
unsigned char poll_address;
|
||||
unsigned char select_address;
|
||||
unsigned char device_address;
|
||||
unsigned char notify_extended;
|
||||
} bsc;
|
||||
struct {
|
||||
unsigned char sdlc_address;
|
||||
unsigned char PF_bit;
|
||||
unsigned short poll_interval;
|
||||
unsigned char general_mailbox_byte;
|
||||
} sdlc;
|
||||
struct {
|
||||
unsigned char force;
|
||||
} fe;
|
||||
} wan_protocol;
|
||||
} wan_p_cmd;
|
||||
struct {
|
||||
unsigned char opp_flag;
|
||||
unsigned char pos_state;
|
||||
unsigned char async_state;
|
||||
} wan_pos_cmd;
|
||||
unsigned char mbox[WAN_MAILBOX_SIZE];
|
||||
} wan_cmd_u;
|
||||
#define wan_cmd_opp_flag wan_cmd_u.wan_p_cmd.opp_flag
|
||||
#define wan_cmd_command wan_cmd_u.wan_p_cmd.command
|
||||
#define wan_cmd_data_len wan_cmd_u.wan_p_cmd.data_len
|
||||
#define wan_cmd_return_code wan_cmd_u.wan_p_cmd.return_code
|
||||
#define wan_cmd_hdlc_PF_bit wan_cmd_u.wan_p_cmd.wan_protocol.hdlc.PF_bit
|
||||
#define wan_cmd_fe_force wan_cmd_u.wan_p_cmd.wan_protocol.fe.force
|
||||
#define wan_cmd_fr_dlci wan_cmd_u.wan_p_cmd.wan_protocol.fr.dlci
|
||||
#define wan_cmd_fr_attr wan_cmd_u.wan_p_cmd.wan_protocol.fr.attr
|
||||
#define wan_cmd_fr_rxlost1 wan_cmd_u.wan_p_cmd.wan_protocol.fr.rxlost1
|
||||
#define wan_cmd_fr_rxlost2 wan_cmd_u.wan_p_cmd.wan_protocol.fr.rxlost2
|
||||
#define wan_cmd_x25_pf wan_cmd_u.wan_p_cmd.wan_protocol.x25.pf
|
||||
#define wan_cmd_x25_lcn wan_cmd_u.wan_p_cmd.wan_protocol.x25.lcn
|
||||
#define wan_cmd_x25_qdm wan_cmd_u.wan_p_cmd.wan_protocol.x25.qdm
|
||||
#define wan_cmd_x25_cause wan_cmd_u.wan_p_cmd.wan_protocol.x25.cause
|
||||
#define wan_cmd_x25_diagn wan_cmd_u.wan_p_cmd.wan_protocol.x25.diagn
|
||||
#define wan_cmd_x25_pktType wan_cmd_u.wan_p_cmd.wan_protocol.x25.pktType
|
||||
#define wan_cmd_bscstrm_misc_bits wan_cmd_u.wan_p_cmd.wan_protocol.bscstrm.misc_Tx_Rx_bits
|
||||
#define wan_cmd_bscstrm_Rx_err_bits wan_cmd_u.wan_p_cmd.wan_protocol.bscstrm.Rx_error_bits
|
||||
#define wan_cmd_bscstrm_Rx_time_stamp wan_cmd_u.wan_p_cmd.wan_protocol.bscstrm.Rx_time_stamp
|
||||
#define wan_cmd_bscstrm_port wan_cmd_u.wan_p_cmd.wan_protocol.bscstrm.port
|
||||
#define wan_cmd_bsc_misc_bits wan_cmd_u.wan_p_cmd.wan_protocol.bsc.misc_tx_rx_bits
|
||||
#define wan_cmd_bsc_heading_len wan_cmd_u.wan_p_cmd.wan_protocol.bsc.heading_length
|
||||
#define wan_cmd_bsc_notify wan_cmd_u.wan_p_cmd.wan_protocol.bsc.notify
|
||||
#define wan_cmd_bsc_station wan_cmd_u.wan_p_cmd.wan_protocol.bsc.station
|
||||
#define wan_cmd_bsc_poll_addr wan_cmd_u.wan_p_cmd.wan_protocol.bsc.poll_address
|
||||
#define wan_cmd_bsc_select_addr wan_cmd_u.wan_p_cmd.wan_protocol.bsc.select_address
|
||||
#define wan_cmd_bsc_device_addr wan_cmd_u.wan_p_cmd.wan_protocol.bsc.device_address
|
||||
#define wan_cmd_bsc_notify_ext wan_cmd_u.wan_p_cmd.wan_protocol.bsc.notify_extended
|
||||
#define wan_cmd_sdlc_address wan_cmd_u.wan_p_cmd.wan_protocol.sdlc.sdlc_address
|
||||
#define wan_cmd_sdlc_pf wan_cmd_u.wan_p_cmd.wan_protocol.sdlc.PF_bit
|
||||
#define wan_cmd_sdlc_poll_interval wan_cmd_u.wan_p_cmd.wan_protocol.sdlc.poll_interval
|
||||
#define wan_cmd_sdlc_general_mb_byte wan_cmd_u.wan_p_cmd.wan_protocol.sdlc.general_mailbox_byte
|
||||
|
||||
#define wan_cmd_pos_opp_flag wan_cmd_u.wan_pos_cmd.opp_flag
|
||||
#define wan_cmd_pos_pos_state wan_cmd_u.wan_pos_cmd.pos_state
|
||||
#define wan_cmd_pos_async_state wan_cmd_u.wan_pos_cmd.async_state
|
||||
} wan_cmd_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
wan_cmd_t wan_cmd;
|
||||
union {
|
||||
struct {
|
||||
unsigned char command;
|
||||
unsigned short data_len;
|
||||
unsigned char return_code;
|
||||
unsigned char port_num;
|
||||
unsigned char attr;
|
||||
unsigned char reserved[10];
|
||||
unsigned char data[WAN_MAX_POS_DATA_SIZE];
|
||||
} pos_data;
|
||||
unsigned char data[WAN_MAX_MBOX_DATA_SIZE];
|
||||
} wan_u_data;
|
||||
#define wan_opp_flag wan_cmd.wan_cmd_opp_flag
|
||||
#define wan_command wan_cmd.wan_cmd_command
|
||||
#define wan_data_len wan_cmd.wan_cmd_data_len
|
||||
#define wan_return_code wan_cmd.wan_cmd_return_code
|
||||
#define wan_hdlc_PF_bit wan_cmd.wan_cmd_hdlc_PF_bit
|
||||
#define wan_fr_dlci wan_cmd.wan_cmd_fr_dlci
|
||||
#define wan_fr_attr wan_cmd.wan_cmd_fr_attr
|
||||
#define wan_fr_rxlost1 wan_cmd.wan_cmd_fr_rxlost1
|
||||
#define wan_fr_rxlost2 wan_cmd.wan_cmd_fr_rxlost2
|
||||
#define wan_x25_pf wan_cmd.wan_cmd_x25_pf
|
||||
#define wan_x25_lcn wan_cmd.wan_cmd_x25_lcn
|
||||
#define wan_x25_qdm wan_cmd.wan_cmd_x25_qdm
|
||||
#define wan_x25_cause wan_cmd.wan_cmd_x25_cause
|
||||
#define wan_x25_diagn wan_cmd.wan_cmd_x25_diagn
|
||||
#define wan_x25_pktType wan_cmd.wan_cmd_x25_pktType
|
||||
#define wan_bscstrm_misc_bits wan_cmd.wan_cmd_bscstrm_misc_bits
|
||||
#define wan_bscstrm_Rx_err_bits wan_cmd.wan_cmd_bscstrm_Rx_error_bits
|
||||
#define wan_bscstrm_Rx_time_stamp wan_cmd.wan_cmd_bscstrm_Rx_time_stamp
|
||||
#define wan_bscstrm_port wan_cmd.wan_cmd_bscstrm_port
|
||||
#define wan_bsc_misc_bits wan_cmd.wan_cmd_bsc_misc_bits
|
||||
#define wan_bsc_heading_len wan_cmd.wan_cmd_bsc_heading_length
|
||||
#define wan_bsc_notify wan_cmd.wan_cmd_bsc_notify
|
||||
#define wan_bsc_station wan_cmd.wan_cmd_bsc_station
|
||||
#define wan_bsc_poll_addr wan_cmd.wan_cmd_bsc_poll_address
|
||||
#define wan_bsc_select_addr wan_cmd.wan_cmd_bsc_select_address
|
||||
#define wan_bsc_device_addr wan_cmd.wan_cmd_bsc_device_address
|
||||
#define wan_bsc_notify_ext wan_cmd.wan_cmd_bsc_notify_extended
|
||||
#define wan_sdlc_address wan_cmd.wan_cmd_sdlc_address
|
||||
#define wan_sdlc_pf wan_cmd.wan_cmd_sdlc_pf
|
||||
#define wan_sdlc_poll_interval wan_cmd.wan_cmd_sdlc_poll_interval
|
||||
#define wan_sdlc_general_mb_byte wan_cmd.wan_cmd_sdlc_general_mb_byte
|
||||
#define wan_data wan_u_data.data
|
||||
|
||||
#define wan_pos_opp_flag wan_cmd.wan_cmd_pos_opp_flag
|
||||
#define wan_pos_pos_state wan_cmd.wan_cmd_pos_pos_state
|
||||
#define wan_pos_async_state wan_cmd.wan_cmd_pos_async_state
|
||||
#define wan_pos_command wan_u_data.pos_data.command
|
||||
#define wan_pos_data_len wan_u_data.pos_data.data_len
|
||||
#define wan_pos_return_code wan_u_data.pos_data.return_code
|
||||
#define wan_pos_port_num wan_u_data.pos_data.port_num
|
||||
#define wan_pos_attr wan_u_data.pos_data.attr
|
||||
#define wan_pos_data wan_u_data.pos_data.data
|
||||
} wan_mbox_t;
|
||||
|
||||
#define WAN_MBOX_INIT(mbox) memset(mbox, 0, sizeof(wan_cmd_t));
|
||||
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* __WANPIPE_API_LEGACY__ */
|
|
@ -0,0 +1,50 @@
|
|||
/*****************************************************************************
|
||||
* sdla_atm_iface.c WANPIPE(tm) ATM ALL5 SAR Interface Header
|
||||
*
|
||||
* Authors: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 2003 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
* Jan 07, 2003 Nenad Corbic Based on ADSL ATM SAR
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
#ifndef _SDLA_ATM_IFACE_H
|
||||
#define _SDLA_ATM_IFACE_H
|
||||
|
||||
#include "wanpipe_cfg.h"
|
||||
|
||||
extern int wp_sar_register_device (void *card,
|
||||
unsigned char *devname,
|
||||
void **atm_device_ptr,
|
||||
void *rx_data_list,
|
||||
void *tx_data_list,
|
||||
void *trace_info);
|
||||
|
||||
extern void wp_sar_unregister_device(void *atm_device);
|
||||
|
||||
extern int wp_sar_register_pvc(void *atm_device,
|
||||
void **pAdapter_ptr,
|
||||
void **tx_cells_skb,
|
||||
void *chan,
|
||||
void *devname,
|
||||
void *dev,
|
||||
wan_atm_conf_if_t *atm_cfg,
|
||||
unsigned int mtu);
|
||||
|
||||
extern void wp_sar_unregister_pvc(void *atm_device, void *pAdapter, void *tx_skb);
|
||||
extern int wanpipe_sar_rx (void *atm_device, void *rx_cell_block);
|
||||
extern int wanpipe_sar_tx (void *pAdapter, void* tx_skb, void **tx_cell_skb);
|
||||
|
||||
extern int wanpipe_sar_poll(void *pAdapter, int timeout);
|
||||
|
||||
extern int wanpipe_get_atm_state (void *pAdapter);
|
||||
extern int wanpipe_set_atm_state (void *pAdapter, int state);
|
||||
|
||||
|
||||
#endif
|
|
@ -0,0 +1,178 @@
|
|||
/* wanpipe_cdev_iface.h */
|
||||
|
||||
#ifndef __WANPIPE_CDEV_IFACE__
|
||||
#define __WANPIPE_CDEV_IFACE__
|
||||
|
||||
|
||||
|
||||
#include "wanpipe_includes.h"
|
||||
#include "wanpipe_defines.h"
|
||||
#include "wanpipe_debug.h"
|
||||
#include "wanpipe_common.h"
|
||||
#include "wanpipe_cfg.h"
|
||||
#include "wanpipe.h"
|
||||
#include "wanpipe_api.h"
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
typedef struct wanpipe_cdev_ops
|
||||
{
|
||||
int (*open)(void* dev_ptr);
|
||||
int (*close)(void* dev_ptr);
|
||||
int (*ioctl)(void* dev_ptr, int cmd, void *arg);
|
||||
|
||||
u_int32_t (*poll)(void *dev_ptr);
|
||||
|
||||
// int (*write)(void* dev_ptr, u_int8_t *hdr, u_int32_t hdr_len, u_int8_t *data, u_int32_t data_len);
|
||||
// int (*read)(void* dev_ptr, u_int8_t *hdr, u_int32_t hdr_len, u_int8_t *data, u_int32_t data_len);
|
||||
|
||||
int (*write)(void* dev_ptr, netskb_t *skb, wp_api_hdr_t *hdr);
|
||||
int (*read)(void* dev_ptr, netskb_t **skb, wp_api_hdr_t *hdr, int count);
|
||||
|
||||
/* handle transmission time out */
|
||||
int (*tx_timeout)(void* dev_ptr);
|
||||
|
||||
}wanpipe_cdev_ops_t;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
#if defined(__WINDOWS__)
|
||||
typedef struct file_operations
|
||||
{
|
||||
int (*open)(void *inode, void *file);
|
||||
int (*wp_cdev_release)(void *inode, void *file);
|
||||
int (*ioctl)(void *inode, void *file, unsigned int cmd, unsigned long data);
|
||||
int (*read)(void *file, char *usrbuf, size_t count, void *ppos);
|
||||
int (*write)(void *file, const char *usrbuf, size_t count, void *ppos);
|
||||
int (*poll)(void *file, void *wait_table);
|
||||
|
||||
}file_operations_t;
|
||||
#endif
|
||||
*/
|
||||
|
||||
enum WP_TDM_OPMODE{
|
||||
WP_TDM_OPMODE_CHAN = 0,
|
||||
WP_TDM_OPMODE_SPAN,
|
||||
WP_TDM_OPMODE_MTP1
|
||||
};
|
||||
|
||||
enum {
|
||||
WP_TDM_API_MODE_CURRENT = 0,
|
||||
WP_TDM_API_MODE_LEGACY_WIN_API
|
||||
};
|
||||
|
||||
#define CDEV_WIN_LEGACY_MODE(cdev) (cdev->operation_mode==WP_TDM_API_MODE_LEGACY_WIN_API)
|
||||
|
||||
typedef struct wanpipe_cdev
|
||||
{
|
||||
wan_bitmap_t init;
|
||||
wan_bitmap_t used;
|
||||
|
||||
int32_t span;
|
||||
int32_t chan;
|
||||
u_int8_t name[WAN_IFNAME_SZ+1];
|
||||
|
||||
void *dev_ptr;
|
||||
wanpipe_cdev_ops_t ops;
|
||||
|
||||
u8 operation_mode;/* WP_TDM_OPMODE */
|
||||
|
||||
wan_timer_t tx_timeout_timer;
|
||||
|
||||
/* Private to cdev code - Do not use*/
|
||||
void *priv;
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
void *PnpFdoPdx;
|
||||
#endif
|
||||
|
||||
} wanpipe_cdev_t;
|
||||
|
||||
|
||||
|
||||
#if defined (__LINUX__) && defined(__KERNEL__)
|
||||
|
||||
typedef struct wanpipe_cdev_priv
|
||||
{
|
||||
int dev_minor;
|
||||
spinlock_t lock;
|
||||
wait_queue_head_t poll_wait;
|
||||
|
||||
}wanpipe_cdev_priv_t;
|
||||
|
||||
# define CPRIV(dev) ((wanpipe_cdev_priv_t*)(dev->priv))
|
||||
|
||||
static __inline int wanpipe_cdev_rx_wake(wanpipe_cdev_t *cdev)
|
||||
{
|
||||
if (!cdev || !CPRIV(cdev)) {
|
||||
DEBUG_EVENT("%s(): Error cdev->dev_ptr not initialized!\n",__FUNCTION__);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (waitqueue_active(&CPRIV(cdev)->poll_wait)){
|
||||
wake_up_interruptible(&CPRIV(cdev)->poll_wait);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static __inline int wanpipe_cdev_tx_wake(wanpipe_cdev_t *cdev)
|
||||
{
|
||||
if (!cdev || !CPRIV(cdev)) {
|
||||
DEBUG_EVENT("%s(): Error cdev->dev_ptr not initialized!\n",__FUNCTION__);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (waitqueue_active(&CPRIV(cdev)->poll_wait)){
|
||||
wake_up_interruptible(&CPRIV(cdev)->poll_wait);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static __inline int wanpipe_cdev_event_wake(wanpipe_cdev_t *cdev)
|
||||
{
|
||||
if (!cdev || !CPRIV(cdev)) {
|
||||
DEBUG_EVENT("%s(): Error cdev->dev_ptr not initialized!\n",__FUNCTION__);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (waitqueue_active(&CPRIV(cdev)->poll_wait)){
|
||||
wake_up_interruptible(&CPRIV(cdev)->poll_wait);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
int wanpipe_cdev_tx_wake(wanpipe_cdev_t *cdev);
|
||||
int wanpipe_cdev_rx_wake(wanpipe_cdev_t *cdev);
|
||||
int wanpipe_cdev_event_wake(wanpipe_cdev_t *cdev);
|
||||
#endif
|
||||
|
||||
/*=================================================
|
||||
* Public Interface Functions
|
||||
*================================================*/
|
||||
int wanpipe_global_cdev_init(void);
|
||||
int wanpipe_global_cdev_free(void);
|
||||
|
||||
int wanpipe_cdev_tdm_create(wanpipe_cdev_t *cdev);
|
||||
int wanpipe_cdev_free(wanpipe_cdev_t *cdev);
|
||||
int wanpipe_cdev_lip_api_create(wanpipe_cdev_t *cdev);
|
||||
|
||||
|
||||
int wanpipe_cdev_tdm_ctrl_create(wanpipe_cdev_t *cdev);
|
||||
int wanpipe_cdev_cfg_ctrl_create(wanpipe_cdev_t *cdev);
|
||||
int wanpipe_cdev_timer_create(wanpipe_cdev_t *cdev);
|
||||
int wanpipe_cdev_logger_create(wanpipe_cdev_t *cdev);
|
||||
|
||||
int wp_ctrl_dev_create(void);
|
||||
void wp_ctrl_dev_delete(void);
|
||||
|
||||
int wanpipe_sys_dev_add(struct device *dev, struct device *parent, char *name);
|
||||
void wanpipe_sys_dev_del(struct device *dev);
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,79 @@
|
|||
/*************************************************************************
|
||||
* wanpipe_cfg_adsl.h *
|
||||
* *
|
||||
* WANPIPE(tm) Wanpipe ADSL Interface configuration *
|
||||
* *
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com> *
|
||||
*========================================================================*
|
||||
* Aug 27, 2008 Alex Feldman Initial version *
|
||||
* *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_CFG_ADSL_H__
|
||||
# define __WANPIPE_CFG_ADSL_H__
|
||||
|
||||
/* DSL interface types */
|
||||
#define WAN_INTERFACE 0
|
||||
#define LAN_INTERFACE 1
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
typedef struct wan_adsl_vcivpi
|
||||
{
|
||||
unsigned short vci;
|
||||
unsigned char vpi;
|
||||
} wan_adsl_vcivpi_t;
|
||||
|
||||
|
||||
typedef struct wan_adsl_conf
|
||||
{
|
||||
#if 1
|
||||
unsigned char EncapMode;
|
||||
unsigned short Vci;
|
||||
unsigned short Vpi;
|
||||
#else
|
||||
unsigned char interface;
|
||||
unsigned char Rfc1483Mode;
|
||||
unsigned short Rfc1483Vci;
|
||||
unsigned short Rfc1483Vpi;
|
||||
unsigned char Rfc2364Mode;
|
||||
unsigned short Rfc2364Vci;
|
||||
unsigned short Rfc2364Vpi;
|
||||
#endif
|
||||
unsigned char Verbose;
|
||||
unsigned short RxBufferCount;
|
||||
unsigned short TxBufferCount;
|
||||
|
||||
unsigned short Standard;
|
||||
unsigned short Trellis;
|
||||
unsigned short TxPowerAtten;
|
||||
unsigned short CodingGain;
|
||||
unsigned short MaxBitsPerBin;
|
||||
unsigned short TxStartBin;
|
||||
unsigned short TxEndBin;
|
||||
unsigned short RxStartBin;
|
||||
unsigned short RxEndBin;
|
||||
unsigned short RxBinAdjust;
|
||||
unsigned short FramingStruct;
|
||||
unsigned short ExpandedExchange;
|
||||
unsigned short ClockType;
|
||||
unsigned short MaxDownRate;
|
||||
|
||||
unsigned char atm_autocfg;
|
||||
unsigned short vcivpi_num;
|
||||
wan_adsl_vcivpi_t vcivpi_list[100];
|
||||
unsigned char tty_minor;
|
||||
unsigned short mtu;
|
||||
|
||||
unsigned char atm_watchdog;
|
||||
/* Number of cells received on each interrupt. Recommended values: 5 - 40.
|
||||
Higher values for higher line speeds.
|
||||
|
||||
*/
|
||||
unsigned short RxCellCount;
|
||||
|
||||
}wan_adsl_conf_t;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* __WANPIPE_CFG_ADSL_H__ */
|
|
@ -0,0 +1,63 @@
|
|||
/*************************************************************************
|
||||
* wanpipe_cfg_atm.h *
|
||||
* *
|
||||
* WANPIPE(tm) Wanpipe ATM Interface configuration *
|
||||
* *
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com> *
|
||||
*========================================================================*
|
||||
* Aug 27, 2008 Alex Feldman Initial version *
|
||||
* *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_CFG_ATM_H__
|
||||
# define __WANPIPE_CFG_ATM_H__
|
||||
|
||||
#define ATM_CELL_SIZE 53
|
||||
|
||||
enum {
|
||||
ATM_CONNECTED,
|
||||
ATM_DISCONNECTED,
|
||||
ATM_AIS
|
||||
};
|
||||
|
||||
typedef struct atm_stats {
|
||||
unsigned int rx_valid;
|
||||
unsigned int rx_empty;
|
||||
unsigned int rx_invalid_atm_hdr;
|
||||
unsigned int rx_invalid_prot_hdr;
|
||||
unsigned int rx_atm_pdu_size;
|
||||
unsigned int rx_chip;
|
||||
unsigned int tx_valid;
|
||||
unsigned int tx_chip;
|
||||
unsigned int rx_congestion;
|
||||
unsigned int rx_clp;
|
||||
} atm_stats_t;
|
||||
|
||||
typedef struct wan_atm_conf_if
|
||||
{
|
||||
unsigned char encap_mode;
|
||||
unsigned short vci;
|
||||
unsigned short vpi;
|
||||
|
||||
unsigned char atm_oam_loopback;
|
||||
unsigned char atm_oam_loopback_intr;
|
||||
unsigned char atm_oam_continuity;
|
||||
unsigned char atm_oam_continuity_intr;
|
||||
unsigned char atm_arp;
|
||||
unsigned char atm_arp_intr;
|
||||
|
||||
unsigned short mtu;
|
||||
|
||||
unsigned char atm_sync_mode;
|
||||
unsigned short atm_sync_data;
|
||||
unsigned char atm_sync_offset;
|
||||
unsigned short atm_hunt_timer;
|
||||
|
||||
unsigned char atm_cell_cfg;
|
||||
unsigned char atm_cell_pt;
|
||||
unsigned char atm_cell_clp;
|
||||
unsigned char atm_cell_payload;
|
||||
|
||||
}wan_atm_conf_if_t;
|
||||
|
||||
#endif /* __WANPIPE_CFG_ATM_H__ */
|
|
@ -0,0 +1,245 @@
|
|||
/*************************************************************************
|
||||
* wanpipe_cfg_def.h *
|
||||
* *
|
||||
* WANPIPE(tm) Wanpipe Global configuration defines *
|
||||
* *
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com> *
|
||||
*=======================================================================*
|
||||
* Aug 27, 2008 Alex Feldman Initial version *
|
||||
* *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_CFG_DEF_H__
|
||||
# define __WANPIPE_CFG_DEF_H__
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
#define WAN_IFNAME_SZ 128 /* max length of the interface name */
|
||||
#else
|
||||
#define WAN_IFNAME_SZ 15 /* max length of the interface name */
|
||||
#endif
|
||||
|
||||
#define WAN_DRVNAME_SZ WAN_IFNAME_SZ /* max length of the link driver name */
|
||||
#define WAN_ADDRESS_SZ 31 /* max length of the WAN media address */
|
||||
|
||||
|
||||
typedef enum {
|
||||
RFC_MODE_BRIDGED_ETH_LLC = 0,
|
||||
RFC_MODE_BRIDGED_ETH_VC = 1,
|
||||
RFC_MODE_ROUTED_IP_LLC = 2,
|
||||
RFC_MODE_ROUTED_IP_VC = 3,
|
||||
RFC_MODE_RFC1577_ENCAP = 4,
|
||||
RFC_MODE_PPP_LLC = 5,
|
||||
RFC_MODE_PPP_VC = 6,
|
||||
RFC_MODE_STACK_VC = 7
|
||||
} RFC_MODE;
|
||||
|
||||
/* 'state' defines */
|
||||
enum wan_states
|
||||
{
|
||||
WAN_UNCONFIGURED, /* link/channel is not configured */
|
||||
WAN_DISCONNECTED, /* link/channel is disconnected */
|
||||
WAN_CONNECTING, /* connection is in progress */
|
||||
WAN_CONNECTED, /* link/channel is operational */
|
||||
WAN_LIMIT, /* for verification only */
|
||||
WAN_DUALPORT, /* for Dual Port cards */
|
||||
WAN_DISCONNECTING,
|
||||
WAN_FT1_READY /* FT1 Configurator Ready */
|
||||
};
|
||||
|
||||
enum {
|
||||
WAN_LOCAL_IP,
|
||||
WAN_POINTOPOINT_IP,
|
||||
WAN_NETMASK_IP,
|
||||
WAN_BROADCAST_IP
|
||||
};
|
||||
|
||||
/* Defines for UDP PACKET TYPE */
|
||||
#define UDP_PTPIPE_TYPE 0x01
|
||||
#define UDP_FPIPE_TYPE 0x02
|
||||
#define UDP_CPIPE_TYPE 0x03
|
||||
#define UDP_DRVSTATS_TYPE 0x04
|
||||
#define UDP_INVALID_TYPE 0x05
|
||||
|
||||
#define UDPMGMT_UDP_PROTOCOL 0x11
|
||||
|
||||
/* Command return code */
|
||||
#define WAN_CMD_OK 0 /* normal firmware return code */
|
||||
#define WAN_CMD_TIMEOUT 0xFF /* firmware command timed out */
|
||||
/* FIXME: Remove these 2 defines (use WAN_x) */
|
||||
#define CMD_OK 0 /* normal firmware return code */
|
||||
#define CMD_TIMEOUT 0xFF /* firmware command timed out */
|
||||
|
||||
/* UDP Packet Management */
|
||||
#define UDP_PKT_FRM_STACK 0x00
|
||||
#define UDP_PKT_FRM_NETWORK 0x01
|
||||
|
||||
#define WAN_UDP_FAILED_CMD 0xCF
|
||||
#define WAN_UDP_INVALID_CMD 0xCE
|
||||
#define WAN_UDP_TIMEOUT_CMD 0xAA
|
||||
#define WAN_UDP_INVALID_NET_CMD 0xCD
|
||||
|
||||
/* Maximum interrupt test counter */
|
||||
#define MAX_INTR_TEST_COUNTER 100
|
||||
#define MAX_NEW_INTR_TEST_COUNTER 5
|
||||
|
||||
/* Critical Values for RACE conditions*/
|
||||
#define CRITICAL_IN_ISR 0xA1
|
||||
#define CRITICAL_INTR_HANDLED 0xB1
|
||||
|
||||
/* Card Types */
|
||||
#define WANOPT_S50X 1
|
||||
#define WANOPT_S51X 2
|
||||
#define WANOPT_ADSL 3
|
||||
#define WANOPT_AFT 4
|
||||
#define WANOPT_AFT104 5
|
||||
#define WANOPT_AFT300 6
|
||||
#define WANOPT_AFT_ANALOG 7
|
||||
#define WANOPT_AFT108 8
|
||||
#define WANOPT_AFT_X 9
|
||||
#define WANOPT_AFT102 10
|
||||
#define WANOPT_AFT_ISDN 11
|
||||
#define WANOPT_AFT_56K 12
|
||||
#define WANOPT_AFT101 13
|
||||
#define WANOPT_AFT_SERIAL 14
|
||||
#define WANOPT_USB_ANALOG 15
|
||||
#define WANOPT_AFT600 16
|
||||
#define WANOPT_AFT601 17
|
||||
#define WANOPT_AFT_GSM 18
|
||||
#define WANOPT_AFT610 19
|
||||
#define WANOPT_AFT116 20
|
||||
#define WANOPT_T116 21
|
||||
|
||||
/*
|
||||
* Configuration options defines.
|
||||
*/
|
||||
/* general options */
|
||||
#define WANOPT_OFF 0
|
||||
#define WANOPT_ON 1
|
||||
#define WANOPT_NO 0
|
||||
#define WANOPT_YES 1
|
||||
|
||||
#define WANOPT_SIM 2
|
||||
|
||||
/* interface options */
|
||||
#define WANOPT_RS232 0
|
||||
#define WANOPT_V35 1
|
||||
#define WANOPT_X21 3
|
||||
|
||||
/* data encoding options */
|
||||
#define WANOPT_NRZ 0
|
||||
#define WANOPT_NRZI 1
|
||||
#define WANOPT_FM0 2
|
||||
#define WANOPT_FM1 3
|
||||
|
||||
/* line idle option */
|
||||
#define WANOPT_IDLE_FLAG 0
|
||||
#define WANOPT_IDLE_MARK 1
|
||||
|
||||
/* link type options */
|
||||
#define WANOPT_POINTTOPOINT 0 /* RTS always active */
|
||||
#define WANOPT_MULTIDROP 1 /* RTS is active when transmitting */
|
||||
|
||||
/* clocking options */
|
||||
#define WANOPT_EXTERNAL 0
|
||||
#define WANOPT_INTERNAL 1
|
||||
#define WANOPT_RECOVERY 2 /*Uses another oscillator(to be put by hw guys) to */
|
||||
/*generate almost exactly baud rate 64333 and dividor 2*/
|
||||
|
||||
/* station options */
|
||||
#define WANOPT_DTE 0
|
||||
#define WANOPT_DCE 1
|
||||
#define WANOPT_SECONDARY 0
|
||||
#define WANOPT_PRIMARY 1
|
||||
|
||||
/* connection options */
|
||||
#define WANOPT_PERMANENT 0 /* DTR always active */
|
||||
#define WANOPT_SWITCHED 1 /* use DTR to setup link (dial-up) */
|
||||
#define WANOPT_ONDEMAND 2 /* activate DTR only before sending */
|
||||
|
||||
/* ASY Mode Options */
|
||||
#define WANOPT_ONE 1
|
||||
#define WANOPT_TWO 2
|
||||
#define WANOPT_ONE_AND_HALF 3
|
||||
|
||||
#define WANOPT_NONE 0
|
||||
#define WANOPT_ODD 1
|
||||
#define WANOPT_EVEN 2
|
||||
|
||||
/* ATM sync options */
|
||||
#define WANOPT_AUTO 0
|
||||
#define WANOPT_MANUAL 1
|
||||
|
||||
#define WANOPT_DSP_HPAD 0
|
||||
#define WANOPT_DSP_TPAD 1
|
||||
|
||||
|
||||
/* SS7 options */
|
||||
#define WANOPT_SS7_FISU 0
|
||||
#define WANOPT_SS7_LSSU 1
|
||||
|
||||
#define WANOPT_SS7_MODE_128 0
|
||||
#define WANOPT_SS7_MODE_4096 1
|
||||
|
||||
#define WANOPT_SS7_FISU_128_SZ 3
|
||||
#define WANOPT_SS7_FISU_4096_SZ 6
|
||||
|
||||
|
||||
/* CHDLC Protocol Options */
|
||||
/* DF Commmented out for now.
|
||||
|
||||
#define WANOPT_CHDLC_NO_DCD IGNORE_DCD_FOR_LINK_STAT
|
||||
#define WANOPT_CHDLC_NO_CTS IGNORE_CTS_FOR_LINK_STAT
|
||||
#define WANOPT_CHDLC_NO_KEEPALIVE IGNORE_KPALV_FOR_LINK_STAT
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* SS7 options */
|
||||
#define WANOPT_SS7_ANSI 1
|
||||
#define WANOPT_SS7_ITU 2
|
||||
#define WANOPT_SS7_NTT 3
|
||||
|
||||
|
||||
/* Port options */
|
||||
#define WANOPT_PRI 0
|
||||
#define WANOPT_SEC 1
|
||||
/* read mode */
|
||||
#define WANOPT_INTR 0
|
||||
#define WANOPT_POLL 1
|
||||
|
||||
|
||||
#define WANOPT_TTY_SYNC 0
|
||||
#define WANOPT_TTY_ASYNC 1
|
||||
|
||||
/* RBS Signalling Options */
|
||||
#define WAN_RBS_SIG_A 0x01
|
||||
#define WAN_RBS_SIG_B 0x02
|
||||
#define WAN_RBS_SIG_C 0x04
|
||||
#define WAN_RBS_SIG_D 0x08
|
||||
|
||||
/* Front End Ref Clock Options */
|
||||
|
||||
#define WANOPT_FE_OSC_CLOCK 0x00
|
||||
#define WANOPT_FE_LINE_CLOCK 0x01
|
||||
|
||||
#define WANOPT_NETWORK_SYNC_OUT 0x00
|
||||
#define WANOPT_NETWORK_SYNC_IN 0x01
|
||||
|
||||
#define WAN_CLK_OUT_OSC 0x03
|
||||
#define WAN_CLK_OUT_LINE 0x04
|
||||
|
||||
#define WAN_CLK_IN_8000HZ 0x05
|
||||
#define WAN_CLK_IN_2000HZ 0x06
|
||||
#define WAN_CLK_IN_1500HZ 0x07
|
||||
|
||||
#define WANOPT_HW_PORT_MAP_DEFAULT 0
|
||||
#define WANOPT_HW_PORT_MAP_LINEAR 1
|
||||
|
||||
|
||||
enum {
|
||||
WANOPT_OCT_CHAN_OPERMODE_NORMAL,
|
||||
WANOPT_OCT_CHAN_OPERMODE_SPEECH,
|
||||
WANOPT_OCT_CHAN_OPERMODE_NO_ECHO,
|
||||
};
|
||||
|
||||
#endif /* __WANPIPE_CFG_DEF_H__ */
|
|
@ -0,0 +1,73 @@
|
|||
/*************************************************************************
|
||||
* wanpipe_cfg_fr.h *
|
||||
* *
|
||||
* WANPIPE(tm) Wanpipe Frame Relay Interface configuration *
|
||||
* *
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com> *
|
||||
*========================================================================*
|
||||
* Aug 27, 2008 Alex Feldman Initial version *
|
||||
* *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_CFG_FR_H__
|
||||
# define __WANPIPE_CFG_FR_H__
|
||||
|
||||
/* frame relay in-channel signalling */
|
||||
#define WANOPT_FR_AUTO_SIG 0 /* Automatically find singalling */
|
||||
#define WANOPT_FR_ANSI 1 /* ANSI T1.617 Annex D */
|
||||
#define WANOPT_FR_Q933 2 /* ITU Q.933A */
|
||||
#define WANOPT_FR_LMI 3 /* LMI */
|
||||
#define WANOPT_FR_NO_LMI 4 /* NO LMI */
|
||||
|
||||
#define WANOPT_FR_EEK_OFF 0 /* Frame Relay EEK Disabled */
|
||||
#define WANOPT_FR_EEK_REQUEST 1 /* Frame Relay EEK Request Mode */
|
||||
#define WANOPT_FR_EEK_REPLY 2 /* Frame Relay EEK Reply Mode */
|
||||
|
||||
#define WANOPT_CPE 0
|
||||
#define WANOPT_NODE 1
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Frame relay specific link-level configuration.
|
||||
*/
|
||||
|
||||
#ifndef MAX_NUMBER_OF_PROTOCOL_INTERFACES
|
||||
#define MAX_NUMBER_OF_PROTOCOL_INTERFACES 100
|
||||
#endif
|
||||
|
||||
# define DLCI_LIST_LEN MAX_NUMBER_OF_PROTOCOL_INTERFACES
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
typedef struct wan_fr_conf
|
||||
{
|
||||
unsigned int signalling; /* local in-channel signalling type */
|
||||
unsigned int t391; /* link integrity verification timer */
|
||||
unsigned int t392; /* polling verification timer */
|
||||
unsigned int n391; /* full status polling cycle counter */
|
||||
unsigned int n392; /* error threshold counter */
|
||||
unsigned int n393; /* monitored events counter */
|
||||
unsigned int dlci_num; /* number of DLCs (access node) */
|
||||
unsigned int dlci[DLCI_LIST_LEN];/* List of all DLCIs */
|
||||
unsigned char issue_fs_on_startup;
|
||||
unsigned char station; /* Node or CPE */
|
||||
unsigned int eek_cfg; /* EEK Request Reply Mode */
|
||||
unsigned int eek_timer; /* EEK Request Reply Timer */
|
||||
unsigned char auto_dlci; /* 1 - yes, 0 - no */
|
||||
} wan_fr_conf_t;
|
||||
|
||||
/* used by wanpipemon to get DLCI status */
|
||||
#define DLCI_NAME_LEN 20
|
||||
typedef struct wan_lip_fr_dlci
|
||||
{
|
||||
unsigned short dlci;
|
||||
unsigned int dlci_type;
|
||||
unsigned char dlci_state;
|
||||
unsigned char name[20];
|
||||
unsigned int down;
|
||||
unsigned char type;
|
||||
} wan_fr_dlci_t;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* __WANPIPE_CFG_FR_H__ */
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*************************************************************************
|
||||
* wanpipe_cfg_hdlc.h *
|
||||
* *
|
||||
* WANPIPE(tm) Wanpipe HDLC Interface configuration *
|
||||
* *
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com> *
|
||||
*========================================================================*
|
||||
* Aug 27, 2008 Alex Feldman Initial version *
|
||||
* *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_CFG_HDLC_H__
|
||||
# define __WANPIPE_CFG_HDLC_H__
|
||||
|
||||
|
||||
typedef struct wan_lip_hdlc_if_conf
|
||||
{
|
||||
/* IMPLEMENT USER CONFIG OPTIONS HERE */
|
||||
unsigned char seven_bit_hdlc;
|
||||
unsigned char rx_crc_bytes;
|
||||
unsigned char lineidle;
|
||||
|
||||
}wan_lip_hdlc_if_conf_t;
|
||||
|
||||
#endif /* __WANPIPE_CFG_HDLC_H__ */
|
|
@ -0,0 +1,49 @@
|
|||
/*************************************************************************
|
||||
* wanpipe_cfg_lip.h *
|
||||
* *
|
||||
* WANPIPE(tm) Wanpipe LIP Interface configuration *
|
||||
* *
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com> *
|
||||
*========================================================================*
|
||||
* Aug 27, 2008 Alex Feldman Initial version *
|
||||
* *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_CFG_LIP_H__
|
||||
# define __WANPIPE_CFG_LIP_H__
|
||||
|
||||
|
||||
enum {
|
||||
WPLIP_RAW,
|
||||
WPLIP_IP,
|
||||
WPLIP_IPV6,
|
||||
WPLIP_IPX,
|
||||
WPLIP_FR_ARP,
|
||||
WPLIP_PPP,
|
||||
WPLIP_FR,
|
||||
WPLIP_ETH,
|
||||
WPLIP_LAPD
|
||||
};
|
||||
|
||||
|
||||
typedef struct wplip_prot_reg
|
||||
{
|
||||
int (*prot_set_state) (void *, int, unsigned char *, int);
|
||||
int (*chan_set_state) (void *, int, unsigned char *, int);
|
||||
int (*tx_link_down) (void *, void *);
|
||||
int (*tx_chan_down) (void *, void *);
|
||||
int (*rx_up) (void *, void *, int type);
|
||||
unsigned int (*get_ipv4_addr)(void *, int type);
|
||||
int (*set_ipv4_addr)(void *,
|
||||
unsigned int,
|
||||
unsigned int,
|
||||
unsigned int,
|
||||
unsigned int);
|
||||
int (*kick_task) (void *);
|
||||
#if 0
|
||||
int (*set_hw_idle_frame) (void *, unsigned char *, int);
|
||||
#endif
|
||||
int mtu;
|
||||
} wplip_prot_reg_t;
|
||||
|
||||
#endif /* __WANPIPE_CFG_LIP_H__ */
|
|
@ -0,0 +1,49 @@
|
|||
/*************************************************************************
|
||||
* wanpipe_cfg_sppp.h *
|
||||
* *
|
||||
* WANPIPE(tm) Wanpipe SPPP Interface configuration *
|
||||
* *
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com> *
|
||||
*========================================================================*
|
||||
* Aug 27, 2008 Alex Feldman Initial version *
|
||||
* *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_CFG_SPPP_H__
|
||||
# define __WANPIPE_CFG_SPPP_H__
|
||||
|
||||
#define WAN_AUTHNAMELEN 64
|
||||
|
||||
/* PPP IP Mode Options */
|
||||
#define WANOPT_PPP_STATIC 0
|
||||
#define WANOPT_PPP_HOST 1
|
||||
#define WANOPT_PPP_PEER 2
|
||||
|
||||
/* used by both PPP and CHDLC in LIP layer */
|
||||
typedef struct sppp_parms_struct {
|
||||
|
||||
unsigned char dynamic_ip;/* Static/Host/Peer (the same as ip_mode) */
|
||||
unsigned int local_ip;
|
||||
unsigned int remote_ip;
|
||||
|
||||
unsigned int pp_auth_timer;
|
||||
unsigned int sppp_keepalive_timer;/* if 0, ignore keepalive for link status */
|
||||
unsigned int pp_timer;
|
||||
|
||||
unsigned char pap;
|
||||
unsigned char chap;
|
||||
unsigned char userid[WAN_AUTHNAMELEN];
|
||||
unsigned char passwd[WAN_AUTHNAMELEN];
|
||||
#define SYSTEM_NAME_LEN 31
|
||||
unsigned char sysname[SYSTEM_NAME_LEN];
|
||||
|
||||
unsigned int gateway;
|
||||
unsigned char ppp_prot;
|
||||
|
||||
/* CHDLC */
|
||||
unsigned int keepalive_err_margin;
|
||||
unsigned char disable_magic;
|
||||
}wan_sppp_if_conf_t;
|
||||
|
||||
|
||||
#endif /* __WANPIPE_CFG_SPPP_H__ */
|
|
@ -0,0 +1,72 @@
|
|||
/**************************************************************************
|
||||
* wanpipe_codec.h WANPIPE(tm) Multiprotocol WAN Link Driver.
|
||||
* TDM voice board configuration.
|
||||
*
|
||||
* Author: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2005 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
******************************************************************************
|
||||
*/
|
||||
/*
|
||||
******************************************************************************
|
||||
INCLUDE FILES
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __WANPIPE_CODEC_H_
|
||||
#define __WANPIPE_CODEC_H_
|
||||
|
||||
|
||||
#include "wanpipe_codec_iface.h"
|
||||
|
||||
|
||||
#ifdef CONFIG_PRODUCT_WANPIPE_CODEC_SLINEAR_LAW
|
||||
|
||||
/*! The A-law alternate mark inversion mask */
|
||||
#define G711_ALAW_AMI_MASK 0x55
|
||||
/*! Bias for u-law encoding from linear. */
|
||||
#define G711_ULAW_BIAS 0x84
|
||||
|
||||
extern int wanpipe_codec_law_init(void);
|
||||
|
||||
extern int wanpipe_codec_convert_s_2_alaw(u16 *data,
|
||||
int len,
|
||||
u8 *buf,
|
||||
u8 *gain,
|
||||
u8 user);
|
||||
|
||||
extern int wanpipe_codec_convert_s_2_ulaw(u16 *data,
|
||||
int len,
|
||||
u8 *buf,
|
||||
u8 *gain,
|
||||
u8 user);
|
||||
|
||||
extern int wanpipe_codec_convert_alaw_2_s(u8 *data,
|
||||
int len,
|
||||
u16 *buf,
|
||||
u32 *power_ptr,
|
||||
u8 *gain,
|
||||
u8 user);
|
||||
|
||||
extern int wanpipe_codec_convert_ulaw_2_s(u8 *data,
|
||||
int len,
|
||||
u16 *buf,
|
||||
u32 *power_ptr,
|
||||
u8 *gain,
|
||||
u8 user);
|
||||
|
||||
extern int wanpipe_codec_get_mtu_law_2_s(u32 mtu);
|
||||
extern int wanpipe_codec_get_mtu_s_2_law(u32 mtu);
|
||||
|
||||
extern int wanpipe_codec_get_alaw_to_linear(u8 alaw);
|
||||
extern int wanpipe_codec_get_ulaw_to_linear(u8 ulaw);
|
||||
|
||||
#endif /*CONFIG_PRODUCT_WANPIPE_CODEC_SLINEAR_LAW*/
|
||||
|
||||
|
||||
#endif /*__WANPIPE_CODEC_H_*/
|
|
@ -0,0 +1,102 @@
|
|||
/**************************************************************************
|
||||
* wanpipe_codec_iface.h
|
||||
* WANPIPE(tm) Multiprotocol WAN Link Driver.
|
||||
* TDM voice board configuration.
|
||||
*
|
||||
* Author: Nenad Corbic <ncorbic@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2005 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
******************************************************************************
|
||||
*/
|
||||
/*
|
||||
******************************************************************************
|
||||
INCLUDE FILES
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __WANPIPE_CODEC_IFACE_
|
||||
#define __WANPIPE_CODEC_IFACE_
|
||||
|
||||
#define WP_TDM_HW_CODING_MAX 4
|
||||
#define WP_TDM_CODEC_MAX 10
|
||||
|
||||
enum wan_codec_source_format{
|
||||
WP_MULAW,
|
||||
WP_ALAW,
|
||||
WP_LIN16
|
||||
};
|
||||
|
||||
#define WP_CODEC_FORMAT_DECODE(codec) \
|
||||
codec == WP_MULAW ? "WP_MULAW" : \
|
||||
codec == WP_ALAW ? "WP_ALAW" : \
|
||||
codec == WP_LIN16 ? "WP_LIN16" : \
|
||||
"Invalid Codec"
|
||||
|
||||
#if 0
|
||||
enum wan_codec_format{
|
||||
WP_NONE,
|
||||
WP_SLINEAR
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
typedef struct {
|
||||
int init;
|
||||
int (*encode)(u8 *data,
|
||||
int len,
|
||||
u16 *buf,
|
||||
u32 *power_ptr,
|
||||
u8* gain,
|
||||
u8 user);
|
||||
|
||||
int (*decode)(u16 *data,
|
||||
int len,
|
||||
u8 *buf,
|
||||
u8 *gain,
|
||||
u8 user);
|
||||
}wanpipe_codec_ops_t;
|
||||
|
||||
|
||||
|
||||
static __inline int wanpipe_codec_calc_new_mtu(u32 codec, u32 mtu)
|
||||
{
|
||||
if (codec >= WP_TDM_CODEC_MAX){
|
||||
DEBUG_EVENT("%s:%d Critical: Invalid Codec \n",
|
||||
__FUNCTION__,__LINE__);
|
||||
return mtu;
|
||||
}
|
||||
|
||||
switch (codec){
|
||||
|
||||
case WP_SLINEAR:
|
||||
mtu*=2;
|
||||
break;
|
||||
|
||||
default:
|
||||
/* If no codec is specified
|
||||
* there is no MTU multiple */
|
||||
break;
|
||||
}
|
||||
|
||||
return mtu;
|
||||
}
|
||||
|
||||
|
||||
extern int wanpipe_codec_init(void);
|
||||
extern int wanpipe_codec_free(void);
|
||||
|
||||
extern wanpipe_codec_ops_t *WANPIPE_CODEC_OPS[WP_TDM_HW_CODING_MAX][WP_TDM_CODEC_MAX];
|
||||
|
||||
extern int wanpipe_codec_convert_to_linear(u8 pcm_value,u8 codecType);
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,143 @@
|
|||
/******************************************************************************
|
||||
* sdla_tdmv.h
|
||||
*
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2001 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __WANPIPE_DAHDI_ABSTR
|
||||
# define __WANPIPE_DAHDI_ABSTR
|
||||
|
||||
#ifdef __SDLA_TDMV_SRC
|
||||
# define WP_EXTERN
|
||||
#else
|
||||
# define WP_EXTERN extern
|
||||
#endif
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
** DEFINES and MACROS
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
#include "zapcompat.h"
|
||||
#include "wanpipe_cdev_iface.h"
|
||||
|
||||
|
||||
#ifdef DAHDI_27
|
||||
|
||||
# define wp_dahdi_chan_set_rxdisable(chan,val)
|
||||
# define wp_dahdi_chan_rxdisable(chan) 0
|
||||
|
||||
#else
|
||||
|
||||
# define wp_dahdi_chan_set_rxdisable(chan,val) chan->rxdisable=val
|
||||
# define wp_dahdi_chan_rxdisable(chan) chan->rxdisable
|
||||
# define SPANTYPE_DIGITAL_E1 "E1"
|
||||
# define SPANTYPE_DIGITAL_T1 "T1"
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef DAHDI_26
|
||||
|
||||
#define wp_dahdi_create_device(card, wp) __wp_dahdi_create_device(card,&wp->ddev,&wp->dev)
|
||||
static __inline int __wp_dahdi_create_device(sdla_t *card, struct dahdi_device **ddev, struct device *dev)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
int err;
|
||||
|
||||
*ddev = dahdi_create_device();
|
||||
if (!*ddev) {
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
card->hw_iface.getcfg(card->hw, SDLA_PCI_DEV, &pdev);
|
||||
err=wanpipe_sys_dev_add(dev, &pdev->dev, card->devname);
|
||||
if (err) {
|
||||
DEBUG_ERROR("%s: Error Failed to add wanpipe device \n",card->devname);
|
||||
dahdi_free_device(*ddev);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
(*ddev)->manufacturer = kmalloc(WP_DAHDI_MAX_STR_SZ,GFP_KERNEL);
|
||||
(*ddev)->hardware_id = kmalloc(WP_DAHDI_MAX_STR_SZ,GFP_KERNEL);
|
||||
(*ddev)->devicetype = kmalloc(WP_DAHDI_MAX_STR_SZ,GFP_KERNEL);
|
||||
(*ddev)->location = kmalloc(WP_DAHDI_MAX_STR_SZ,GFP_KERNEL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define wp_dahdi_free_device(wp) __wp_dahdi_free_device(wp->ddev, &wp->dev)
|
||||
static __inline int __wp_dahdi_free_device(struct dahdi_device *ddev, struct device *dev)
|
||||
{
|
||||
wanpipe_sys_dev_del(dev);
|
||||
|
||||
kfree(ddev->manufacturer);
|
||||
kfree(ddev->hardware_id);
|
||||
kfree(ddev->devicetype);
|
||||
kfree(ddev->location);
|
||||
dahdi_free_device(ddev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define wp_dahdi_register_device(wp) __wp_dahdi_register_device(wp->ddev, &wp->dev,&wp->span)
|
||||
static __inline int __wp_dahdi_register_device(struct dahdi_device *ddev, struct device *dev, struct dahdi_span *span)
|
||||
{
|
||||
list_add_tail(&span->device_node,
|
||||
&ddev->spans);
|
||||
return dahdi_register_device(ddev, dev);
|
||||
}
|
||||
|
||||
#define wp_dahdi_unregister_device(wp) __wp_dahdi_unregister_device(wp->ddev)
|
||||
static __inline void __wp_dahdi_unregister_device(struct dahdi_device *ddev)
|
||||
{
|
||||
dahdi_unregister_device(ddev);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define wp_dahdi_create_device(card,wp) __wp_dahdi_create_device(card,&wp->span)
|
||||
static __inline int __wp_dahdi_create_device(sdla_t *card, struct zt_span *span)
|
||||
{
|
||||
span->manufacturer = kmalloc(WP_DAHDI_MAX_STR_SZ,GFP_KERNEL);
|
||||
return 0;
|
||||
}
|
||||
#define wp_dahdi_free_device(wp) __wp_dahdi_free_device(&wp->span)
|
||||
static __inline int __wp_dahdi_free_device(struct zt_span *span)
|
||||
{
|
||||
kfree(span->manufacturer);
|
||||
span->manufacturer=NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define wp_dahdi_register_device(wp) __wp_dahdi_register_device(&wp->span)
|
||||
static __inline int __wp_dahdi_register_device(struct zt_span *span)
|
||||
{
|
||||
return zt_register(span, 0);
|
||||
}
|
||||
|
||||
#define wp_dahdi_unregister_device(wp) __wp_dahdi_unregister_device(&wp->span)
|
||||
static __inline void __wp_dahdi_unregister_device(struct zt_span *span)
|
||||
{
|
||||
zt_unregister(span);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#undef WP_EXTERN
|
||||
|
||||
#endif /* __SDLA_VOIP_H */
|
|
@ -0,0 +1,696 @@
|
|||
/*
|
||||
************************************************************************
|
||||
* wanpipe_debug.h WANPIPE(tm) Global definition for Sangoma *
|
||||
* Debugging messages *
|
||||
* *
|
||||
* Authors: Alex Feldman <al.feldman@sangoma.com> *
|
||||
* David Rokhvarg <davidr@sangoma.com> *
|
||||
*======================================================================*
|
||||
* *
|
||||
* September 21 2009 David Rokhvarg *
|
||||
* Added Wanpipe Logger definitions. *
|
||||
* Improved cross-platform macro definitions for driver debugging. *
|
||||
* *
|
||||
* May 10 2002 Alex Feldman *
|
||||
* Initial version *
|
||||
* *
|
||||
************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __WANPIPE_DEBUG_H
|
||||
# define __WANPIPE_DEBUG_H
|
||||
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
#include "wanpipe_logger.h"
|
||||
|
||||
|
||||
/* NC: If the undefs are used here, one cannot
|
||||
use the Makefile to enable them. Code is left
|
||||
here as overview of all available options. Please
|
||||
use the Makefile to enable them on compile time. */
|
||||
|
||||
#if 0
|
||||
#undef WAN_DEBUG_TE1
|
||||
#undef WAN_DEBUG_HWEC
|
||||
#undef WAN_DEBUG_TDMAPI
|
||||
#undef WAN_DEBUG_BRI
|
||||
|
||||
#undef WAN_DEBUG_KERNEL
|
||||
#undef WAN_DEBUG_MOD
|
||||
#undef WAN_DEBUG_CFG
|
||||
#undef WAN_DEBUG_REG
|
||||
#undef WAN_DEBUG_INIT_VAR
|
||||
#undef WAN_DEBUG_IOCTL
|
||||
#undef WAN_DEBUG_CMD
|
||||
#undef WAN_DEBUG_ISR
|
||||
#undef WAN_DEBUG_RX
|
||||
#undef WAN_DEBUG_RX_ERROR
|
||||
#undef WAN_DEBUG_TX
|
||||
#undef WAN_DEBUG_TX_ERROR
|
||||
#undef WAN_DEBUG_TIMER
|
||||
#undef WAN_DEBUG_UDP
|
||||
#undef WAN_DEBUG_56K
|
||||
#undef WAN_DEBUG_A600
|
||||
#undef WAN_DEBUG_PROCFS
|
||||
#undef WAN_DEBUG_TDM_VOICE
|
||||
#undef WAN_DEBUG_TEST
|
||||
#undef WAN_DEBUG_DBG
|
||||
#undef WAN_DEBUG_DMA
|
||||
#undef WAN_DEBUG_SNMP
|
||||
#undef WAN_DEBUG_TE3
|
||||
#undef WAN_DEBUG_RM
|
||||
#undef WAN_DEBUG_FE
|
||||
#undef WAN_DEBUG_NG
|
||||
#undef WAN_DEBUG_MEM
|
||||
#undef WAN_DEBUG_BRI_INIT
|
||||
#undef WAN_DEBUG_USB
|
||||
#undef WAN_DEBUG_FUNC
|
||||
#endif
|
||||
|
||||
|
||||
#define WAN_DEBUG_EVENT /* must be defined for wpabs_debug_event() */
|
||||
|
||||
#define AFT_FUNC_DEBUG()
|
||||
#define WAN_KRN_BREAK_POINT()
|
||||
|
||||
#if defined (__WINDOWS__)
|
||||
extern void OutputLogString(const char *fmt, ...); /* Print to wanpipelog.txt (NOT to Debugger). */
|
||||
# define DEBUG_PRINT(...) OutputLogString(## __VA_ARGS__)
|
||||
# define _DEBUG_PRINT(...) OutputLogString(## __VA_ARGS__)
|
||||
|
||||
# undef WAN_KRN_BREAK_POINT
|
||||
# define WAN_KRN_BREAK_POINT() if(0)DbgBreakPoint()
|
||||
#endif
|
||||
|
||||
#if (defined __FreeBSD__) || (defined __OpenBSD__) || defined(__NetBSD__)
|
||||
# define DEBUG_PRINT(format,msg...) log(LOG_INFO, format, ##msg)
|
||||
# define _DEBUG_PRINT(format,msg...) log(LOG_INFO, format, ##msg)
|
||||
#endif
|
||||
|
||||
#if defined (__LINUX__)
|
||||
# define DEBUG_PRINT(...) printk(KERN_INFO ## __VA_ARGS__)
|
||||
# define _DEBUG_PRINT(...) printk(## __VA_ARGS__)
|
||||
#endif
|
||||
|
||||
#if 1
|
||||
# define DBG_BATTERY_REMOVAL DEBUG_TEST
|
||||
#else
|
||||
# if defined (__WINDOWS__)
|
||||
# define DBG_BATTERY_REMOVAL if(1)DbgPrint
|
||||
# else
|
||||
# define DBG_BATTERY_REMOVAL if(1)DEBUG_EVENT
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined (__WINDOWS__)
|
||||
# define DEBUG_TASKQ if(0)DbgPrint
|
||||
#else
|
||||
# define DEBUG_TASKQ if(0)DEBUG_EVENT
|
||||
#endif
|
||||
|
||||
/*========================================================
|
||||
COMMON CODE
|
||||
*========================================================*/
|
||||
|
||||
#define DEBUG_KERNEL(...)
|
||||
#define DEBUG_MOD(...)
|
||||
#define DEBUG_CFG(...)
|
||||
#define DEBUG_REG(...)
|
||||
#define DEBUG_INIT(...)
|
||||
#define DEBUG_IOCTL(...)
|
||||
#define DEBUG_CMD(...)
|
||||
#define DEBUG_ISR(...)
|
||||
#define DEBUG_RX(...)
|
||||
#define DEBUG_RX_ERR(...)
|
||||
#define DEBUG_TX(...)
|
||||
#define _DEBUG_TX(...)
|
||||
#define DEBUG_TX_ERR(...)
|
||||
#define DEBUG_TIMER(...)
|
||||
#define DEBUG_UDP(...)
|
||||
#define DEBUG_TE3(...)
|
||||
#define DEBUG_56K(...)
|
||||
#define DEBUG_A600(...)
|
||||
#define DEBUG_PROCFS(...)
|
||||
#define DEBUG_TDMV(...)
|
||||
#define DEBUG_TEST(...)
|
||||
#define DEBUG_DBG(...)
|
||||
#define DEBUG_DMA(...)
|
||||
#define DEBUG_SNMP(...)
|
||||
#define DEBUG_RM(...)
|
||||
#define DEBUG_NG(...)
|
||||
#define DEBUG_BRI_INIT(...)
|
||||
#define DEBUG_USB(...)
|
||||
#define _DEBUG_EVENT(...)
|
||||
|
||||
#define DEBUG_ADD_MEM(a)
|
||||
#define DEBUG_SUB_MEM(a)
|
||||
#define WAN_DEBUG_FUNC_START
|
||||
#define WAN_DEBUG_FUNC_END
|
||||
#define WAN_DEBUG_FUNC_LINE
|
||||
|
||||
|
||||
#if 0
|
||||
# undef _DEBUG_EVENT
|
||||
# if 1
|
||||
# define _DEBUG_EVENT(...) _DEBUG_PRINT(...)
|
||||
# else
|
||||
# define _DEBUG_EVENT(format,msg...) _DEBUG_PRINT(format,##msg)
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef WAN_DEBUG_KERNEL
|
||||
# undef DEBUG_KERNEL
|
||||
# define DEBUG_KERNEL(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_MOD
|
||||
# undef DEBUG_MOD
|
||||
# define DEBUG_MOD(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_CFG
|
||||
# undef DEBUG_CFG
|
||||
# define DEBUG_CFG(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_REG
|
||||
# undef DEBUG_REG
|
||||
# define DEBUG_REG(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_INIT_VAR
|
||||
# undef DEBUG_INIT
|
||||
# define DEBUG_INIT(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_IOCTL
|
||||
# undef DEBUG_IOCTL
|
||||
# define DEBUG_IOCTL(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_CMD
|
||||
# undef DEBUG_CMD
|
||||
# define DEBUG_CMD(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_ISR
|
||||
# undef DEBUG_ISR
|
||||
# define DEBUG_ISR(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_RX
|
||||
# undef DEBUG_RX
|
||||
# define DEBUG_RX(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_RX_ERROR
|
||||
# undef DEBUG_RX_ERR
|
||||
# define DEBUG_RX_ERR DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_TX
|
||||
# undef DEBUG_TX
|
||||
# define DEBUG_TX(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
# undef _DEBUG_TX
|
||||
# define _DEBUG_TX(...) _DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_TX_ERROR
|
||||
# undef DEBUG_TX_ERR
|
||||
# define DEBUG_TX_ERR(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_TIMER
|
||||
# undef DEBUG_TIMER
|
||||
# define DEBUG_TIMER(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_UDP
|
||||
# undef DEBUG_UDP
|
||||
# define DEBUG_UDP(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_TE3
|
||||
# undef DEBUG_TE3
|
||||
# define DEBUG_TE3(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_56K
|
||||
# undef DEBUG_56K
|
||||
# define DEBUG_56K(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_A600
|
||||
# undef DEBUG_A600
|
||||
# define DEBUG_A600(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_PROCFS
|
||||
# undef DEBUG_PROCFS
|
||||
# define DEBUG_PROCFS(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_TDM_VOICE
|
||||
# undef DEBUG_TDMV
|
||||
# define DEBUG_TDMV(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_TEST
|
||||
# undef DEBUG_TEST
|
||||
# define DEBUG_TEST(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_DBG
|
||||
# undef DEBUG_DBG
|
||||
# define DEBUG_DBG(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_DMA
|
||||
# undef DEBUG_DMA
|
||||
# define DEBUG_DMA(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_SNMP
|
||||
# undef DEBUG_SNMP
|
||||
# define DEBUG_SNMP(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_RM
|
||||
# undef DEBUG_RM
|
||||
# define DEBUG_RM(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_NG
|
||||
# undef DEBUG_NG
|
||||
# define DEBUG_NG(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_BRI_INIT
|
||||
# undef DEBUG_BRI_INIT
|
||||
# define DEBUG_BRI_INIT(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
#ifdef WAN_DEBUG_USB
|
||||
# undef DEBUG_USB
|
||||
# define DEBUG_USB(...) DEBUG_PRINT(## __VA_ARGS__)
|
||||
#endif
|
||||
|
||||
|
||||
/*=================================================*/
|
||||
/* general Wanpipe Logger macros */
|
||||
#ifdef WP_LOGGER_DISABLE
|
||||
|
||||
/* Debug case in order to check print argument mismatches */
|
||||
#ifdef __LINUX__
|
||||
#warning "WP_LOGGER_DISABLE Enabled"
|
||||
#endif
|
||||
|
||||
#ifdef WAN_DEBUG_EVENT_AS_KERN_DEBUG
|
||||
#define DEBUG_EVENT(format,msg...) printk(KERN_DEBUG format, ##msg)
|
||||
#else
|
||||
#define DEBUG_EVENT(format,msg...) printk(KERN_INFO format, ##msg)
|
||||
#endif
|
||||
#define DEBUG_WARNING(format,msg...) printk(KERN_WARNING format, ##msg)
|
||||
#define DEBUG_ERROR(format,msg...) printk(KERN_ERR format, ##msg)
|
||||
|
||||
#else
|
||||
|
||||
/* Default case */
|
||||
|
||||
#define DEBUG_EVENT(...) \
|
||||
WP_DEBUG(WAN_LOGGER_DEFAULT, SANG_LOGGER_INFORMATION, ## __VA_ARGS__)
|
||||
#define DEBUG_WARNING(...) \
|
||||
WP_DEBUG(WAN_LOGGER_DEFAULT, SANG_LOGGER_WARNING, ## __VA_ARGS__)
|
||||
#define DEBUG_ERROR(...) \
|
||||
WP_DEBUG(WAN_LOGGER_DEFAULT, SANG_LOGGER_ERROR, ## __VA_ARGS__)
|
||||
#endif
|
||||
|
||||
|
||||
/***************************************/
|
||||
/* task-specific Wanpipe Logger macros */
|
||||
|
||||
/* T1/E1 */
|
||||
#define DEBUG_TE1(...) \
|
||||
WP_DEBUG(WAN_LOGGER_TE1, SANG_LOGGER_TE1_DEFAULT, ## __VA_ARGS__)
|
||||
|
||||
/* Hardware Echo Canceller */
|
||||
#define DEBUG_HWEC(...) \
|
||||
WP_DEBUG(WAN_LOGGER_HWEC, SANG_LOGGER_HWEC_DEFAULT, ## __VA_ARGS__)
|
||||
|
||||
/* TDM API */
|
||||
#define DEBUG_TDMAPI(...) \
|
||||
WP_DEBUG(WAN_LOGGER_TDMAPI, SANG_LOGGER_TDMAPI_DEFAULT, ## __VA_ARGS__)
|
||||
|
||||
/* General Front End code */
|
||||
#define DEBUG_FE(...) \
|
||||
WP_DEBUG(WAN_LOGGER_FE, SANG_LOGGER_FE_DEFAULT, ## __VA_ARGS__)
|
||||
|
||||
/* BRI */
|
||||
#define DEBUG_BRI(...) \
|
||||
WP_DEBUG(WAN_LOGGER_BRI, SANG_LOGGER_BRI_DEFAULT, ## __VA_ARGS__)
|
||||
#define DEBUG_HFC_S0_STATES(...) \
|
||||
WP_DEBUG(WAN_LOGGER_BRI, SANG_LOGGER_BRI_HFC_S0_STATES, ## __VA_ARGS__)
|
||||
#define DEBUG_L2_TO_L1_ACTIVATION(...) \
|
||||
WP_DEBUG(WAN_LOGGER_BRI, SANG_LOGGER_BRI_L2_TO_L1_ACTIVATION, ## __VA_ARGS__)
|
||||
|
||||
/*==== End of Wanpipe Logger macro definitions ====*/
|
||||
/*=================================================*/
|
||||
|
||||
|
||||
#define WAN_DEBUG_FLINE DEBUG_EVENT("[%s]: %s:%d\n", \
|
||||
__FILE__,__FUNCTION__,__LINE__);
|
||||
|
||||
#if defined(WAN_DEBUG_FUNC)
|
||||
# undef WAN_DEBUG_FUNC_START
|
||||
# define WAN_DEBUG_FUNC_START DEBUG_EVENT("[%s]: %s:%d: Start (%d)\n",\
|
||||
__FILE__,__FUNCTION__,__LINE__, (unsigned int)SYSTEM_TICKS);
|
||||
# undef WAN_DEBUG_FUNC_END
|
||||
# define WAN_DEBUG_FUNC_END DEBUG_EVENT("[%s]: %s:%d: End (%d)\n", \
|
||||
__FILE__,__FUNCTION__,__LINE__,(unsigned int)SYSTEM_TICKS);
|
||||
# undef WAN_DEBUG_FUNC_LINE
|
||||
# define WAN_DEBUG_FUNC_LINE DEBUG_EVENT("[%s]: %s:%d: (%d)\n", \
|
||||
__FILE__,__FUNCTION__,__LINE__,(unsigned int)SYSTEM_TICKS);
|
||||
|
||||
#define BRI_FUNC() if(0)DEBUG_EVENT("%s(): line:%d\n", __FUNCTION__, __LINE__)
|
||||
#else
|
||||
# define BRI_FUNC()
|
||||
#endif /* WAN_DEBUG_FUNC */
|
||||
|
||||
#define WAN_ASSERT(val) if (val){ \
|
||||
DEBUG_EVENT("************** ASSERT FAILED **************\n"); \
|
||||
DEBUG_EVENT("%s:%d - Critical error\n",__FILE__,__LINE__); \
|
||||
WAN_KRN_BREAK_POINT(); \
|
||||
return -EINVAL; \
|
||||
}
|
||||
#define WAN_ASSERT_EINVAL(val) WAN_ASSERT(val)
|
||||
|
||||
#define WAN_ASSERT1(val) if (val){ \
|
||||
DEBUG_EVENT("************** ASSERT FAILED **************\n"); \
|
||||
DEBUG_EVENT("%s:%d - Critical error\n",__FILE__,__LINE__); \
|
||||
return; \
|
||||
}
|
||||
#define WAN_ASSERT_VOID(val) WAN_ASSERT1(val)
|
||||
|
||||
#define WAN_ASSERT2(val, ret) if (val){ \
|
||||
DEBUG_EVENT("************** ASSERT FAILED **************\n"); \
|
||||
DEBUG_EVENT("%s:%d - Critical error\n",__FILE__,__LINE__); \
|
||||
return ret; \
|
||||
}
|
||||
#define WAN_ASSERT_RC(val,ret) WAN_ASSERT2(val, ret)
|
||||
|
||||
#define WAN_MEM_ASSERT(str) {if (str){ \
|
||||
DEBUG_EVENT("%s: Error: No memory in %s:%d\n", \
|
||||
str,__FILE__,__LINE__); \
|
||||
}else{ \
|
||||
DEBUG_EVENT("wanpipe: Error: No memory in %s:%d\n", \
|
||||
__FILE__,__LINE__); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define WAN_OPP_FLAG_ASSERT(val,cmd) if (val){ \
|
||||
DEBUG_EVENT("%s:%d - Critical error: Opp Flag Set Cmd=0x%x!\n", \
|
||||
__FILE__,__LINE__,cmd); \
|
||||
}
|
||||
|
||||
|
||||
#if defined(__FreeBSD__)
|
||||
# ifndef WAN_SKBDEBUG
|
||||
# define WAN_SKBDEBUG 0
|
||||
# endif
|
||||
# define WAN_SKBCRITASSERT(mm) if (WAN_SKBDEBUG){ \
|
||||
if ((mm) == NULL){ \
|
||||
panic("%s:%d: MBUF is NULL!\n", \
|
||||
__FUNCTION__,__LINE__); \
|
||||
} \
|
||||
if (((mm)->m_flags & (M_PKTHDR|M_EXT)) != (M_PKTHDR|M_EXT)){ \
|
||||
panic("%s:%d: Invalid MBUF m_flags=%X (m=%p)\n", \
|
||||
__FUNCTION__,__LINE__, \
|
||||
(mm)->m_flags,(mm)); \
|
||||
} \
|
||||
if ((unsigned long)(mm)->m_data < 0x100){ \
|
||||
panic("%s:%d: Invalid MBUF m_data=%p (m=%p)\n", \
|
||||
__FUNCTION__,__LINE__, \
|
||||
(mm)->m_data,(mm)); \
|
||||
} \
|
||||
}
|
||||
#else
|
||||
# define WAN_SKBCRITASSERT(mm)
|
||||
#endif
|
||||
|
||||
#define WAN_MEM_INIT(id) unsigned long mem_in_used_##id = 0x0l
|
||||
#define WAN_MEM_INC(id,size) mem_in_used_##id += size
|
||||
#define WAN_MEM_DEC(id,size) mem_in_used_##id -= size
|
||||
|
||||
/* WANPIPE debugging states */
|
||||
#define WAN_DEBUGGING_NONE 0x00
|
||||
#define WAN_DEBUGGING_AGAIN 0x01
|
||||
#define WAN_DEBUGGING_START 0x02
|
||||
#define WAN_DEBUGGING_CONT 0x03
|
||||
#define WAN_DEBUGGING_PROTOCOL 0x04
|
||||
#define WAN_DEBUGGING_END 0x05
|
||||
|
||||
/* WANPIPE debugging delay */
|
||||
#define WAN_DEBUGGING_DELAY 60
|
||||
|
||||
/* WANPIPE debugging messages */
|
||||
#define WAN_DEBUG_NONE_MSG 0x00
|
||||
#define WAN_DEBUG_ALARM_MSG 0x01
|
||||
#define WAN_DEBUG_TE1_MSG 0x02
|
||||
#define WAN_DEBUG_TE3_MSG 0x02
|
||||
#define WAN_DEBUG_LINERROR_MSG 0x03
|
||||
#define WAN_DEBUG_CLK_MSG 0x04
|
||||
#define WAN_DEBUG_TX_MSG 0x05
|
||||
#define WAN_DEBUG_FR_CPE_MSG 0x06
|
||||
#define WAN_DEBUG_FR_NODE_MSG 0x07
|
||||
#define WAN_DEBUG_PPP_LCP_MSG 0x08
|
||||
#define WAN_DEBUG_PPP_NAK_MSG 0x09
|
||||
#define WAN_DEBUG_PPP_NEG_MSG 0x0A
|
||||
#define WAN_DEBUG_CHDLC_KPLV_MSG 0x0B
|
||||
#define WAN_DEBUG_CHDLC_UNKNWN_MSG 0x0C
|
||||
|
||||
/* WAN DEBUG timer */
|
||||
#define WAN_DEBUG_INIT(card){ \
|
||||
wan_tasklet_t* debug_task = &card->debug_task; \
|
||||
WAN_TASKLET_INIT(debug_task, 0, &wanpipe_debugging, card); \
|
||||
wan_clear_bit(0, (unsigned long*)&card->debug_running); \
|
||||
wanpipe_debug_timer_init(card); \
|
||||
}
|
||||
#define WAN_DEBUG_END(card){ \
|
||||
wan_del_timer(&card->debug_timer); \
|
||||
WAN_TASKLET_KILL(&card->debug_task); \
|
||||
}
|
||||
#define WAN_DEBUG_STOP(card) wan_clear_bit(0, &card->debug_running)
|
||||
|
||||
#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__WINDOWS__)
|
||||
# define WAN_DEBUG_START(card) \
|
||||
if (!wan_test_bit(0, &card->debug_running)){ \
|
||||
wan_set_bit(0, &card->debug_running); \
|
||||
wan_add_timer(&card->debug_timer, 5*HZ); \
|
||||
}
|
||||
#elif defined(__LINUX__)
|
||||
# define WAN_DEBUG_START(card) \
|
||||
if (!wan_test_and_set_bit(0, &card->debug_running)){ \
|
||||
wan_add_timer(&card->debug_timer, 5*HZ); \
|
||||
}
|
||||
#else
|
||||
# error "Undefined WAN_DEBUG_START macro!"
|
||||
#endif
|
||||
|
||||
#if defined(__OpenBSD__) && (OpenBSD >= 200611)
|
||||
# define WP_READ_LOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: RLock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
flag = splnet(); }
|
||||
|
||||
# define WP_READ_UNLOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: RULock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
splx(flag);}
|
||||
|
||||
# define WP_WRITE_LOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: WLock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
flag = splnet(); }
|
||||
|
||||
# define WP_WRITE_UNLOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: WULock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
splx(flag); }
|
||||
|
||||
#elif defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__)
|
||||
# define WP_READ_LOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: RLock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
flag = splimp(); }
|
||||
|
||||
# define WP_READ_UNLOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: RULock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
splx(flag);}
|
||||
|
||||
# define WP_WRITE_LOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: WLock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
flag = splimp(); }
|
||||
|
||||
# define WP_WRITE_UNLOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: WULock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
splx(flag); }
|
||||
|
||||
#elif defined(__WINDOWS__)
|
||||
|
||||
# define WP_READ_LOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: RLock 0x%p\n",__FILE__,__LINE__,lock); \
|
||||
flag = splimp(); }
|
||||
|
||||
# define WP_READ_UNLOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: RULock 0x%p\n",__FILE__,__LINE__,lock); \
|
||||
splx(flag);}
|
||||
|
||||
# define WP_WRITE_LOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: WLock 0x%p\n",__FILE__,__LINE__,lock); \
|
||||
flag = splimp(); }
|
||||
|
||||
# define WP_WRITE_UNLOCK(lock,flag) { \
|
||||
DEBUG_TEST("%s:%d: WULock 0x%p\n",__FILE__,__LINE__,lock); \
|
||||
splx(flag); }
|
||||
|
||||
#elif defined(__LINUX__)
|
||||
|
||||
# define WAN_TIMEOUT(sec) { unsigned long timeout; \
|
||||
timeout=jiffies; \
|
||||
while ((jiffies-timeout)<sec*HZ){ \
|
||||
schedule(); \
|
||||
}\
|
||||
}
|
||||
|
||||
# define WP_READ_LOCK(lock,flag) { DEBUG_TEST("%s:%d: RLock %u\n",__FILE__,__LINE__,(u32)lock);\
|
||||
read_lock((lock)); flag=0; }
|
||||
|
||||
# define WP_READ_UNLOCK(lock,flag) { DEBUG_TEST("%s:%d: RULock %u\n",__FILE__,__LINE__,(u32)lock);\
|
||||
read_unlock((lock)); flag=0; }
|
||||
|
||||
# define WP_WRITE_LOCK(lock,flag) { DEBUG_TEST("%s:%d: WLock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
write_lock_irqsave((lock),flag); }
|
||||
|
||||
# define WP_WRITE_UNLOCK(lock,flag) { DEBUG_TEST("%s:%d: WULock %u\n",__FILE__,__LINE__,(u32)lock); \
|
||||
write_unlock_irqrestore((lock),flag); }
|
||||
|
||||
#else
|
||||
# error "Undefined WAN_DEBUG_START macro!"
|
||||
#endif
|
||||
|
||||
#if defined(__LINUX__) && defined(WP_FUNC_DEBUG)
|
||||
|
||||
#define WP_USEC_DEFINE() unsigned long wptimeout; struct timeval wptv1,wptv2;
|
||||
#define WP_START_TIMING() wptimeout=jiffies; do_gettimeofday(&wptv1);
|
||||
#define WP_STOP_TIMING_TEST(label,usec) { do_gettimeofday(&wptv2);\
|
||||
wptimeout=jiffies-wptimeout; \
|
||||
if (wptimeout >= 2){ \
|
||||
DEBUG_EVENT("%s:%u %s Jiffies=%lu\n", \
|
||||
__FUNCTION__,__LINE__,label,wptimeout); \
|
||||
}\
|
||||
\
|
||||
wptimeout=wptv2.tv_usec - wptv1.tv_usec; \
|
||||
if (wptimeout >= usec){ \
|
||||
DEBUG_EVENT("%s:%u %s:%s Usec=%lu\n", \
|
||||
__FUNCTION__,__LINE__,card->devname,label,wptimeout); \
|
||||
}\
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define WP_USEC_DEFINE()
|
||||
#define WP_START_TIMING()
|
||||
#define WP_STOP_TIMING_TEST(label,usec)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
static __inline void debug_print_skb_pkt(unsigned char *name, unsigned char *data, int len, int direction)
|
||||
{
|
||||
#if defined(__LINUX__) && defined(__KERNEL__)
|
||||
int i;
|
||||
printk(KERN_INFO "%s: PKT Len(%i) Dir(%s)\n",name,len,direction?"RX":"TX");
|
||||
printk(KERN_INFO "%s: DATA: ",name);
|
||||
for (i=0;i<len;i++){
|
||||
printk("%02X ", data[i]);
|
||||
}
|
||||
printk("\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
#if 0
|
||||
|
||||
static __inline void debug_print_udp_pkt(unsigned char *data,int len,char trc_enabled, char direction)
|
||||
{
|
||||
#if defined(__LINUX__) && defined(__KERNEL__)
|
||||
int i,res;
|
||||
DEBUG_EVENT("\n");
|
||||
DEBUG_EVENT("%s UDP PACKET: ",direction?"RX":"TX");
|
||||
for (i=0; i<sizeof(wan_udp_pkt_t); i++){
|
||||
if (i==0){
|
||||
DEBUG_EVENT("\n");
|
||||
DEBUG_EVENT("IP PKT: ");
|
||||
}
|
||||
if (i==sizeof(struct iphdr)){
|
||||
DEBUG_EVENT("\n");
|
||||
DEBUG_EVENT("UDP PKT: ");
|
||||
}
|
||||
if (i==sizeof(struct iphdr)+sizeof(struct udphdr)){
|
||||
DEBUG_EVENT("\n");
|
||||
DEBUG_EVENT("MGMT PKT: ");
|
||||
}
|
||||
if (i==sizeof(struct iphdr)+sizeof(struct udphdr)+sizeof(wan_mgmt_t)){
|
||||
DEBUG_EVENT("\n");
|
||||
DEBUG_EVENT("CMD PKT: ");
|
||||
}
|
||||
|
||||
if (trc_enabled){
|
||||
if (i==sizeof(struct iphdr)+sizeof(struct udphdr)+
|
||||
sizeof(wan_mgmt_t)+sizeof(wan_cmd_t)){
|
||||
DEBUG_EVENT("\n");
|
||||
DEBUG_EVENT("TRACE PKT: ");
|
||||
}
|
||||
if (i==sizeof(struct iphdr)+sizeof(struct udphdr)+
|
||||
sizeof(wan_mgmt_t)+sizeof(wan_cmd_t)+
|
||||
sizeof(wan_trace_info_t)){
|
||||
|
||||
DEBUG_EVENT("\n");
|
||||
DEBUG_EVENT("DATA PKT: ");
|
||||
}
|
||||
|
||||
res=len-(sizeof(struct iphdr)+sizeof(struct udphdr)+
|
||||
sizeof(wan_mgmt_t)+sizeof(wan_cmd_t)+sizeof(wan_trace_info_t));
|
||||
|
||||
res=(res>10)?10:res;
|
||||
|
||||
if (i==sizeof(struct iphdr)+sizeof(struct udphdr)+
|
||||
sizeof(wan_mgmt_t)+sizeof(wan_cmd_t)+sizeof(wan_trace_info_t)+res){
|
||||
break;
|
||||
}
|
||||
|
||||
}else{
|
||||
|
||||
if (i==sizeof(struct iphdr)+sizeof(struct udphdr)+sizeof(wan_mgmt_t)+sizeof(wan_cmd_t)){
|
||||
DEBUG_EVENT("\n");
|
||||
DEBUG_EVENT("DATA PKT: ");
|
||||
}
|
||||
|
||||
res=len-(sizeof(struct iphdr)+sizeof(struct udphdr)+
|
||||
sizeof(wan_mgmt_t)+sizeof(wan_cmd_t));
|
||||
|
||||
res=(res>10)?10:res;
|
||||
|
||||
if (i==sizeof(struct iphdr)+sizeof(struct udphdr)+
|
||||
sizeof(wan_mgmt_t)+sizeof(wan_cmd_t)+res){
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
DEBUG_EVENT("%02X ",*(data+i));
|
||||
}
|
||||
DEBUG_EVENT("\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct wanpipe_debug_hdr {
|
||||
unsigned long magic;
|
||||
unsigned long total_len;
|
||||
} wanpipe_kernel_msg_info_t;
|
||||
|
||||
#define WAN_DEBUG_SET_TRIGGER 0x01
|
||||
#define WAN_DEBUG_CLEAR_TRIGGER 0x02
|
||||
|
||||
#define WAN_DEBUG_READING 0x00
|
||||
#define WAN_DEBUG_FULL 0x01
|
||||
#define WAN_DEBUG_TRIGGER 0x02
|
||||
|
||||
extern void wan_debug_trigger(int);
|
||||
extern void wan_debug_write(char*);
|
||||
extern int wan_debug_read(void*, void*);
|
||||
|
||||
/* NC Added to debug function calls */
|
||||
#if 0
|
||||
extern void wp_debug_func_init(void);
|
||||
extern void wp_debug_func_add(unsigned char *func);
|
||||
extern void wp_debug_func_print(void);
|
||||
#endif
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
#endif /* __WANPIPE_DEBUG_H */
|
|
@ -0,0 +1,959 @@
|
|||
/************************************************************************
|
||||
* wanpipe_defines.h *
|
||||
* WANPIPE(tm) Global definition for Sangoma *
|
||||
* Mailbox/API/UDP structures. *
|
||||
* *
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com> *
|
||||
*=======================================================================*
|
||||
* May 10, 2002 Alex Feldman Initial version *
|
||||
* *
|
||||
* Nov 27, 2007 David Rokhvarg Implemented functions/definitions for *
|
||||
* Sangoma MS Windows Driver and API. *
|
||||
* *
|
||||
* *
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __WANPIPE_DEFINES_H
|
||||
# define __WANPIPE_DEFINES_H
|
||||
|
||||
/************************************************
|
||||
* SET COMMON KERNEL DEFINE *
|
||||
************************************************/
|
||||
#if defined (__KERNEL__) || defined (KERNEL) || defined (_KERNEL)
|
||||
# ifndef WAN_KERNEL
|
||||
# define WAN_KERNEL
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#include "wanpipe_version.h"
|
||||
#if defined(WAN_KERNEL)
|
||||
#include "wanpipe_kernel.h"
|
||||
#endif
|
||||
#include "wanpipe_abstr_types.h" /* Basic data types */
|
||||
|
||||
|
||||
#if defined(__WINDOWS__)
|
||||
# if defined(WAN_KERNEL)
|
||||
# include "wanpipe_skb.h"
|
||||
# define inline __inline
|
||||
# if defined(NTSTRSAFE_USE_SECURE_CRT)
|
||||
# define wp_snwprintf RtlStringCbPrintfW
|
||||
# define wp_strcpy RtlStringCchCopy
|
||||
# else
|
||||
# define wp_snwprintf _snwprintf
|
||||
# endif/* NTSTRSAFE_USE_SECURE_CRT */
|
||||
# endif/* WAN_KERNEL */
|
||||
|
||||
# define wp_strlcpy strncpy
|
||||
# define wp_strncasecmp _strnicmp
|
||||
# define wp_strcasecmp _stricmp
|
||||
# define wp_snprintf _snprintf
|
||||
# define wp_vsnprintf _vsnprintf
|
||||
# define wp_unlink _unlink
|
||||
#else/* ! __WINDOWS__ */
|
||||
# define wp_strlcpy strlcpy
|
||||
# define wp_strncasecmp wp_linux_strncasecmp
|
||||
# define wp_strcasecmp strcasecmp
|
||||
# define wp_snprintf snprintf
|
||||
# define wp_vsnprintf vsnprintf
|
||||
# define wp_unlink unlink
|
||||
# define wp_sleep sleep
|
||||
# define wp_gettimeofday gettimeofday
|
||||
# define wp_localtime_r localtime_r
|
||||
# define wp_usleep usleep
|
||||
#endif
|
||||
|
||||
|
||||
/************************************************
|
||||
* GLOBAL SANGOMA PLATFORM DEFINITIONS *
|
||||
************************************************/
|
||||
#define WAN_LINUX_PLATFORM 0x01
|
||||
#define WAN_WIN98_PLATFORM 0x02
|
||||
#define WAN_WINNT_PLATFORM 0x03
|
||||
#define WAN_WIN2K_PLATFORM 0x04
|
||||
#define WAN_FREEBSD_PLATFORM 0x05
|
||||
#define WAN_OPENBSD_PLATFORM 0x06
|
||||
#define WAN_SOLARIS_PLATFORM 0x07
|
||||
#define WAN_SCO_PLATFORM 0x08
|
||||
#define WAN_NETBSD_PLATFORM 0x09
|
||||
|
||||
#if defined(__FreeBSD__)
|
||||
# define WAN_PLATFORM_ID WAN_FREEBSD_PLATFORM
|
||||
#elif defined(__OpenBSD__)
|
||||
# define WAN_PLATFORM_ID WAN_OPENBSD_PLATFORM
|
||||
#elif defined(__NetBSD__)
|
||||
# define WAN_PLATFORM_ID WAN_NETBSD_PLATFORM
|
||||
#elif defined(__LINUX__)
|
||||
# define WAN_PLATFORM_ID WAN_LINUX_PLATFORM
|
||||
#elif defined(__WINDOWS__)
|
||||
# define WAN_PLATFORM_ID WAN_WIN2K_PLATFORM
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
************************************************
|
||||
** GLOBAL SANGOMA DEFINITIONS
|
||||
************************************************
|
||||
*/
|
||||
#define WAN_FALSE 0
|
||||
#define WAN_TRUE 1
|
||||
|
||||
#if defined(__FreeBSD__)
|
||||
# undef WANPIPE_VERSION
|
||||
# undef WANPIPE_VERSION_BETA
|
||||
# undef WANPIPE_SUB_VERSION
|
||||
# undef WANPIPE_LITE_VERSION
|
||||
# define WANPIPE_VERSION WANPIPE_VERSION_FreeBSD
|
||||
# define WANPIPE_VERSION_BETA WANPIPE_VERSION_BETA_FreeBSD
|
||||
# define WANPIPE_SUB_VERSION WANPIPE_SUB_VERSION_FreeBSD
|
||||
# define WANPIPE_LITE_VERSION WANPIPE_LITE_VERSION_FreeBSD
|
||||
#elif defined(__OpenBSD__)
|
||||
# undef WANPIPE_VERSION
|
||||
# undef WANPIPE_VERSION_BETA
|
||||
# undef WANPIPE_SUB_VERSION
|
||||
# undef WANPIPE_LITE_VERSION
|
||||
# define WANPIPE_VERSION WANPIPE_VERSION_OpenBSD
|
||||
# define WANPIPE_VERSION_BETA WANPIPE_VERSION_BETA_OpenBSD
|
||||
# define WANPIPE_SUB_VERSION WANPIPE_SUB_VERSION_OpenBSD
|
||||
# define WANPIPE_LITE_VERSION WANPIPE_LITE_VERSION_OpenBSD
|
||||
#elif defined(__NetBSD__)
|
||||
# undef WANPIPE_VERSION
|
||||
# undef WANPIPE_VERSION_BETA
|
||||
# undef WANPIPE_SUB_VERSION
|
||||
# undef WANPIPE_LITE_VERSION
|
||||
# define WANPIPE_VERSION WANPIPE_VERSION_NetBSD
|
||||
# define WANPIPE_VERSION_BETA WANPIPE_VERSION_BETA_NetBSD
|
||||
# define WANPIPE_SUB_VERSION WANPIPE_SUB_VERSION_NetBSD
|
||||
# define WANPIPE_LITE_VERSION WANPIPE_LITE_VERSION_NetBSD
|
||||
#elif defined(__WINDOWS__)
|
||||
#endif
|
||||
|
||||
#define WANROUTER_MAJOR_VER 2
|
||||
#define WANROUTER_MINOR_VER 1
|
||||
|
||||
#define WANPIPE_MAJOR_VER 1
|
||||
#define WANPIPE_MINOR_VER 1
|
||||
/*
|
||||
*************************************************
|
||||
** GLOBAL SANGOMA TYPEDEF
|
||||
*************************************************
|
||||
*/
|
||||
#if defined(__LINUX__)
|
||||
typedef struct ethhdr ethhdr_t;
|
||||
typedef struct iphdr iphdr_t;
|
||||
typedef struct udphdr udphdr_t;
|
||||
typedef struct tcphdr tcphdr_t;
|
||||
# define w_eth_dest h_dest
|
||||
# define w_eth_src h_source
|
||||
# define w_eth_proto h_proto
|
||||
# define w_ip_v version
|
||||
# define w_ip_hl ihl
|
||||
# define w_ip_tos tos
|
||||
# define w_ip_len tot_len
|
||||
# define w_ip_id id
|
||||
# define w_ip_off frag_off
|
||||
# define w_ip_ttl ttl
|
||||
# define w_ip_p protocol
|
||||
# define w_ip_sum check
|
||||
# define w_ip_src saddr
|
||||
# define w_ip_dst daddr
|
||||
# define w_udp_sport source
|
||||
# define w_udp_dport dest
|
||||
# define w_udp_len len
|
||||
# define w_udp_sum check
|
||||
# define w_tcp_sport source
|
||||
# define w_tcp_dport dest
|
||||
# define w_tcp_seq seq
|
||||
# define w_tcp_ack_seq ack_seq
|
||||
|
||||
#elif defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__)
|
||||
typedef struct ip iphdr_t;
|
||||
typedef struct udphdr udphdr_t;
|
||||
typedef struct tcphdr tcphdr_t;
|
||||
# define w_ip_v ip_v
|
||||
# define w_ip_hl ip_hl
|
||||
# define w_ip_tos ip_tos
|
||||
# define w_ip_len ip_len
|
||||
# define w_ip_id ip_id
|
||||
# define w_ip_off ip_off
|
||||
# define w_ip_ttl ip_ttl
|
||||
# define w_ip_p ip_p
|
||||
# define w_ip_sum ip_sum
|
||||
# define w_ip_src ip_src.s_addr
|
||||
# define w_ip_dst ip_dst.s_addr
|
||||
# define w_udp_sport uh_sport
|
||||
# define w_udp_dport uh_dport
|
||||
# define w_udp_len uh_ulen
|
||||
# define w_udp_sum uh_sum
|
||||
# define w_tcp_sport th_sport
|
||||
# define w_tcp_dport th_dport
|
||||
# define w_tcp_seq th_seq
|
||||
# define w_tcp_ack_seq th_ack
|
||||
|
||||
# if (__FreeBSD_version > 700000)
|
||||
# define wan_time_t time_t
|
||||
# else /* includes FreeBSD-5/6/OpenBSD/NetBSD */
|
||||
# define wan_time_t long
|
||||
# endif
|
||||
#define wan_suseconds_t suseconds_t
|
||||
|
||||
|
||||
|
||||
#elif defined(__WINDOWS__)
|
||||
/* Intel X86 */
|
||||
#define __LITTLE_ENDIAN_BITFIELD
|
||||
|
||||
struct iphdr {
|
||||
#if defined(__LITTLE_ENDIAN_BITFIELD)
|
||||
__u8 ihl:4,
|
||||
version:4;
|
||||
#elif defined (__BIG_ENDIAN_BITFIELD)
|
||||
__u8 version:4,
|
||||
ihl:4;
|
||||
#else
|
||||
# error "unknown byteorder!"
|
||||
#endif
|
||||
__u8 tos;
|
||||
__u16 tot_len;
|
||||
__u16 id;
|
||||
__u16 frag_off;
|
||||
__u8 ttl;
|
||||
__u8 protocol;
|
||||
__u16 check;
|
||||
__u32 saddr;
|
||||
__u32 daddr;
|
||||
/*The options start here. */
|
||||
};
|
||||
|
||||
struct udphdr {
|
||||
__u16 source;
|
||||
__u16 dest;
|
||||
__u16 len;
|
||||
__u16 check;
|
||||
};
|
||||
|
||||
typedef struct iphdr iphdr_t;
|
||||
typedef struct udphdr udphdr_t;
|
||||
|
||||
|
||||
# define w_eth_dest h_dest
|
||||
# define w_eth_src h_source
|
||||
# define w_eth_proto h_proto
|
||||
# define w_ip_v version
|
||||
# define w_ip_hl ihl
|
||||
# define w_ip_tos tos
|
||||
# define w_ip_len tot_len
|
||||
# define w_ip_id id
|
||||
# define w_ip_off frag_off
|
||||
# define w_ip_ttl ttl
|
||||
# define w_ip_p protocol
|
||||
# define w_ip_sum check
|
||||
# define w_ip_src saddr
|
||||
# define w_ip_dst daddr
|
||||
# define w_udp_sport source
|
||||
# define w_udp_dport dest
|
||||
# define w_udp_len len
|
||||
# define w_udp_sum check
|
||||
# define w_tcp_sport source
|
||||
# define w_tcp_dport dest
|
||||
# define w_tcp_seq seq
|
||||
# define w_tcp_ack_seq ack_seq
|
||||
|
||||
#if !defined snprintf
|
||||
# define snprintf _snprintf
|
||||
#endif
|
||||
|
||||
#else
|
||||
# error "Unknown OS system!"
|
||||
#endif
|
||||
|
||||
#if defined(__FreeBSD__)
|
||||
typedef u_int8_t u8;
|
||||
typedef u_int16_t u16;
|
||||
typedef u_int32_t u32;
|
||||
#elif defined(__OpenBSD__)
|
||||
typedef u_int8_t u8;
|
||||
typedef u_int16_t u16;
|
||||
typedef u_int32_t u32;
|
||||
typedef u_int64_t u64;
|
||||
#elif defined(__NetBSD__)
|
||||
typedef u_int8_t u8;
|
||||
typedef u_int16_t u16;
|
||||
typedef u_int32_t u32;
|
||||
typedef u_int64_t u64;
|
||||
#endif
|
||||
|
||||
|
||||
/************************************************
|
||||
** GLOBAL SANGOMA MACROS
|
||||
************************************************/
|
||||
#if defined(__LINUX__)
|
||||
# if !defined(strlcpy)
|
||||
# define strlcpy(d,s,l) strcpy((d),(s))
|
||||
# endif
|
||||
#elif defined(__FreeBSD__)
|
||||
# if !defined(strlcpy)
|
||||
# define strlcpy(d,s,l) strcpy((d),(s))
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef WAN_KERNEL
|
||||
|
||||
|
||||
/*
|
||||
******************************************************************
|
||||
** D E F I N E S
|
||||
******************************************************************
|
||||
*/
|
||||
#define MAX_PACKET_SIZE 5000
|
||||
#if defined(__FreeBSD__)
|
||||
/******************* F R E E B S D ******************************/
|
||||
# define WAN_MOD_LOAD MOD_LOAD
|
||||
# define WAN_MOD_UNLOAD MOD_UNLOAD
|
||||
# if (__FreeBSD_version > 503000)
|
||||
# define WAN_MOD_SHUTDOWN MOD_SHUTDOWN
|
||||
# define WAN_MOD_QUIESCE MOD_QUIESCE
|
||||
# else
|
||||
# define WAN_MOD_SHUTDOWN WAN_MOD_UNLOAD+1
|
||||
# define WAN_MOD_QUIESCE WAN_MOD_UNLOAD+2
|
||||
# endif
|
||||
# define WP_DELAY DELAY
|
||||
# define WP_SCHEDULE(arg,name) {void*ptr=(name);tsleep(ptr,PPAUSE,(name),(arg)); }
|
||||
/*# define WP_SCHEDULE(arg,name) tsleep(&(arg),PPAUSE,(name),(arg))*/
|
||||
# define SYSTEM_TICKS ticks
|
||||
# define HZ hz
|
||||
# define RW_LOCK_UNLOCKED 0
|
||||
# define ETH_P_IP AF_INET
|
||||
# define ETH_P_IPV6 AF_INET6
|
||||
# define ETH_P_IPX AF_IPX
|
||||
# define WAN_IFT_OTHER IFT_OTHER
|
||||
# define WAN_IFT_ETHER IFT_ETHER
|
||||
# define WAN_IFT_PPP IFT_PPP
|
||||
# define WAN_MFLAG_PRV M_PROTO1
|
||||
# define WAN_MFLAG_IPX M_PROTO2
|
||||
typedef u_long wan_ioctl_cmd_t;
|
||||
#elif defined(__OpenBSD__)
|
||||
/******************* O P E N B S D ******************************/
|
||||
# define WAN_MOD_LOAD LKM_E_LOAD
|
||||
# define WAN_MOD_UNLOAD LKM_E_UNLOAD
|
||||
# define WP_DELAY DELAY
|
||||
# define WP_SCHEDULE(arg,name) tsleep(&(arg),PPAUSE,(name),(arg))
|
||||
# define SYSTEM_TICKS ticks
|
||||
# define HZ hz
|
||||
# define RW_LOCK_UNLOCKED 0
|
||||
# define ETH_P_IP AF_INET
|
||||
# define ETH_P_IPV6 AF_INET6
|
||||
# define ETH_P_IPX AF_IPX
|
||||
# define WAN_IFT_OTHER IFT_OTHER
|
||||
# define WAN_IFT_ETHER IFT_ETHER
|
||||
# define WAN_IFT_PPP IFT_PPP
|
||||
# define WAN_MFLAG_PRV M_PROTO1
|
||||
# define WAN_MFLAG_IPX M_PROTO2
|
||||
typedef u_long wan_ioctl_cmd_t;
|
||||
#elif defined(__NetBSD__)
|
||||
/******************* N E T B S D ******************************/
|
||||
# define WAN_MOD_LOAD LKM_E_LOAD
|
||||
# define WAN_MOD_UNLOAD LKM_E_UNLOAD
|
||||
# define WP_DELAY DELAY
|
||||
# define SYSTEM_TICKS tick
|
||||
# define HZ hz
|
||||
# define RW_LOCK_UNLOCKED 0
|
||||
# define WAN_IFT_OTHER IFT_OTHER
|
||||
# define WAN_IFT_ETHER IFT_ETHER
|
||||
# define WAN_IFT_PPP IFT_PPP
|
||||
typedef u_long wan_ioctl_cmd_t;
|
||||
#elif defined(__LINUX__)
|
||||
/*********************** L I N U X ******************************/
|
||||
# define ETHER_ADDR_LEN ETH_ALEN
|
||||
|
||||
static __inline void WP_DELAY(int usecs)
|
||||
{
|
||||
if ((usecs) <= 1000) {
|
||||
udelay(usecs) ;
|
||||
} else {
|
||||
int delay=usecs/1000;
|
||||
int i;
|
||||
if (delay < 1) {
|
||||
delay=1;
|
||||
}
|
||||
for (i=0;i<delay;i++) {
|
||||
udelay(1000);
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
# define atomic_set_int(name, val) atomic_set(name, val)
|
||||
# define SYSTEM_TICKS jiffies
|
||||
# define WP_SCHEDULE(arg,name) schedule()
|
||||
# define wan_atomic_read atomic_read
|
||||
# define wan_atomic_set atomic_set
|
||||
# define wan_atomic_inc atomic_inc
|
||||
# define wan_atomic_dec atomic_dec
|
||||
# define WAN_IFT_OTHER 0x00
|
||||
# define WAN_IFT_ETHER 0x00
|
||||
# define WAN_IFT_PPP 0x00
|
||||
typedef int wan_ioctl_cmd_t;
|
||||
#elif defined(__WINDOWS__)
|
||||
/******************* W I N D O W S ******************************/
|
||||
# define SYSTEM_TICKS get_systemticks()
|
||||
# define jiffies SYSTEM_TICKS
|
||||
|
||||
# define wan_atomic_read atomic_read
|
||||
# define wan_atomic_set atomic_set
|
||||
# define wan_atomic_inc atomic_inc
|
||||
# define wan_atomic_dec atomic_dec
|
||||
# define RW_LOCK_UNLOCKED 0
|
||||
typedef int wan_ioctl_cmd_t;
|
||||
|
||||
# define WP_SCHEDULE(arg,name) WP_MILLISECONDS_DELAY(arg)
|
||||
# define WAN_IFT_OTHER 0x00
|
||||
|
||||
/* this pseudo lock is used only for debugging of LIP layer */
|
||||
#define wan_rwlock_init(plock) *(plock)=RW_LOCK_UNLOCKED;
|
||||
|
||||
#endif /* __WINDOWS__ */
|
||||
|
||||
#if defined(__FreeBSD__)
|
||||
# define WAN_MODULE_VERSION(module, version) \
|
||||
MODULE_VERSION(module, version)
|
||||
# define WAN_MODULE_DEPEND(module, mdepend, vmin, vpref, vmax) \
|
||||
MODULE_DEPEND(module, mdepend, vmin, vpref, vmax)
|
||||
# define WAN_MODULE_DEFINE(name,name_str,author,descr,lic,mod_init,mod_exit,devsw)\
|
||||
int load_##name (module_t mod, int cmd, void *arg); \
|
||||
int load_##name (module_t mod, int cmd, void *arg){ \
|
||||
switch(cmd){ \
|
||||
case WAN_MOD_LOAD: return mod_init((devsw)); \
|
||||
case WAN_MOD_UNLOAD: return mod_exit((devsw)); \
|
||||
case WAN_MOD_SHUTDOWN: return 0;\
|
||||
case WAN_MOD_QUIESCE: return 0; \
|
||||
} \
|
||||
return -EINVAL; \
|
||||
} \
|
||||
DEV_MODULE(name, load_##name, NULL);
|
||||
#elif defined(__OpenBSD__)
|
||||
# define WAN_MODULE_VERSION(module, version)
|
||||
# define WAN_MODULE_DEPEND(module, mdepend, vmin, vpref, vmax)
|
||||
# define WAN_MODULE_DEFINE(name,name_str,author,descr,lic,mod_init,mod_exit,devsw)\
|
||||
int (name)(struct lkm_table* lkmtp, int cmd, int ver);\
|
||||
MOD_DEV(name_str, LM_DT_CHAR, -1, (devsw)); \
|
||||
int load_##name(struct lkm_table* lkm_tp, int cmd){ \
|
||||
switch(cmd){ \
|
||||
case WAN_MOD_LOAD: return mod_init(NULL); \
|
||||
case WAN_MOD_UNLOAD: return mod_exit(NULL); \
|
||||
} \
|
||||
return -EINVAL; \
|
||||
} \
|
||||
int (name)(struct lkm_table* lkmtp, int cmd, int ver){\
|
||||
DISPATCH(lkmtp,cmd,ver,load_##name,load_##name,lkm_nofunc);\
|
||||
}
|
||||
#elif defined(__NetBSD__)
|
||||
# define WAN_MODULE_VERSION(module, version)
|
||||
# define WAN_MODULE_DEPEND(module, mdepend, vmin, vpref, vmax)
|
||||
# if (__NetBSD_Version__ < 200000000)
|
||||
# define WAN_MOD_DEV(name,devsw) MOD_DEV(name,LM_DT_CHAR,-1,(devsw));
|
||||
# else
|
||||
# define WAN_MOD_DEV(name,devsw) MOD_DEV(name,name,NULL,-1,(devsw),-1);
|
||||
# endif
|
||||
# define WAN_MODULE_DEFINE(name,name_str,author,descr,lic,mod_init,mod_exit,devsw)\
|
||||
int (##name_lkmentry)(struct lkm_table* lkmtp, int cmd, int ver);\
|
||||
WAN_MOD_DEV(name_str, (devsw)); \
|
||||
int load_##name(struct lkm_table* lkm_tp, int cmd){ \
|
||||
switch(cmd){ \
|
||||
case WAN_MOD_LOAD: return mod_init(NULL); \
|
||||
case WAN_MOD_UNLOAD: return mod_exit(NULL); \
|
||||
} \
|
||||
return -EINVAL; \
|
||||
} \
|
||||
int (##name_lkmentry)(struct lkm_table* lkmtp, int cmd, int ver){\
|
||||
DISPATCH(lkmtp,cmd,ver,load_##name,load_##name,lkm_nofunc);\
|
||||
}
|
||||
#elif defined(__LINUX__)
|
||||
# define WAN_MODULE_VERSION(module, version)
|
||||
# define WAN_MODULE_DEPEND(module, mdepend, vmin, vpref, vmax)
|
||||
# define WAN_MODULE_DEFINE(name,name_str,author,descr,lic,mod_init,mod_exit,devsw)\
|
||||
MODULE_AUTHOR (author); \
|
||||
MODULE_DESCRIPTION (descr); \
|
||||
MODULE_LICENSE(lic); \
|
||||
int __init load_##name(void){return mod_init(NULL);} \
|
||||
void __exit unload_##name(void){mod_exit(NULL);} \
|
||||
module_init(load_##name); \
|
||||
module_exit(unload_##name);
|
||||
|
||||
#elif defined(__SOLARIS__)
|
||||
# define WAN_MODULE_VERSION(module, version)
|
||||
# define WAN_MODULE_DEPEND(module, mdepend, vmin, vpref, vmax)
|
||||
# define WAN_MODULE_DEFINE(name,name_str,author,descr,lic,mod_init,mod_exit,devsw)\
|
||||
int _init(void){\
|
||||
int err=mod_init(NULL); \
|
||||
if (err) return err; \
|
||||
err=mod_install(&modlinkage) \
|
||||
if (err) cmn_err(CE_CONT, "mod_install: failed\n"); \
|
||||
return err; \
|
||||
}\
|
||||
void _fini(void){ \
|
||||
int status \
|
||||
mod_exit(NULL); \
|
||||
if ((status = mod_remove(&modlinkage)) != 0) \
|
||||
cmn_err(CE_CONT, "mod_remove: failed\n"); \
|
||||
return status; \
|
||||
}\
|
||||
int _info(struct modinfo* modinfop) \
|
||||
{ \
|
||||
dcmn_err((CE_CONT, "Get module info!\n")); \
|
||||
return (mod_info(&modlinkage, modinfop)); \
|
||||
}
|
||||
#elif defined(__WINDOWS__)
|
||||
# define WAN_MODULE_VERSION(module, version)
|
||||
# define WAN_MODULE_DEPEND(module, mdepend, vmin, vpref, vmax)
|
||||
# define WAN_MODULE_DEFINE(name,name_str,author,descr,lic,mod_init,mod_exit,devsw)
|
||||
#endif
|
||||
|
||||
/*
|
||||
******************************************************************
|
||||
** T Y P E D E F
|
||||
******************************************************************
|
||||
*/
|
||||
|
||||
#if !defined(__WINDOWS__)
|
||||
#if !defined(offsetof)
|
||||
# define offsetof(type, member) ((size_t)(&((type*)0)->member))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(__LINUX__)
|
||||
/**************************** L I N U X **************************************/
|
||||
typedef struct sk_buff netskb_t;
|
||||
typedef struct sk_buff_head wan_skb_queue_t;
|
||||
typedef struct timer_list wan_timer_info_t;
|
||||
typedef void (*wan_timer_func_t)(unsigned long);
|
||||
typedef unsigned long wan_timer_arg_t;
|
||||
typedef void wan_tasklet_func_t(unsigned long);
|
||||
# if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
|
||||
typedef void (*wan_taskq_func_t)(void *);
|
||||
# else
|
||||
typedef void (*wan_taskq_func_t)(struct work_struct *);
|
||||
#endif
|
||||
|
||||
/* Due to 2.6.20 kernel, the wan_taskq_t must be declared
|
||||
* here as a workqueue structre. The tq_struct is declared
|
||||
* as work queue in wanpipe_kernel.h */
|
||||
typedef struct tq_struct wan_taskq_t;
|
||||
|
||||
typedef void* virt_addr_t;
|
||||
typedef unsigned long wp_phys_addr_t;
|
||||
typedef spinlock_t wan_spinlock_t;
|
||||
#ifdef DEFINE_MUTEX
|
||||
typedef struct mutex wan_mutexlock_t;
|
||||
#else
|
||||
typedef spinlock_t wan_mutexlock_t;
|
||||
#endif
|
||||
typedef rwlock_t wan_rwlock_t;
|
||||
typedef unsigned long wan_smp_flag_t;
|
||||
typedef unsigned long wan_rwlock_flag_t;
|
||||
|
||||
typedef void (*TASKQ_FUNC)(void *);
|
||||
typedef struct tty_driver ttydriver_t;
|
||||
typedef struct tty_struct ttystruct_t;
|
||||
typedef struct termios termios_t;
|
||||
# if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,10)
|
||||
# define vsnprintf(a,b,c,d) vsprintf(a,c,d)
|
||||
# endif
|
||||
typedef void* wan_dma_tag_t;
|
||||
typedef wait_queue_head_t wan_waitq_head_t;
|
||||
typedef void (wan_pci_ifunc_t)(void*);
|
||||
#elif defined(__FreeBSD__)
|
||||
/**************************** F R E E B S D **********************************/
|
||||
typedef struct ifnet netdevice_t;
|
||||
typedef struct mbuf netskb_t;
|
||||
# ifdef ALTQ
|
||||
typedef struct ifaltq wan_skb_queue_t;
|
||||
# else
|
||||
typedef struct ifqueue wan_skb_queue_t;
|
||||
# endif
|
||||
typedef struct ether_header ethhdr_t;
|
||||
typedef struct callout_handle wan_timer_info_t;
|
||||
typedef timeout_t* wan_timer_func_t;
|
||||
typedef void* wan_timer_arg_t;
|
||||
typedef task_fn_t wan_tasklet_func_t;
|
||||
typedef task_fn_t* wan_taskq_func_t;
|
||||
typedef caddr_t virt_addr_t;
|
||||
typedef u_int32_t wp_phys_addr_t;
|
||||
typedef int atomic_t;
|
||||
typedef dev_t ttydriver_t;
|
||||
typedef struct tty ttystruct_t;
|
||||
typedef struct termios termios_t;
|
||||
typedef int (get_info_t)(char *, char **, off_t, int, int);
|
||||
#if defined(SPINLOCK_OLD)
|
||||
typedef int wan_spinlock_t;
|
||||
#else
|
||||
typedef struct mtx wan_spinlock_t;
|
||||
#endif
|
||||
typedef int wan_rwlock_t;
|
||||
typedef int wan_smp_flag_t;
|
||||
typedef int wan_rwlock_flag_t;
|
||||
# if (__FreeBSD_version < 450000)
|
||||
typedef struct proc wan_dev_thread_t;
|
||||
# else
|
||||
typedef d_thread_t wan_dev_thread_t;
|
||||
# endif
|
||||
typedef bus_dma_tag_t wan_dma_tag_t;
|
||||
typedef int wan_waitq_head_t;
|
||||
typedef void (wan_pci_ifunc_t)(void*);
|
||||
#elif defined(__OpenBSD__)
|
||||
/**************************** O P E N B S D **********************************/
|
||||
typedef struct ifnet netdevice_t;
|
||||
typedef struct mbuf netskb_t;
|
||||
# ifdef ALTQ
|
||||
typedef struct ifaltq wan_skb_queue_t;
|
||||
# else
|
||||
typedef struct ifqueue wan_skb_queue_t;
|
||||
# endif
|
||||
typedef struct ether_header ethhdr_t;
|
||||
typedef struct timeout wan_timer_info_t;
|
||||
typedef void (*wan_timer_func_t)(void*);
|
||||
typedef void* wan_timer_arg_t;
|
||||
typedef void wan_tasklet_func_t(void*, int);
|
||||
typedef void (*wan_taskq_func_t)(void*, int);
|
||||
typedef caddr_t virt_addr_t;
|
||||
typedef u_int32_t wp_phys_addr_t;
|
||||
typedef int atomic_t;
|
||||
typedef dev_t ttydriver_t;
|
||||
typedef struct tty ttystruct_t;
|
||||
typedef struct termios termios_t;
|
||||
typedef int (get_info_t)(char *, char **, off_t, int, int);
|
||||
typedef bus_dma_tag_t wan_dma_tag_t;
|
||||
typedef int wan_spinlock_t;
|
||||
typedef int wan_smp_flag_t;
|
||||
typedef int wan_rwlock_t;
|
||||
typedef int wan_rwlock_flag_t;
|
||||
typedef int (wan_pci_ifunc_t)(void*);
|
||||
#elif defined(__NetBSD__)
|
||||
/**************************** N E T B S D **********************************/
|
||||
typedef struct ifnet netdevice_t;
|
||||
typedef struct mbuf netskb_t;
|
||||
# ifdef ALTQ
|
||||
typedef struct ifaltq wan_skb_queue_t;
|
||||
# else
|
||||
typedef struct ifqueue wan_skb_queue_t;
|
||||
# endif
|
||||
typedef struct ether_header ethhdr_t;
|
||||
typedef struct callout wan_timer_info_t;
|
||||
typedef void (*wan_timer_func_t)(void*);
|
||||
typedef void* wan_timer_arg_t;
|
||||
typedef void wan_tasklet_func_t(void*, int);
|
||||
typedef void (*wan_taskq_func_t)(void*, int);
|
||||
typedef caddr_t virt_addr_t;
|
||||
typedef u_int32_t wp_phys_addr_t;
|
||||
typedef int atomic_t;
|
||||
typedef dev_t ttydriver_t;
|
||||
typedef struct tty ttystruct_t;
|
||||
typedef struct termios termios_t;
|
||||
typedef int (get_info_t)(char *, char **, off_t, int, int);
|
||||
typedef bus_dma_tag_t wan_dma_tag_t;
|
||||
typedef int wan_spinlock_t;
|
||||
typedef int wan_smp_flag_t;
|
||||
typedef int wan_rwlock_t;
|
||||
typedef int wan_rwlock_flag_t;
|
||||
typedef void (wan_pci_ifunc_t)(void*);
|
||||
#elif defined(__SOLARIS__)
|
||||
typedef mblk_t netskb_t;
|
||||
|
||||
#elif defined(__WINDOWS__)
|
||||
/**************************** W I N D O W S **********************************/
|
||||
|
||||
typedef struct sk_buff netskb_t;
|
||||
typedef struct sk_buff_head wan_skb_queue_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
u8 DestAddr[ETHER_ADDR_LEN];
|
||||
u8 SrcAddr[ETHER_ADDR_LEN];
|
||||
u16 EtherType;
|
||||
} ethhdr_t;
|
||||
|
||||
|
||||
typedef int wan_rwlock_t;
|
||||
typedef int wan_rwlock_flag_t;
|
||||
typedef int pid_t;
|
||||
typedef void (wan_pci_ifunc_t)(void*);
|
||||
|
||||
typedef wan_spinlock_t wan_mutexlock_t;
|
||||
|
||||
#define WAN_IOCTL_RET_TYPE int
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* Spin Locks
|
||||
*/
|
||||
#if 0
|
||||
typedef struct _wan_spinlock
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
spinlock_t slock;
|
||||
unsigned long flags;
|
||||
#elif defined(MAC_OS)
|
||||
ULONG slock;
|
||||
#elif defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__)
|
||||
int slock;
|
||||
#endif /* OS */
|
||||
} wan_spinlock_t;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Read Write Locks
|
||||
*/
|
||||
#if 0
|
||||
typedef struct _wan_rwlock
|
||||
{
|
||||
#if defined(__LINUX__)
|
||||
rwlock_t rwlock;
|
||||
#elif defined(MAC_OS)
|
||||
#error "wan_rwlock_t not defined"
|
||||
#elif defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__)
|
||||
volatile unsigned int lock;
|
||||
#else
|
||||
#error "wan_rwlock_t not defined"
|
||||
#endif /* OS */
|
||||
} wan_rwlock_t;
|
||||
#endif
|
||||
|
||||
/*
|
||||
** FIXME: Redefined from sdla_adsl.c
|
||||
** DMA structure for ADSL ONLY!!!!!!!
|
||||
*/
|
||||
typedef struct _wan_dma_descr_org
|
||||
{
|
||||
unsigned long* vAddr;
|
||||
unsigned long pAddr;
|
||||
unsigned long length;
|
||||
unsigned long max_length;
|
||||
#if defined(__FreeBSD__)
|
||||
bus_dma_tag_t dmat;
|
||||
bus_dmamap_t dmamap;
|
||||
#elif defined(__OpenBSD__)
|
||||
bus_dma_tag_t dmat;
|
||||
bus_dma_segment_t dmaseg;
|
||||
int rsegs;
|
||||
#elif defined(__NetBSD__)
|
||||
bus_dma_tag_t dmat;
|
||||
bus_dma_segment_t dmaseg;
|
||||
int rsegs;
|
||||
#elif defined(__WINDOWS__)
|
||||
PDMA_ADAPTER DmaAdapterObject;
|
||||
#else /* other OS */
|
||||
#endif
|
||||
} wan_dma_descr_org_t;/*, *PDMA_DESCRIPTION;*/
|
||||
|
||||
/*
|
||||
** TASK structure
|
||||
*/
|
||||
typedef struct _wan_tasklet
|
||||
{
|
||||
unsigned long running;
|
||||
#if defined(__FreeBSD__) && (__FreeBSD_version >= 410000)
|
||||
struct task task_id;
|
||||
#elif defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__)
|
||||
wan_tasklet_func_t* task_func;
|
||||
void* data;
|
||||
#elif defined(__LINUX__)
|
||||
struct tasklet_struct task_id;
|
||||
#elif defined(__WINDOWS__)
|
||||
KDPC tqueue;
|
||||
#elif defined(__SOLARIS__)
|
||||
#error "wan_tasklet: not defined in solaris"
|
||||
#endif
|
||||
} wan_tasklet_t;
|
||||
|
||||
#if !defined(__LINUX__) && !defined(__WINDOWS__)
|
||||
typedef struct _wan_taskq
|
||||
{
|
||||
unsigned char running;
|
||||
#if defined(__FreeBSD__) && (__FreeBSD_version >= 410000)
|
||||
struct task tqueue;
|
||||
#elif defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__)
|
||||
wan_taskq_func_t tfunc;
|
||||
void* data;
|
||||
#elif defined(__LINUX__)
|
||||
/* Due to 2.6.20 kernel, we cannot abstract the
|
||||
* wan_taskq_t here, we must declare it as work queue */
|
||||
# error "Linux doesnt support wan_taskq_t here!"
|
||||
# if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
|
||||
struct tq_struct tqueue;
|
||||
# else
|
||||
struct work_struct tqueue;
|
||||
# endif
|
||||
#elif defined(__SOLARIS__)
|
||||
#error "_wan_taskq: not defined in solaris"
|
||||
#endif
|
||||
} wan_taskq_t;
|
||||
#endif
|
||||
|
||||
|
||||
typedef struct wan_trace
|
||||
{
|
||||
u_int32_t tracing_enabled;
|
||||
wan_skb_queue_t trace_queue;
|
||||
wan_ticks_t trace_timeout;/* WARNING: has to be 'unsigned long' !!!*/
|
||||
unsigned int max_trace_queue;
|
||||
unsigned char last_trace_direction;
|
||||
u_int32_t missed_idle_rx_counter;
|
||||
u_int32_t time_stamp;
|
||||
}wan_trace_t;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
** TIMER structure
|
||||
*/
|
||||
#if !defined(__WINDOWS__)
|
||||
typedef struct _wan_timer
|
||||
{
|
||||
#define NDIS_TIMER_TAG 0xBEEF0005
|
||||
unsigned long Tag;
|
||||
wan_timer_func_t MiniportTimerFunction;
|
||||
void * MiniportTimerContext;
|
||||
void * MiniportAdapterHandle;
|
||||
wan_timer_info_t timer_info;
|
||||
#if defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__)
|
||||
wan_timer_func_t timer_func;
|
||||
#endif
|
||||
void* timer_arg;
|
||||
} wan_timer_t;
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(LINUX_2_6) && !defined(__WINDOWS__)
|
||||
/* Define this structure for BSDs and not Linux-2.6 */
|
||||
struct seq_file {
|
||||
char* buf; /* pointer to buffer (buf)*/
|
||||
size_t size; /* total buffer len (len)*/
|
||||
size_t from; /* total buffer len (offs)*/
|
||||
size_t count; /* offset into buffer (cnt)*/
|
||||
# if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__OpenBSD__)
|
||||
unsigned long index; /* iteration index*/
|
||||
# else
|
||||
loff_t index; /* iteration index*/
|
||||
# endif
|
||||
int stop_cnt;/* last stop offset*/
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
#if defined(WAN_BIG_ENDIAN) || (1)
|
||||
|
||||
/* We use BIG ENDIAN because
|
||||
RTP TAP needs to be transmitted
|
||||
BIG ENDIAN */
|
||||
|
||||
typedef struct {
|
||||
uint8_t cc:4; /* CSRC count */
|
||||
uint8_t x:1; /* header extension flag */
|
||||
uint8_t p:1; /* padding flag */
|
||||
uint8_t version:2; /* protocol version */
|
||||
uint8_t pt:7; /* payload type */
|
||||
uint8_t m:1; /* marker bit */
|
||||
uint16_t seq; /* sequence number */
|
||||
uint32_t ts; /* timestamp */
|
||||
uint32_t ssrc; /* synchronization source */
|
||||
} wan_rtp_hdr_t;
|
||||
|
||||
#else /* BIG_ENDIAN */
|
||||
|
||||
/* not used */
|
||||
|
||||
typedef struct {
|
||||
uint8_t version:2; /* protocol version */
|
||||
uint8_t p:1; /* padding flag */
|
||||
uint8_t x:1; /* header extension flag */
|
||||
uint8_t cc:4; /* CSRC count */
|
||||
uint8_t m:1; /* marker bit */
|
||||
uint8_t pt:7; /* payload type */
|
||||
uint16_t seq; /* sequence number */
|
||||
uint32_t ts; /* timestamp */
|
||||
uint32_t ssrc; /* synchronization source */
|
||||
} wan_rtp_hdr_t;
|
||||
|
||||
#endif
|
||||
|
||||
typedef struct wan_rtp_pkt {
|
||||
ethhdr_t eth_hdr;
|
||||
iphdr_t ip_hdr;
|
||||
udphdr_t udp_hdr;
|
||||
wan_rtp_hdr_t rtp_hdr;
|
||||
#define wan_eth_dest eth_hdr.w_eth_dest
|
||||
#define wan_eth_src eth_hdr.w_eth_src
|
||||
#define wan_eth_proto eth_hdr.w_eth_proto
|
||||
} wan_rtp_pkt_t;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#if (!defined __WINDOWS__)
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
|
||||
#define LINUX_HAS_NET_DEVICE_OPS
|
||||
#endif
|
||||
#endif
|
||||
|
||||
//#if defined(HAVE_NET_DEVICE_OPS) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
|
||||
#if defined(HAVE_NET_DEVICE_OPS) || defined(LINUX_HAS_NET_DEVICE_OPS)
|
||||
#define WAN_DECLARE_NETDEV_OPS(_ops_name) static struct net_device_ops _ops_name = {0};
|
||||
|
||||
#define WAN_NETDEV_OPS_BIND(dev,_ops_name) dev->netdev_ops = &_ops_name
|
||||
|
||||
#define WAN_NETDEV_OPS_INIT(dev,ops,wan_init) ops.ndo_init = wan_init
|
||||
#define WAN_NETDEV_OPS_OPEN(dev,ops,wan_open) ops.ndo_open = wan_open
|
||||
#define WAN_NETDEV_OPS_STOP(dev,ops,wan_stop) ops.ndo_stop = wan_stop
|
||||
#define WAN_NETDEV_OPS_XMIT(dev,ops,wan_send) ops.ndo_start_xmit = wan_send
|
||||
#define WAN_NETDEV_OPS_STATS(dev,ops,wan_stats) ops.ndo_get_stats = wan_stats
|
||||
#define WAN_NETDEV_OPS_TIMEOUT(dev,ops,wan_timeout) ops.ndo_tx_timeout = wan_timeout
|
||||
#define WAN_NETDEV_OPS_IOCTL(dev,ops,wan_ioctl) ops.ndo_do_ioctl = wan_ioctl
|
||||
#define WAN_NETDEV_OPS_MTU(dev,ops,wan_mtu) ops.ndo_change_mtu = wan_mtu
|
||||
#define WAN_NETDEV_OPS_CONFIG(dev,ops,wan_set_config) ops.ndo_set_config = wan_set_config
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,1,0)
|
||||
#define WAN_NETDEV_OPS_SET_MULTICAST_LIST(dev,ops,wan_multicast_list)
|
||||
#else
|
||||
#define WAN_NETDEV_OPS_SET_MULTICAST_LIST(dev,ops,wan_multicast_list) ops.ndo_set_multicast_list = wan_multicast_list
|
||||
#endif
|
||||
//#define WAN_CHANGE_MTU(dev) dev->netdev_ops->ndo_change_mtu
|
||||
//#define WAN_XMIT(dev) dev->netdev_ops->ndo_start_xmit
|
||||
//#define WAN_IOCTL(dev) dev->netdev_ops->ndo_do_ioctl
|
||||
#define WAN_NETDEV_TEST_XMIT(dev) dev->netdev_ops->ndo_start_xmit
|
||||
#define WAN_NETDEV_XMIT(skb,dev) dev->netdev_ops->ndo_start_xmit(skb,dev)
|
||||
#define WAN_NETDEV_TEST_IOCTL(dev) dev->netdev_ops->ndo_do_ioctl
|
||||
#define WAN_NETDEV_IOCTL(dev,ifr,cmd) dev->netdev_ops->ndo_do_ioctl(dev,ifr,cmd)
|
||||
#define WAN_NETDEV_TEST_MTU(dev) dev->netdev_ops->ndo_change_mtu
|
||||
#define WAN_NETDEV_CHANGE_MTU(dev,skb) dev->netdev_ops->ndo_change_mtu(dev,skb)
|
||||
|
||||
#else
|
||||
|
||||
#define WAN_DECLARE_NETDEV_OPS(_ops_name)
|
||||
#define WAN_NETDEV_OPS_BIND(dev,_ops_name)
|
||||
#define WAN_NETDEV_OPS_INIT(dev,ops,wan_init) dev->init = wan_init
|
||||
#define WAN_NETDEV_OPS_OPEN(dev,ops,wan_open) dev->open = wan_open
|
||||
#define WAN_NETDEV_OPS_STOP(dev,ops,wan_stop) dev->stop = wan_stop
|
||||
#define WAN_NETDEV_OPS_XMIT(dev,ops,wan_send) dev->hard_start_xmit = wan_send
|
||||
#define WAN_NETDEV_OPS_STATS(dev,ops,wan_stats) dev->get_stats = wan_stats
|
||||
#define WAN_NETDEV_OPS_TIMEOUT(dev,ops,wan_timeout) dev->tx_timeout = wan_timeout
|
||||
#define WAN_NETDEV_OPS_IOCTL(dev,ops,wan_ioctl) dev->do_ioctl = wan_ioctl
|
||||
#define WAN_NETDEV_OPS_MTU(dev,ops,wan_mtu) dev->change_mtu = wan_mtu
|
||||
#define WAN_NETDEV_OPS_CONFIG(dev,ops,wan_set_config) dev->set_config = wan_set_config
|
||||
#define WAN_NETDEV_OPS_SET_MULTICAST_LIST(dev,ops,wan_multicast_list) dev->set_multicast_list = wan_multicast_list
|
||||
//#define WAN_CHANGE_MTU(dev) dev->change_mtu
|
||||
//#define WAN_XMIT(dev) dev->hard_start_xmit
|
||||
//#define WAN_IOCTL(dev) dev->do_ioctl
|
||||
#define WAN_NETDEV_TEST_XMIT(dev) dev->hard_start_xmit
|
||||
#define WAN_NETDEV_XMIT(skb,dev) dev->hard_start_xmit(skb,dev)
|
||||
#define WAN_NETDEV_TEST_IOCTL(dev) dev->do_ioctl
|
||||
#define WAN_NETDEV_IOCTL(dev,ifr,cmd) dev->do_ioctl(dev,ifr,cmd)
|
||||
#define WAN_NETDEV_TEST_MTU(dev) dev->change_mtu
|
||||
#define WAN_NETDEV_CHANGE_MTU(dev,skb) dev->change_mtu(dev,skb)
|
||||
|
||||
#endif /* HAVE_NET_DEVICE_OPS */
|
||||
|
||||
#endif /* KERNEL */
|
||||
|
||||
#endif /* __WANPIPE_DEFINES_H */
|
|
@ -0,0 +1,225 @@
|
|||
/*
|
||||
* These are the public elements of the Linux DSP module.
|
||||
*/
|
||||
|
||||
#ifndef _WANPIPE_DSP_KERNEL_H
|
||||
#define _WANPIPE_DSP_KERNEL_H
|
||||
|
||||
/*
|
||||
* ******************************************************************
|
||||
* INCLUDES *
|
||||
* ******************************************************************
|
||||
*/
|
||||
#include <linux/if_wanpipe.h>
|
||||
#include <linux/wanpipe_cfg.h>
|
||||
#include "wanpipe_x25_kernel.h"
|
||||
|
||||
/*
|
||||
* ******************************************************************
|
||||
* DEFINES/MACROS *
|
||||
* ******************************************************************
|
||||
*/
|
||||
|
||||
/* DSP Messages */
|
||||
#define DSP_CALL_REQ_HOST_MSG 0x56
|
||||
#define DSP_CALL_REQ_TERM_MSG 0x57
|
||||
#define DSP_INV_TO_CLEAR_MSG 0x01
|
||||
#define DSP_CMD_RES_UNDELIVERED_MSG 0x10
|
||||
#define DSP_CMD_RES_ABORTED_MSG 0x11
|
||||
#define DSP_STATUS_MSG 0x12
|
||||
#define DSP_ACK_MSG 0x14
|
||||
#define DSP_CIRCUIT_ENABLED_MSG 0x20
|
||||
#define DSP_CIRCUIT_RESET_MSG 0x21
|
||||
#define DSP_CIRCUIT_REQUEST_MSG 0x22
|
||||
#define DSP_CIRCUIT_DISCONNECT_MSG 0x24
|
||||
|
||||
#define DSP_DATA_MSG 0x40
|
||||
#define DSP_DATA_ACK_MSG 0x41
|
||||
|
||||
|
||||
#define DSP_FALSE 0
|
||||
#define DSP_TRUE 1
|
||||
|
||||
#define DSP_OK 0
|
||||
|
||||
/* 'dsp_result' values */
|
||||
#define DSP_LINK_DOWN 0x01
|
||||
#define DSP_LINK_READY 0x02
|
||||
#define DSP_LINK_RESET 0x03
|
||||
|
||||
/* Options for 'DSP_pad' */
|
||||
#define DSP_HPAD 0x00
|
||||
#define DSP_TPAD 0x01
|
||||
|
||||
#define DSP_MAX_DATA 1024
|
||||
|
||||
#define DSP_CALL_STR_SZ 512
|
||||
|
||||
#ifndef DSP_PROT
|
||||
# define DSP_PROT 0x20
|
||||
#endif
|
||||
|
||||
/* Control Byte */
|
||||
#define DSP_CR_INC_INF_FOR_SE 0x01 /* Further information for session
|
||||
* establishment is contained in a
|
||||
* CIRCUIT REQEUST message
|
||||
*/
|
||||
#define DSP_SND_MULT_USER_CR 0x02 /* Sends a Multiple User Circuit
|
||||
* Request message.
|
||||
*/
|
||||
#define DSP_TT_SUPPORTS 0x04 /* Request is for a 3270 device that
|
||||
* supports Transparent Text.
|
||||
*/
|
||||
#define DSP_REQ_FOR_ASCII_DEV 0x08 /* Request is for an ASCII device.
|
||||
*/
|
||||
|
||||
/* Connection Request Mode */
|
||||
#define DSP_CRM_TYPE1 0x01 /* Referred to as fixed class */
|
||||
#define DSP_CRM_TYPE2 0x02 /* Referred to as specific class */
|
||||
#define DSP_CRM_TYPE3 0x03 /* Referred to as non-specific class */
|
||||
#define DSP_CRM_TYPE4 0x04 /* Referred to as associated class */
|
||||
|
||||
/*
|
||||
* *************
|
||||
* Reason Code *
|
||||
* *************
|
||||
*/
|
||||
/* Reason code for CIRCUIT_RESET */
|
||||
#define DSP_RC_RESET 0x00
|
||||
#define DSP_RC_DATA_ERROR 0x11
|
||||
/* Reason code for INVITATION_TO_CLEAR */
|
||||
#define DSP_RC_UNDEFINED 0x00
|
||||
#define DSP_RC_USER 0x01
|
||||
#define DSP_RC_INVALID_DQ_MSG 0x10
|
||||
#define DSP_RC_INVALID_STATE_TRANS 0x11
|
||||
#define DSP_RC_INVALID_DQ_FORMAT 0x12
|
||||
#define DSP_RC_INVALID_DATA_FORMAT 0x13
|
||||
#define DSP_RC_TIMEOUT 0x20
|
||||
#define DSP_RC_FACILITY_FAILURE 0x21
|
||||
|
||||
/*
|
||||
* ******************************************************************
|
||||
* ENUM/TYPEDEF/STRCTURE *
|
||||
* ******************************************************************
|
||||
*/
|
||||
enum {
|
||||
SIOC_DSP_PLACE_CALL = (SIOC_ANNEXG_PLACE_CALL),
|
||||
SIOC_DSP_CLEAR_CALL = (SIOC_ANNEXG_CLEAR_CALL),
|
||||
SIOC_DSP_API_RESERVED = (SIOC_WANPIPE_DEVPRIVATE),
|
||||
|
||||
SIOC_DSP_GET_CALL_DATA,
|
||||
SIOC_DSP_SET_CALL_DATA,
|
||||
|
||||
SIOC_DSP_ACCEPT_CALL,
|
||||
SIOC_DSP_RESET_CALL,
|
||||
SIOC_DSP_DEBUG,
|
||||
|
||||
SIOC_DSP_INVITATION_TO_CLEAR,
|
||||
SIOC_DSP_CIRCUIT_ENABLED,
|
||||
SIOC_DSP_CIRCUIT_RESET,
|
||||
SIOC_DSP_CIRCUIT_DISCONNECT,
|
||||
SIOC_DSP_CIRCUIT_REQUEST,
|
||||
SIOC_DSP_STATUS,
|
||||
SIOC_DSP_ACK,
|
||||
SIOC_DSP_CMD_RES_UNDELIVERED,
|
||||
SIOC_DSP_CMD_RES_ABORTED,
|
||||
|
||||
SIOC_DSP_SEND_DATA,
|
||||
SIOC_DSP_RECEIVE_DATA,
|
||||
|
||||
SIOC_DSP_SET_PID,
|
||||
SIOC_DSP_SET_LCN_LABEL
|
||||
};
|
||||
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
unsigned char dsp_pkt_type; /* DSP packet type */
|
||||
unsigned char dsp_resp; /* 1 - sending response */
|
||||
unsigned char dsp_user_cn; /* user circuit number */
|
||||
unsigned short dsp_length; /* Data length */
|
||||
unsigned short dsp_lcn;
|
||||
unsigned char dsp_result;
|
||||
union {
|
||||
unsigned char status; /* Status */
|
||||
unsigned char pad_type; /* PAD type */
|
||||
#if 0
|
||||
ALEX 10.4.2001
|
||||
ETX_ETB_ESC
|
||||
unsigned char et_byte; /* ET byte (1-ETX,0-ETB)*/
|
||||
#endif
|
||||
} dspapi_hdr_dspu1;
|
||||
union {
|
||||
struct {
|
||||
unsigned char src_cu_addr; /* Src Ctrl Unit addr */
|
||||
unsigned char src_dev_addr; /* Source Device addr */
|
||||
unsigned char ctrl_byte; /* control byte */
|
||||
unsigned char dev_info; /* Device information */
|
||||
unsigned char crm_type; /* Con. Request mode */
|
||||
} dspapi_hdr_dsppc1;
|
||||
unsigned char error_code; /* Sense byte */
|
||||
unsigned char reason_code; /* reason code */
|
||||
unsigned char transp; /* Transparent data */
|
||||
} dspapi_hdr_dspu2;
|
||||
union {
|
||||
struct {
|
||||
unsigned char dst_cu_addr; /* Dst Ctrl Unit addr */
|
||||
unsigned char dst_dev_addr; /* Dst Device addr */
|
||||
}dspapi_hdr_dsppc2;
|
||||
unsigned char sn; /* seq. num */
|
||||
unsigned char sense; /* Sense byte */
|
||||
}dspapi_hdr_dspu3;
|
||||
}dspapi_hdr_t;
|
||||
|
||||
#define dsp_status dspapi_hdr_dspu1.status
|
||||
#define dsp_pad_type dspapi_hdr_dspu1.pad_type
|
||||
#define dsp_et_byte dspapi_hdr_dspu1.et_byte
|
||||
|
||||
#define dsp_src_cu_addr dspapi_hdr_dspu2.dspapi_hdr_dsppc1.src_cu_addr
|
||||
#define dsp_src_dev_addr dspapi_hdr_dspu2.dspapi_hdr_dsppc1.src_dev_addr
|
||||
#define dsp_ctrl_byte dspapi_hdr_dspu2.dspapi_hdr_dsppc1.ctrl_byte
|
||||
#define dsp_dev_info dspapi_hdr_dspu2.dspapi_hdr_dsppc1.dev_info
|
||||
#define dsp_crm_type dspapi_hdr_dspu2.dspapi_hdr_dsppc1.crm_type
|
||||
#define dsp_error_code dspapi_hdr_dspu2.error_code
|
||||
#define dsp_reason_code dspapi_hdr_dspu2.reason_code
|
||||
#define dsp_data_transp dspapi_hdr_dspu2.transp
|
||||
|
||||
#define dsp_dst_cu_addr dspapi_hdr_dspu3.dspapi_hdr_dsppc2.dst_cu_addr
|
||||
#define dsp_dst_dev_addr dspapi_hdr_dspu3.dspapi_hdr_dsppc2.dst_dev_addr
|
||||
#define dsp_sense dspapi_hdr_dspu3.sense
|
||||
#define dsp_sn dspapi_hdr_dspu3.sn
|
||||
|
||||
typedef struct {
|
||||
dspapi_hdr_t hdr;
|
||||
char data[DSP_MAX_DATA];
|
||||
}dspapi_t;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
struct wanpipe_dsp_register_struct{
|
||||
unsigned char init;
|
||||
int (*dsp_bind_api)(struct net_device *master_dev, void *sk_id);
|
||||
};
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Return codes from interface commands
|
||||
* --------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
extern int register_wanpipe_dsp_protocol(struct wanpipe_dsp_register_struct*);
|
||||
extern void unregister_wanpipe_dsp_protocol(void);
|
||||
|
||||
extern int register_x25_dsp_protocol(struct x25_dsp_register_struct*);
|
||||
extern void unregister_x25_dsp_protocol(void);
|
||||
extern struct net_device* x25_get_svc_dev(struct net_device* master_dev);
|
||||
extern int x25_get_call_info(struct net_device* master_dev, unsigned short*, unsigned short*, unsigned short*);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/******************************************************************************
|
||||
* wanpipe_ec_kernel.h
|
||||
*
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2001 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __WANPIPE_EC_KERNEL_H
|
||||
# define __WANPIPE_EC_KERNEL_H
|
||||
|
||||
#if defined(__LINUX__)
|
||||
# include "wanpipe_tdm_api.h"
|
||||
#endif
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
typedef struct wanec_iface_
|
||||
{
|
||||
unsigned long init;
|
||||
|
||||
void* (*reg) (void*, u_int32_t, int, int, void*);
|
||||
int (*unreg) (void*, void*);
|
||||
|
||||
int (*ioctl) (void);
|
||||
int (*isr) (void*);
|
||||
int (*poll) (void*, void*);
|
||||
int (*event_ctrl) (void*, void*, wan_event_ctrl_t*);
|
||||
|
||||
} wanec_iface_t;
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#endif /* __WANPIPE_EC_KERNEL_H */
|
|
@ -0,0 +1,89 @@
|
|||
/* wanpipe_edac_iface.h */
|
||||
#ifndef __WANPIPE_EDAC_IFACE_H
|
||||
#define __WANPIPE_EDAC_IFACE_H
|
||||
|
||||
|
||||
#define WAN_TDMV_RX 0
|
||||
#define WAN_TDMV_TX 1
|
||||
|
||||
typedef struct wan_tdmv_pwr{
|
||||
unsigned int sum;
|
||||
unsigned int tap_depth;
|
||||
unsigned int tap_debug_counter;
|
||||
}wan_tdmv_pwr_t;
|
||||
|
||||
typedef struct _sample_state_t{
|
||||
int state;
|
||||
int forced_state;
|
||||
}sample_state_t;
|
||||
#define SAMPLE_STATE_HISTORY_LEN 3
|
||||
|
||||
typedef struct wan_tdmv_rxtx_pwr{
|
||||
wan_tdmv_pwr_t direction[2];
|
||||
/* of type ED_STATE */
|
||||
int sample_state[SAMPLE_STATE_HISTORY_LEN];
|
||||
//sample_state_t sample_state[SAMPLE_STATE_HISTORY_LEN];
|
||||
|
||||
unsigned int current_sample_number;
|
||||
|
||||
/* of type ED_STATE */
|
||||
int current_state;
|
||||
|
||||
/* see comment in ED code */
|
||||
int complete_samples_counter;
|
||||
|
||||
/* debugging stuff */
|
||||
unsigned int total_samples_number;
|
||||
/* current counters */
|
||||
unsigned int echo_present_samples_number;
|
||||
unsigned int echo_absent_samples_number;
|
||||
/* history counters */
|
||||
unsigned int echo_present_samples_number_history;
|
||||
unsigned int echo_absent_samples_number_history;
|
||||
}wan_tdmv_rxtx_pwr_t;
|
||||
|
||||
|
||||
typedef enum { ECHO_PRESENT, ECHO_ABSENT, INDETERMINATE, DOUBLE_TALK, NOT_USED } ED_STATE;
|
||||
|
||||
typedef enum { ECHO_DETECT_OFF, ECHO_DETECT_ON } ED_CONTROL_STATE;
|
||||
|
||||
typedef struct _echo_detect_struct{
|
||||
/* Used for reporting Echo Presence/Absence on a Asterisk CLI request. */
|
||||
ED_STATE echo_state;
|
||||
|
||||
/* Controls start/stop of ED algorithm. */
|
||||
ED_CONTROL_STATE echo_detection_state;
|
||||
ED_CONTROL_STATE echo_detection_state_old;
|
||||
|
||||
/* if 1 ED algorithm enabled for the channel */
|
||||
int ed_enabled;
|
||||
|
||||
/* debugging stuff */
|
||||
int echo_absent_samples_number;
|
||||
int echo_present_samples_number;
|
||||
|
||||
unsigned int last_rx_power;
|
||||
unsigned int last_tx_power;
|
||||
|
||||
}echo_detect_struct_t;
|
||||
|
||||
/*
|
||||
#define TDMV_SAMPLE_STATE_DECODE(state) \
|
||||
((state == ECHO_PRESENT) ? "ECHO_PRESENT" : \
|
||||
(state == ECHO_ABSENT) ? "ECHO_ABSENT" : \
|
||||
(state == INDETERMINATE) ? "INDETERMINATE" : "Invalid")
|
||||
*/
|
||||
#define TDMV_SAMPLE_STATE_DECODE(state) \
|
||||
((state == ECHO_PRESENT) ? "P" : \
|
||||
(state == ECHO_ABSENT) ? "A" : \
|
||||
(state == DOUBLE_TALK) ? "D" : \
|
||||
(state == INDETERMINATE) ? "I" : "Invalid")
|
||||
|
||||
extern int wp_tdmv_calc_echo (wan_tdmv_rxtx_pwr_t *pwr_rxtx,
|
||||
int is_mlaw,
|
||||
int channo,
|
||||
unsigned char* rxdata, unsigned char *txdata,
|
||||
int len);
|
||||
extern void init_ed_state(wan_tdmv_rxtx_pwr_t *pwr_rxtx, int echo_detect_chan);
|
||||
|
||||
#endif
|
|
@ -0,0 +1,208 @@
|
|||
/******************************************************************************
|
||||
* wanpipe_events.h
|
||||
*
|
||||
* Author: Alex Feldman <al.feldman@sangoma.com>
|
||||
*
|
||||
* Copyright: (c) 1995-2001 Sangoma Technologies Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
* ============================================================================
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __WANPIPE_EVENTS_H__
|
||||
# define __WANPIPE_EVENTS_H__
|
||||
|
||||
/* DTMF event tone type: present or stop */
|
||||
#define WAN_EC_TONE_PRESENT 0x01
|
||||
#define WAN_EC_TONE_STOP 0x02
|
||||
#define WAN_EC_DECODE_TONE_TYPE(type) \
|
||||
(type == WAN_EC_TONE_PRESENT) ? "Present" : \
|
||||
(type == WAN_EC_TONE_STOP) ? "Stop" : \
|
||||
"Unknown"
|
||||
|
||||
/* pcm law type (alaw or ulaw) */
|
||||
#define WAN_EC_PCM_U_LAW 0x01
|
||||
#define WAN_EC_PCM_A_LAW 0x02
|
||||
#define WAN_EC_DECODE_PCM_LAW(pcmlaw) \
|
||||
((pcmlaw) == WAN_EC_PCM_U_LAW) ? "ULAW" : \
|
||||
((pcmlaw) == WAN_EC_PCM_A_LAW) ? "ALAW" : "Unknown"
|
||||
|
||||
/* channel port (sout, rout, sin, rin) */
|
||||
#define WAN_EC_CHANNEL_PORT_SOUT 0x01
|
||||
#define WAN_EC_CHANNEL_PORT_SIN 0x02
|
||||
#define WAN_EC_CHANNEL_PORT_ROUT 0x04
|
||||
#define WAN_EC_CHANNEL_PORT_RIN 0x08
|
||||
#define WAN_EC_DECODE_CHANNEL_PORT(port) \
|
||||
((port) == WAN_EC_CHANNEL_PORT_SOUT) ? "SOUT" : \
|
||||
((port) == WAN_EC_CHANNEL_PORT_SIN) ? "SIN" : \
|
||||
((port) == WAN_EC_CHANNEL_PORT_ROUT) ? "ROUT" : \
|
||||
((port) == WAN_EC_CHANNEL_PORT_RIN) ? "RIN" : "Unknown"
|
||||
|
||||
#define WAN_EVENT_RXHOOK_OFF 0x01
|
||||
#define WAN_EVENT_RXHOOK_ON 0x02
|
||||
#define WAN_EVENT_RXHOOK_FLASH 0x03
|
||||
#define WAN_EVENT_RXHOOK_DECODE(hook) \
|
||||
((hook) == WAN_EVENT_RXHOOK_OFF) ? "Off-hook" : \
|
||||
((hook) == WAN_EVENT_RXHOOK_ON) ? "On-hook" : \
|
||||
((hook) == WAN_EVENT_RXHOOK_FLASH) ? "Flash-hook" : \
|
||||
"Unknown"
|
||||
|
||||
#define WAN_EVENT_RING_PRESENT 0x01
|
||||
#define WAN_EVENT_RING_STOP 0x02
|
||||
#define WAN_EVENT_RING_DECODE(ring) \
|
||||
((ring) == WAN_EVENT_RING_PRESENT) ? "Ring Present" : \
|
||||
((ring) == WAN_EVENT_RING_STOP) ? "Ring Stop" : \
|
||||
"Unknown"
|
||||
#define WAN_EVENT_RING_TRIP_PRESENT 0x01
|
||||
#define WAN_EVENT_RING_TRIP_STOP 0x02
|
||||
#define WAN_EVENT_RING_TRIP_DECODE(ring) \
|
||||
((ring) == WAN_EVENT_RING_TRIP_PRESENT) ? "RingTrip Present" : \
|
||||
((ring) == WAN_EVENT_RING_TRIP_STOP) ? "RingTrip Stop" : \
|
||||
"Unknown"
|
||||
/*Link Status */
|
||||
#define WAN_EVENT_LINK_STATUS_CONNECTED 0x01
|
||||
#define WAN_EVENT_LINK_STATUS_DISCONNECTED 0x02
|
||||
#define WAN_EVENT_LINK_STATUS_DECODE(status) \
|
||||
((status) == WAN_EVENT_LINK_STATUS_CONNECTED) ? "Connected" : \
|
||||
((status) == WAN_EVENT_LINK_STATUS_DISCONNECTED) ? "Disconnected" : \
|
||||
"Unknown"
|
||||
|
||||
/*FXO polarity Reversal */
|
||||
#define WAN_EVENT_POLARITY_REV_POSITIVE_NEGATIVE 0x01
|
||||
#define WAN_EVENT_POLARITY_REV_NEGATIVE_POSITIVE 0x02
|
||||
#define WAN_EVENT_POLARITY_REV_DECODE(status) \
|
||||
((status) == WAN_EVENT_POLARITY_REV_POSITIVE_NEGATIVE) ? "Positive to Negative" : \
|
||||
((status) == WAN_EVENT_POLARITY_REV_NEGATIVE_POSITIVE) ? "Negative to Positive" : \
|
||||
"Unknown"
|
||||
|
||||
#if defined(WAN_KERNEL)
|
||||
|
||||
#include "wanpipe_debug.h"
|
||||
#include "wanpipe_defines.h"
|
||||
#include "wanpipe_common.h"
|
||||
|
||||
/* Global Event defines */
|
||||
#define WAN_EVENT_ENABLE 0x01
|
||||
#define WAN_EVENT_DISABLE 0x02
|
||||
#define WAN_EVENT_MODE_DECODE(mode) \
|
||||
((mode) == WAN_EVENT_ENABLE) ? "Enable" : \
|
||||
((mode) == WAN_EVENT_DISABLE) ? "Disable" : \
|
||||
"(Unknown mode)"
|
||||
|
||||
/* Event type list */
|
||||
enum {
|
||||
WAN_EVENT_EC_DTMF = 1, /* WAN_EVENT_EC_TONE_DTMF */
|
||||
WAN_EVENT_RM_POWER ,
|
||||
WAN_EVENT_RM_LC ,
|
||||
WAN_EVENT_RM_RING_TRIP ,
|
||||
WAN_EVENT_RM_DTMF ,
|
||||
WAN_EVENT_TE_RBS ,
|
||||
WAN_EVENT_RM_RING ,
|
||||
WAN_EVENT_RM_TONE ,
|
||||
WAN_EVENT_RM_RING_DETECT ,
|
||||
WAN_EVENT_RM_TXSIG_START ,
|
||||
WAN_EVENT_RM_TXSIG_OFFHOOK ,
|
||||
WAN_EVENT_RM_TXSIG_ONHOOK ,
|
||||
WAN_EVENT_RM_TXSIG_KEWL ,
|
||||
WAN_EVENT_RM_ONHOOKTRANSFER ,
|
||||
WAN_EVENT_RM_SETPOLARITY ,
|
||||
WAN_EVENT_RM_SET_ECHOTUNE ,
|
||||
WAN_EVENT_EC_CHAN_MODIFY ,
|
||||
WAN_EVENT_EC_H100_REPORT ,
|
||||
WAN_EVENT_BRI_CHAN_LOOPBACK ,
|
||||
WAN_EVENT_LINK_STATUS ,
|
||||
WAN_EVENT_RM_POLARITY_REVERSE,
|
||||
WAN_EVENT_EC_FAX_DETECT ,
|
||||
WAN_EVENT_RM_SET_TX_GAIN ,
|
||||
WAN_EVENT_RM_SET_RX_GAIN ,
|
||||
WAN_EVENT_EC_FAX_1100 ,
|
||||
WAN_EVENT_EC_FAX_2100 ,
|
||||
WAN_EVENT_EC_FAX_2100_WSPR
|
||||
};
|
||||
|
||||
|
||||
#define WAN_EVENT_TYPE_DECODE(type) \
|
||||
((type) == WAN_EVENT_EC_DTMF) ? "EC DTMF" : \
|
||||
((type) == WAN_EVENT_RM_POWER) ? "RM Power Alarm" : \
|
||||
((type) == WAN_EVENT_RM_LC) ? "RM Loop Closure" : \
|
||||
((type) == WAN_EVENT_RM_RING_TRIP) ? "RM Ring Trip" : \
|
||||
((type) == WAN_EVENT_RM_DTMF) ? "RM DTMF" : \
|
||||
((type) == WAN_EVENT_TE_RBS) ? "TE RBS" : \
|
||||
((type) == WAN_EVENT_RM_RING) ? "RM Ring" : \
|
||||
((type) == WAN_EVENT_RM_TONE) ? "RM Tone" : \
|
||||
((type) == WAN_EVENT_RM_RING_DETECT) ? "RM Ring Detect" : \
|
||||
((type) == WAN_EVENT_RM_TXSIG_START) ? "RM TXSIG Start" : \
|
||||
((type) == WAN_EVENT_RM_TXSIG_OFFHOOK) ? "RM TXSIG Off-hook" : \
|
||||
((type) == WAN_EVENT_RM_TXSIG_ONHOOK) ? "RM TXSIG On-hook" : \
|
||||
((type) == WAN_EVENT_RM_TXSIG_KEWL) ? "RM TXSIG kewlfs" : \
|
||||
((type) == WAN_EVENT_RM_ONHOOKTRANSFER) ? "RM On-hook transfer" : \
|
||||
((type) == WAN_EVENT_RM_SETPOLARITY) ? "RM Set polarity" : \
|
||||
((type) == WAN_EVENT_RM_SET_ECHOTUNE) ? "RM Set echotune" : \
|
||||
((type) == WAN_EVENT_EC_CHAN_MODIFY) ? "EC Chan Modify" : \
|
||||
((type) == WAN_EVENT_BRI_CHAN_LOOPBACK) ? "BRI B-Chan Loopback" : \
|
||||
((type) == WAN_EVENT_LINK_STATUS) ? "Link Status" : \
|
||||
((type) == WAN_EVENT_RM_POLARITY_REVERSE) ? "RM Polarity Reverse" : \
|
||||
((type) == WAN_EVENT_EC_FAX_DETECT) ? "EC FAX Detect" : \
|
||||
((type) == WAN_EVENT_RM_SET_TX_GAIN) ? "RM Set Tx Gain" : \
|
||||
((type) == WAN_EVENT_RM_SET_TX_GAIN) ? "RM Set Rx Gain" : \
|
||||
((type) == WAN_EVENT_EC_FAX_1100) ? "EC FAX 1100" : \
|
||||
((type) == WAN_EVENT_EC_FAX_2100) ? "EC FAX 2100" : \
|
||||
((type) == WAN_EVENT_EC_FAX_2100_WSPR) ? "EC FAX 2100 WSPR" : \
|
||||
"(Unknown type)"
|
||||
|
||||
/* tone type list */
|
||||
#define WAN_EVENT_RM_TONE_TYPE_DIAL 0x01
|
||||
#define WAN_EVENT_RM_TONE_TYPE_BUSY 0x02
|
||||
#define WAN_EVENT_RM_TONE_TYPE_RING 0x03
|
||||
#define WAN_EVENT_RM_TONE_TYPE_CONGESTION 0x04
|
||||
#define WAN_EVENT_TONE_DECODE(tone) \
|
||||
((tone) == WAN_EVENT_RM_TONE_TYPE_DIAL) ? "Dial tone" : \
|
||||
((tone) == WAN_EVENT_RM_TONE_TYPE_BUSY) ? "Busy tone" : \
|
||||
((tone) == WAN_EVENT_RM_TONE_TYPE_RING) ? "Ring tone" : \
|
||||
((tone) == WAN_EVENT_RM_TONE_TYPE_CONGESTION) ? "Congestion tone" : \
|
||||
"(Unknown tone)"
|
||||
|
||||
/* Event information */
|
||||
typedef struct wan_event_
|
||||
{
|
||||
u_int16_t type;
|
||||
u_int8_t mode; /* Enable/Disable */
|
||||
u_int8_t channel; /* A200-mod_no, T1/E1-fe chan */
|
||||
unsigned char digit; /* TONE: digit, 'f' - for fax */
|
||||
unsigned char tone_type; /* TONE: PRESETN/STOP */
|
||||
unsigned char tone_port; /* TONE: ROUT/SOUT */
|
||||
|
||||
unsigned char rxhook; /* LC: OFF-HOOK or ON-HOOK */
|
||||
|
||||
unsigned char ring_mode; /* RingDetect: Present/Stop */
|
||||
unsigned char link_status; /* Link Status */
|
||||
unsigned char polarity_reverse; /*Polarity Reverse detection */
|
||||
unsigned int alarms;
|
||||
|
||||
} wan_event_t;
|
||||
|
||||
/* Event control */
|
||||
typedef struct wan_event_ctrl_
|
||||
{
|
||||
u_int16_t type;
|
||||
u_int8_t mode;
|
||||
int mod_no; /* A200-Remora */
|
||||
int channel;
|
||||
unsigned char ec_tone_port; /* EC Tone: SOUT or ROUT */
|
||||
unsigned long ts_map;
|
||||
u_int8_t tone;
|
||||
int ohttimer; /* On-hook transfer */
|
||||
int polarity; /* SETPOLARITY */
|
||||
signed int rm_gain; /* RM GAIN VALUE */
|
||||
#if !defined(__WINDOWS__)
|
||||
WAN_LIST_ENTRY(wan_event_ctrl_) next;
|
||||
#endif
|
||||
} wan_event_ctrl_t;
|
||||
|
||||
#endif /* WAN_KERNEL */
|
||||
|
||||
#endif /* __WANPIPE_EVENTS_H__ */
|
|
@ -0,0 +1,171 @@
|
|||
/***********************************************************
|
||||
* wanpipe_fr_iface.h Wanpipe Multi Protocol Interface
|
||||
*
|
||||
*
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _WANPIPE_FR_IFACE_H_
|
||||
#define _WANPIPE_FR_IFACE_H_
|
||||
|
||||
#ifdef WANLIP_DRIVER
|
||||
|
||||
#if 0
|
||||
typedef struct wp_fr_reg
|
||||
{
|
||||
int (*prot_set_state)(void* link_dev, int state, unsigned char *, int reason);
|
||||
int (*chan_set_state)(void* chan_dev, int state, unsigned char *, int reason);
|
||||
int (*tx_down) (void *, void *);
|
||||
int (*rx_up) (void *, void *, int);
|
||||
int mtu;
|
||||
}wp_fr_reg_t;
|
||||
#endif
|
||||
|
||||
#define wplist_insert_dev(dev, list) do{\
|
||||
dev->next = list;\
|
||||
list = dev;\
|
||||
}while(0)
|
||||
|
||||
#define wplist_remove_dev(dev,cur,prev,list)\
|
||||
do{\
|
||||
if ((cur=list) == dev){\
|
||||
list=cur->next;\
|
||||
break;\
|
||||
}else{\
|
||||
while (cur!=NULL && cur->next!=NULL){\
|
||||
prev=cur;\
|
||||
cur=cur->next;\
|
||||
if (cur==dev){\
|
||||
prev->next=cur->next;\
|
||||
break;\
|
||||
}\
|
||||
}\
|
||||
}\
|
||||
}while(0)
|
||||
|
||||
|
||||
|
||||
extern void *wp_register_fr_prot(void *link_ptr,
|
||||
char *devname,
|
||||
void *cfg,
|
||||
wplip_prot_reg_t *fr_reg);
|
||||
|
||||
extern int wp_unregister_fr_prot(void *prot_ptr);
|
||||
|
||||
extern void *wp_register_fr_chan(void *if_ptr,
|
||||
void *prot_ptr,
|
||||
char *devname,
|
||||
void *cfg,
|
||||
unsigned char type);
|
||||
|
||||
extern int wp_unregister_fr_chan(void *chan_ptr);
|
||||
|
||||
extern int wp_fr_open_chan (void *chan_ptr);
|
||||
extern int wp_fr_close_chan(void *chan_ptr);
|
||||
extern int wp_fr_ioctl (void *chan_ptr, int cmd, void *arg);
|
||||
|
||||
extern int wp_fr_rx (void * prot_ptr, void *rx_pkt);
|
||||
extern int wp_fr_timer (void *prot_ptr, unsigned int *period, unsigned int carrier_reliable);
|
||||
extern int wp_fr_tx (void * chan_ptr, void *skb, int type);
|
||||
extern int wp_fr_pipemon(void *chan, int cmd, int dlci, unsigned char* data, unsigned int *len);
|
||||
extern int wp_fr_snmp(void* chan_ptr, void* data);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* 'command' field defines */
|
||||
#define FR_WRITE 0x01
|
||||
#define FR_READ 0x02
|
||||
#define FR_ISSUE_IS_FRAME 0x03
|
||||
#define FR_SET_CONFIG 0x10
|
||||
#define FR_READ_CONFIG 0x11
|
||||
#define FR_COMM_DISABLE 0x12
|
||||
#define FR_COMM_ENABLE 0x13
|
||||
#define FR_READ_STATUS 0x14
|
||||
#define FR_READ_STATISTICS 0x15
|
||||
#define FR_FLUSH_STATISTICS 0x16
|
||||
#define FR_LIST_ACTIVE_DLCI 0x17
|
||||
#define FR_FLUSH_DATA_BUFFERS 0x18
|
||||
#define FR_READ_ADD_DLC_STATS 0x19
|
||||
#define FR_ADD_DLCI 0x20
|
||||
#define FR_DELETE_DLCI 0x21
|
||||
#define FR_ACTIVATE_DLCI 0x22
|
||||
#define FR_DEACTIVATE_DLCI 0x22
|
||||
#define FR_READ_MODEM_STATUS 0x30
|
||||
#define FR_SET_MODEM_STATUS 0x31
|
||||
#define FR_READ_ERROR_STATS 0x32
|
||||
#define FR_FLUSH_ERROR_STATS 0x33
|
||||
#define FR_READ_DLCI_IB_MAPPING 0x34
|
||||
#define FR_READ_CODE_VERSION 0x40
|
||||
#define FR_SET_INTR_MODE 0x50
|
||||
#define FR_READ_INTR_MODE 0x51
|
||||
#define FR_SET_TRACE_CONFIG 0x60
|
||||
#define FR_FT1_STATUS_CTRL 0x80
|
||||
#define FR_SET_FT1_MODE 0x81
|
||||
#define FR_LIST_CONFIGURED_DLCIS 0x82
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Statistics Block.
|
||||
* This structure is returned by the FR_READ_STATISTICS command when
|
||||
* dcli == 0.
|
||||
*/
|
||||
typedef struct fr_link_stat
|
||||
{
|
||||
unsigned short rx_too_long ; /* 00h: */
|
||||
unsigned short rx_dropped ; /* 02h: */
|
||||
unsigned short rx_dropped2 ; /* 04h: */
|
||||
unsigned short rx_bad_dlci ; /* 06h: */
|
||||
unsigned short rx_bad_format ; /* 08h: */
|
||||
unsigned short retransmitted ; /* 0Ah: */
|
||||
unsigned short cpe_tx_FSE ; /* 0Ch: */
|
||||
unsigned short cpe_tx_LIV ; /* 0Eh: */
|
||||
unsigned short cpe_rx_FSR ; /* 10h: */
|
||||
unsigned short cpe_rx_LIV ; /* 12h: */
|
||||
unsigned short node_rx_FSE ; /* 14h: */
|
||||
unsigned short node_rx_LIV ; /* 16h: */
|
||||
unsigned short node_tx_FSR ; /* 18h: */
|
||||
unsigned short node_tx_LIV ; /* 1Ah: */
|
||||
unsigned short rx_ISF_err ; /* 1Ch: */
|
||||
unsigned short rx_unsolicited ; /* 1Eh: */
|
||||
unsigned short rx_SSN_err ; /* 20h: */
|
||||
unsigned short rx_RSN_err ; /* 22h: */
|
||||
unsigned short T391_timeouts ; /* 24h: */
|
||||
unsigned short T392_timeouts ; /* 26h: */
|
||||
unsigned short N392_reached ; /* 28h: */
|
||||
unsigned short cpe_SSN_RSN ; /* 2Ah: */
|
||||
unsigned short current_SSN ; /* 2Ch: */
|
||||
unsigned short current_RSN ; /* 2Eh: */
|
||||
unsigned short curreny_T391 ; /* 30h: */
|
||||
unsigned short current_T392 ; /* 32h: */
|
||||
unsigned short current_N392 ; /* 34h: */
|
||||
unsigned short current_N393 ; /* 36h: */
|
||||
} fr_link_stat_t;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* DLCI statistics.
|
||||
* This structure is returned by the FR_READ_STATISTICS command when
|
||||
* dlci != 0.
|
||||
*/
|
||||
typedef struct fr_dlci_stat
|
||||
{
|
||||
unsigned int tx_frames ; /* 00h: */
|
||||
unsigned int tx_bytes ; /* 04h: */
|
||||
unsigned int rx_frames ; /* 08h: */
|
||||
unsigned int rx_bytes ; /* 0Ch: */
|
||||
unsigned int rx_dropped ; /* 10h: */
|
||||
unsigned int rx_inactive ; /* 14h: */
|
||||
unsigned int rx_exceed_CIR ; /* 18h: */
|
||||
unsigned int rx_DE_set ; /* 1Ch: */
|
||||
unsigned int tx_throughput ; /* 20h: */
|
||||
unsigned int tx_calc_timer ; /* 24h: */
|
||||
unsigned int rx_throughput ; /* 28h: */
|
||||
unsigned int rx_calc_timer ; /* 2Ch: */
|
||||
} fr_dlci_stat_t;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue