| .. |
|
xaxpybatched.cpp
|
Made buffers of batched routines read/write (was: read-only)
|
2017-10-17 19:56:47 +02:00 |
|
xaxpybatched.hpp
|
Make batched routines based on offsets instead of a vector of cl_mem objects - undoing many earlier changes
|
2017-03-08 20:10:20 +01:00 |
|
xcol2im.cpp
|
Add kernel_mode option to im2col, col2im, and convgemm functions
|
2018-11-12 10:12:07 +09:00 |
|
xcol2im.hpp
|
Add kernel_mode option to im2col, col2im, and convgemm functions
|
2018-11-12 10:12:07 +09:00 |
|
xconvgemm.cpp
|
Added convgemm to the CLBlast database, added initial parameters for Skylake GPU
|
2018-12-31 19:05:34 +01:00 |
|
xconvgemm.hpp
|
Fix xconvgemm kernel and enable ConvGemmMethod::kSingleKernel
|
2018-12-18 13:56:00 +09:00 |
|
xgemmbatched.cpp
|
Reduce TestMatrix calls for xgemmbatched.
|
2019-12-09 22:13:52 +02:00 |
|
xgemmbatched.hpp
|
Reduced duplicate code in the batched GEMM implementation
|
2018-01-06 19:26:11 +01:00 |
|
xgemmstridedbatched.cpp
|
Reduce TestMatrix calls for xgemmstridedbatched.
|
2019-12-09 22:17:24 +02:00 |
|
xgemmstridedbatched.hpp
|
Added API and tests for new GemmStridedBatched routine
|
2018-01-07 14:27:15 +01:00 |
|
xhad.cpp
|
Implemented the XHAD Hadamard product routine
|
2018-02-02 21:18:37 +01:00 |
|
xhad.hpp
|
Created the API and stubs for the HAD (hadamard-product) routines
|
2018-01-31 20:41:02 +01:00 |
|
xim2col.cpp
|
Add kernel_mode option to im2col, col2im, and convgemm functions
|
2018-11-12 10:12:07 +09:00 |
|
xim2col.hpp
|
Add kernel_mode option to im2col, col2im, and convgemm functions
|
2018-11-12 10:12:07 +09:00 |
|
xinvert.cpp
|
Fixes for Apple OpenCL CPU implementation which requires a LWGS of 1 when barriers are present
|
2018-06-01 20:59:44 +02:00 |
|
xinvert.hpp
|
Added a first version of the diagonal block invert routine in preparation of TRSM
|
2017-01-15 17:30:00 +01:00 |
|
xomatcopy.cpp
|
Routine, Cache: generalize, reduce amount of copying in fast path
|
2017-01-24 11:56:15 +03:00 |
|
xomatcopy.hpp
|
treewide: use C++ exceptions properly
|
2016-10-22 08:45:25 +03:00 |
21b66ca761