Commit graph

181 commits

Author SHA1 Message Date
Igor Mammedov 3984890181 pc: limit 64 bit hole to 2G by default
It turns out that some 32 bit windows guests crash
if 64 bit PCI hole size is >2G.
Limit it to 2G for piix and q35 by default.
User may override default 64-bit PCI hole size by
using "pci-hole64-size" property.

Examples:
-global i440FX-pcihost.pci-hole64-size=4G

-global q35-pcihost.pci-hole64-size=4G

Reported-by: Igor Mammedov <imammedo@redhat.com>,
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Message-id: 1375109277-25561-8-git-send-email-imammedo@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 19:33:34 -05:00
Vasilis Liaskovitis e8cd45c78f qdev: Add SIZE type to qdev properties
This patch adds a 'SIZE' type property to qdev.

Signed-off-by: Ian Molton <ian.molton@collabora.co.uk>
Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis@profitbricks.com>
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Message-id: 1375109277-25561-7-git-send-email-imammedo@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 19:33:33 -05:00
Michael S. Tsirkin f5338ee30d pc: move IO_APIC_DEFAULT_ADDRESS to include/hw/i386/ioapic.h
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Message-id: 1375109277-25561-2-git-send-email-imammedo@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 19:33:32 -05:00
Andreas Färber b67964d702 sysbus: QOM parent field cleanup for SysBusDevice
Rename the parent field and hide it from gtk-doc.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:07:03 +02:00
Andreas Färber 339104fe34 sysbus: Remove unused sysbus_new() prototype
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:07:02 +02:00
Andreas Färber f3d74d32e7 sysbus: Drop FROM_SYSBUS()
As a replacement, use your own macro based on OBJECT_CHECK().

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:07:02 +02:00
Andreas Färber 29d1ffc3d8 m48t59: QOM cast cleanup for M48t59SysBusState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:07:01 +02:00
Andreas Färber a0b97927e3 lm32_juart: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:28 +02:00
Andreas Färber 0ee10242fd lm32_juart: Relocate and tidy header
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:27 +02:00
Andreas Färber 81069b2054 escc: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:27 +02:00
Andreas Färber bcb7575068 pcie_port: Turn PCIEPort and PCIESlot into abstract QOM types
Move PCIEPort's "port" property to the new type, same for "aer_log_max".
Move PCIESlot's "chassis" and "slot" properties to the new type.

Reviewed-by: Don Koch <dkoch@verizon.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 20:45:24 +02:00
Andreas Färber f055e96bd4 pci-bridge: Turn PCIBridge into abstract QOM type
Introduce TYPE_PCI_BRIDGE as base type and use PCI_BRIDGE() casts.

Reviewed-by: Don Koch <dkoch@verizon.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
[AF: Updated pbm-bridge parent to TYPE_PCI_BRIDGE]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 20:44:47 +02:00
Anthony Liguori eddbf0ab9d Merge remote-tracking branch 'stefanha/block' into staging
# By Stefan Hajnoczi (4) and others
# Via Stefan Hajnoczi
* stefanha/block:
  dataplane: refuse to start if device is already in use
  dataplane: enable virtio-blk x-data-plane=on live migration
  migration: fix spice migration
  migration: notify migration state before starting thread
  block: Repair the throttling code.
  gluster: Add image resize support

Message-id: 1375112172-24863-1-git-send-email-stefanha@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 11:33:48 -05:00
Anthony Liguori 4ff1fac430 QOM CPUState refactorings
* Fix x86 cpu-add
 * Change KVM PMU behavior for 1.6
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.19 (GNU/Linux)
 
 iQIcBAABAgAGBQJR9ooSAAoJEPou0S0+fgE/+04QALXCQnbPGqIJNyAstf8TnOlH
 UzyyLzwnTpifwBDxk97PcCjpWKIoMozqMfyChKycTCvn2DIEKNV9QIGydmp1RXJF
 ILQGX3J8iBPDFGoGWGG41dPJPr1ELwA5An5OylrGnqoGq0u6tIv82Lr+UkDMSq24
 IgUo+dJbJ33qWH2dwB6ctcEZPtqfCseuGBmOoJNHiuYMHvH+G6Rcg+zAP5n8gFTV
 7cKDZ6xCZrAlZVADPUy2XO3PO7kDY3UTUWGvA2MqTjk7u1Hm5hOnY30QZrz4FVTm
 huR+AsDX0B6q5sSDKiZUSPHe0f1f7keGf4/YXOtVTHhANjoMg4NiJp4KMdVjZYmQ
 2zZRudktDEZ8eYmHIqCQ08ZH53D2zkpQ3fvr4hoTS5uDjH6x6pqKvQlcC5RbCDsn
 YZVxeD/NM/aRJb2N4Q4ihnNWMbHMZW6NMijYS7nk+SlU6iGb/7DR3YRgmKvfevtE
 WQVt26n+m+6avPGq+RIJZ9DxrYuESmz1qYFMjbH5deN8kdsHoLQfM1q7y8SJmTeI
 gXT1GVg25qzsmPa7t7nUWWleqn6kBoe9pHhb6xiIG5TNzXQyA+cPEqngxXDRYmxx
 HmSjWoRr0uMN3jVJqDXl9qjayDDGuZ7tiA4iOzhzw34yY3iNGU2QWNXM01ZFsd+5
 06MySKkf6PE94OxFiYo3
 =7lWx
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging

QOM CPUState refactorings

* Fix x86 cpu-add
* Change KVM PMU behavior for 1.6

# gpg: Signature made Mon 29 Jul 2013 10:28:18 AM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

# By Eduardo Habkost (2) and Andreas Färber (1)
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony:
  target-i386: Disable PMU CPUID leaf by default
  target-i386: Pass X86CPU object to cpu_x86_find_by_name()
  cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"
2013-07-29 11:33:34 -05:00
Marcel Apfelbaum 3d1237fb2a qemu-help: Sort devices by logical functionality
Categorize devices that appear as output to "-device ?" command
by logical functionality. Sort the devices by logical categories
before showing them to user.

The sort is done by functionality rather than alphabetical.

Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>
Message-id: 1375107465-25767-3-git-send-email-marcel.a@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:09 -05:00
Marcel Apfelbaum 949fc82314 hw: import bitmap operations in qdev-core header
Made small tweaks in code to prevent compilation issues
when importing qemu/bitmap.h in qdev-core

Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>
Message-id: 1375107465-25767-2-git-send-email-marcel.a@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:09 -05:00
Anthony Liguori c04d6cfa3f xics: rename types to be sane and follow coding style
Basically, in HW the layout of the interrupt network is:

     - One ICP per processor thread (the "presenter"). This contains the
    registers to fetch a pending interrupt (ack), EOI, and control the
    processor priority.

     - One ICS per logical source of interrupts (ie, one per PCI host
    bridge, and a few others here or there). This contains the per-interrupt
    source configuration (target processor(s), priority, mask) and the
    per-interrupt internal state.

    Under PAPR, there is a single "virtual" ICS ... somewhat (it's a bit
    oddball what pHyp does here, arguably there are two but we can ignore
    that distinction). There is no register level access. A pair of firmware
    (RTAS) calls is used to configure each virtual interrupt.

    So our model here is somewhat the same. We have one ICS in the emulated
    XICS which arguably *is* the emulated XICS, there's no point making it a
    separate "device", that would just be gross, and each VCPU has an
    associated ICP.

Yet we call the "XICS" struct icp_state and then the ICPs
'struct icp_server_state'.  It's particularly confusing when all of the
functions have xics_prefixes yet take *icp arguments.

Rename:

  struct icp_state -> XICSState
  struct icp_server_state -> ICPState
  struct ics_state -> ICSState
  struct ics_irq_state -> ICSIRQState

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Message-id: 1374175984-8930-12-git-send-email-aliguori@us.ibm.com
[aik: added ics_resend() on post_load]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:09 -05:00
Alexey Kardashevskiy e68cb8b4fa pseries: savevm support with KVM
At present, the savevm / migration support for the pseries machine will not
work when KVM is enabled.  That's because KVM manages the guest's hash page
table in the host kernel, so qemu has no visibility of it.  This patch
fixes this by using new kernel interfaces to extract and reinsert the
guest's hash table during the migration process.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Message-id: 1374175984-8930-11-git-send-email-aliguori@us.ibm.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:09 -05:00
David Gibson 1112cf94c8 pseries: savevm support for PCI host bridge
This adds the necessary support for saving the state of the PAPR virtual
PCI host bridge (or host bridges).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Message-id: 1374175984-8930-10-git-send-email-aliguori@us.ibm.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:09 -05:00
David Gibson 4be21d561d pseries: savevm support for pseries machine
This adds the necessary pieces to implement savevm / migration for the
pseries machine.  The most complex part here is migrating the hash
table - for the paravirtualized pseries machine the guest's hash page
table is not stored within guest memory, but externally and the guest
accesses it via hypercalls.

This patch uses a hypervisor reserved bit of the HPTE as a dirty bit
(tracking changes to the HPTE itself, not the page it references).
This is used to implement a live migration style incremental save and
restore of the hash table contents.

Normally a hash table is 16MB but it can get bigger depending on how
much RAM the guest has. Due to its nature, updates to it are random so
the live migration style is used for it.

In addition it adds VMStateDescription information to save and restore
the (few) remaining pieces of state information needed by the pseries
machine.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Message-id: 1374175984-8930-9-git-send-email-aliguori@us.ibm.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:08 -05:00
Anthony Liguori a83000f5e3 spapr-tce: make sPAPRTCETable a proper device
Model TCE tables as a device that's hooked up as a child object to
the owner.  Besides the code cleanup, we get a few nice benefits:

1) free actually works now (it was dead code before)

2) the TCE information is visible in the device tree

3) we can expose table information as properties such that if we
   change the window_size, we can use globals to keep migration
   working.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Message-id: 1374175984-8930-6-git-send-email-aliguori@us.ibm.com
[dwg: pseries: savevm support for PAPR TCE tables]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[alexey: ppc kvm: fix to compile]
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:08 -05:00
David Gibson b368a7d864 pseries: savevm support for VIO devices
This patch adds helpers to allow PAPR VIO devices to save state common
to all VIO devices during savevm.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Message-id: 1374175984-8930-3-git-send-email-aliguori@us.ibm.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:08 -05:00
Stefan Hajnoczi 84db52d059 dataplane: enable virtio-blk x-data-plane=on live migration
Although the dataplane thread does not cooperate with dirty memory
logging yet it's fairly easy to temporarily disable dataplane during
live migration.  This way virtio-blk can live migrate when
x-data-plane=on.

The dataplane thread will restart after migration is cancelled or if the
guest resuming virtio-blk operation after migration completes.

Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-07-29 17:19:07 +02:00
Eduardo Habkost 9337e3b6e1 target-i386: Disable PMU CPUID leaf by default
Bug description: QEMU currently gets all bits from GET_SUPPORTED_CPUID
for CPUID leaf 0xA and passes them directly to the guest. This makes
the guest ABI depend on host kernel and host CPU capabilities, and
breaks live migration if we migrate between hosts with different
capabilities (e.g., different number of PMU counters).

Add a "pmu" property to X86CPU, and set it to true only on "-cpu host",
or on pc-*-1.5 and older machine-types.

For now, setting pmu=on will enable the current passthrough mode that
doesn't have any ABI stability guarantees, but in the future we may
implement a mode where the PMU CPUID bits are stable and configurable.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 15:29:16 +02:00
Paul Durrant 8fbab3b62a Xen PV Device
Introduces a new Xen PV PCI device which will act as a binding point for
PV drivers for Xen.
The device has parameterized vendor-id, device-id and revision to allow to
be configured as a binding point for any vendor's PV drivers.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2013-07-29 11:13:44 +00:00
James Hogan 05b3274b6b hw/mips: align initrd to 64KB to avoid kernel error
The Linux kernel can be configured to use 64KB pages, but it also
requires initrd to be page aligned. Therefore, to be safe, align the
initrd to 64KB using a new INITRD_PAGE_MASK rather than
TARGET_PAGE_MASK.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29 00:27:35 +02:00
Paolo Bonzini 61fcb62862 isa_mmio: delete
It is not used anymore.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Message-id: 1374501278-31549-15-git-send-email-pbonzini@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25 08:12:27 -05:00
Andreas Färber caad4eb345 scsi: Improve error propagation for scsi_bus_legacy_handle_cmdline()
Let scsi_bus_legacy_add_drive() and scsi_bus_legacy_handle_cmdline()
return an Error**. Prepare qdev initfns for QOM realize error model.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23 00:37:35 +02:00
Hu Tao ce88812f57 q35: Use type-safe cast instead of direct access of parent dev
And remove variables if possible.

Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
[AF: Converted remaining access and renamed to parent_obj]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23 00:37:34 +02:00
Hu Tao ce7243986f sysbus: Document SysBusDeviceClass::init and realize semantics
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
[AF: Syntax and wording changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23 00:37:34 +02:00
Anthony Liguori 549c272b3c arm-devs queue
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABCAAGBQJR7RnMAAoJEDwlJe0UNgze9BQP/iuj/QKrw71vrMMCHlrzqjRc
 WXNaGkGHGaRw1r1X/XSiEqI3Ti2frHhsJ+annso4Q3forfGCbnB1Qaqvs/KzQW09
 KQBK3b2AZ9m4b35ZpZYpmbNaIS60XVV1VVB9tshXKJgyYObGlHRWj8MpepSrl3Rr
 texchdyNgZnqCS7Ep6oxzaR2bLqcr1Mi8+NG4dLJfw/z8BREPasQfxOYQoKxDVKV
 Cg2gd31ZAVzqJXtUuwdtkuM7JddfOnGk/MfDkZEBFhQ/fnRE5GSGYTuOHQp9hYdt
 bKnJbT0tqorP5+xg4dzVTqOJ+TsWm+ZfQrzQzkWSM34msYSoohCsF3/BA3xkF3/9
 6iE4ZfHrM6R/XO3A61NbtE9CvhFq9YsLPq7TcAAEzapBFXZlQAGCbZNJlGqn72p1
 XSTFwB02c2+gOXhhUtCwh0OKVbX79J99TQkBR1bEXr3C0yokxa0bIy7kJy+X2+vF
 NOMzoWhEteylZn18tvDfjPCXXzO4kJ8+3sYtvyYAWRadG1QcCq+8xMwUgcVQgmnM
 3TO2r+i4Cs+Ut9m6krW3P3ctL4cCoZj4bDqOu/8Fd7OVBK6u6LtXwej6LoiIDSPD
 3D2Bns65EhEZVucoObgNxG2h+JFLcLm3qRKY51VxD0lJh4Nn90jo317I43FHWONe
 HZZqqO8yPPf7LG/QGTzA
 =AvPS
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'pmaydell/tags/pull-arm-devs-20130722' into staging

arm-devs queue

# gpg: Signature made Mon 22 Jul 2013 06:38:52 AM CDT using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found

# By Peter Maydell (8) and Soren Brinkmann (2)
# Via Peter Maydell
* pmaydell/tags/pull-arm-devs-20130722:
  hw/arm: Use 'load_ramdisk()' for loading ramdisks w/ U-Boot header
  hw/loader: Support ramdisk with u-boot header
  vexpress: Add virtio-mmio transports
  vexpress: Make VEDBoardInfo extend arm_boot_info
  arm/boot: Allow boards to modify the FDT blob
  virtio: Implement MMIO based virtio transport
  virtio: Support transports which can specify the vring alignment
  virtio: Add support for guest setting of queue size
  arm/boot: Use qemu_devtree_setprop_sized_cells()
  device_tree: Add qemu_devtree_setprop_sized_cells() utility functions

Message-id: 1374493427-3254-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-22 10:14:24 -05:00
Soren Brinkmann 84aee0deae hw/loader: Support ramdisk with u-boot header
Introduce 'load_ramdisk()' which can load "normal" ramdisks and ramdisks
with a u-boot header.
To enable this and leverage synergies 'load_uimage()' is refactored to
accomodate this additional use case.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1373323202-17083-2-git-send-email-soren.brinkmann@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-22 12:00:56 +01:00
Peter Maydell 3b1cceb8b5 arm/boot: Allow boards to modify the FDT blob
Add a callback hook in arm_boot_info to allow board models to
modify the device tree blob if they need to. (The major expected
use case is to add virtio-mmio nodes for virtio-mmio transports
that exist in QEMU but not in the hardware.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1373977512-28932-7-git-send-email-peter.maydell@linaro.org
2013-07-19 12:58:47 +01:00
Peter Maydell 6ce69d1c77 virtio: Support transports which can specify the vring alignment
Support virtio transports which can specify the vring alignment
(ie where the guest communicates this to the host) by providing
a new virtio_queue_set_align() function. (The default alignment
remains as before.)

Transports which wish to make use of this must set the
has_variable_vring_alignment field in their VirtioBusClass
struct to true; they can then change the alignment via
virtio_queue_set_align().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1373977512-28932-5-git-send-email-peter.maydell@linaro.org
2013-07-19 12:58:46 +01:00
Peter Maydell e63c0ba1bc virtio: Add support for guest setting of queue size
The MMIO virtio transport spec allows the guest to tell the host how
large the queue size is. Add virtio_queue_set_num() function which
implements this in the QEMU common virtio support code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1373977512-28932-4-git-send-email-peter.maydell@linaro.org
2013-07-19 12:58:46 +01:00
Stefan Hajnoczi 9154b02c53 dataplane: sync virtio.c and vring.c virtqueue state
Load the virtio.c state into vring.c when we start dataplane mode and
vice versa when stopping dataplane mode.  This patch makes it possible
to start and stop dataplane any time while the guest is running.

This will eventually allow us to go back to QEMU main loop for
bdrv_drain_all() and live migration.  In the meantime, this patch makes
the dataplane lifecycle more robust but should make no visible
difference.  It may be useful in the virtio-net dataplane effort.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-07-19 12:29:21 +08:00
Anthony Liguori e9acb8cea9 pci,net,pc enhancements
This includes some fixes and enhancements that accumulated in my tree:
 pci fixes by dkoch, virtio-net enhancements by akong and mst,
 and a fix for xen pc by mst.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.13 (GNU/Linux)
 
 iQEcBAABAgAGBQJR5meNAAoJECgfDbjSjVRp24IIAMOkxbb85FJ323G/x5cQBzA/
 gjFDmvB6geIMBorX1YZRnIM+RFhx+mkXtBTu2raWVTNTt5G2u3vAQQWW2zSiOTBL
 gH4BhzJnUoqLHOydWql2MsGS7DMQo4Fq8OnzRBkZ119AEEqNMad1w2LykwFWs4ra
 k3bsPNCZM+ZNiLMWtQLOcD3FYvoiISinqFd81KOnxvDiT90rczk4dLWqjv8smNif
 WqZ7aCD1hGJ5yD7JI2YjCbhVvu4F7tBK+fWkT/O3oYslh/o241lyxUriOXMKdKML
 04sNXa5eWue9cOKlbo1G+yfFwFg1JDsAMe/Usg0KXz1MMK91wiWE763ESPbFBK0=
 =P+pr
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'mst/tags/for_anthony' into staging

pci,net,pc enhancements

This includes some fixes and enhancements that accumulated in my tree:
pci fixes by dkoch, virtio-net enhancements by akong and mst,
and a fix for xen pc by mst.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Wed 17 Jul 2013 04:44:45 AM CDT using RSA key ID D28D5469
# gpg: Can't check signature: public key not found

# By Don Koch (2) and others
# Via Michael S. Tsirkin
* mst/tags/for_anthony:
  pc: don't access fw cfg if NULL
  virtio-net: add feature bit for any header s/g
  net: add support of mac-programming over macvtap in QEMU side
  pci: fix BRDIGE typo
  pci-bridge: update mappings for migration/restore

Message-id: 1374054430-21966-1-git-send-email-mst@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18 08:12:47 -05:00
Michael S. Tsirkin 488f069bd1 virtio-net: add feature bit for any header s/g
Old qemu versions required that 1st s/g entry is the header.

Since QEMU 1.5, patchset titled "virtio-net: iovec handling cleanup"
removed this limitation but a feature bit is needed so guests know it's
safe to lay out header differently.

This patch applies on top and adds such a feature bit to QEMU.
It is set by default for virtio-net.
virtio net header inline with the data is beneficial
for latency and small packet bandwidth - guest driver
code utilizing this feature has been acked but missed 3.11
by a narrow margin, it's pending for 3.12.

This feature bit is cleared by default when compatibility with old
machine types is requested.

Other performance-sensitive devices (blk and scsi)
don't yet support arbitrary s/g layouts, so
we only set this bit for virtio-net for now.
There are plans to allow arbitrary layouts there, but
no code has been posted yet.

Cc: Rusty Russell <rusty@rustcorp.com.au>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-15 21:26:26 +03:00
Alexander Graf 80fc95d8bd PPC: dbdma: Support unaligned DMA access
The DBDMA engine really just reads bytes from a producing device (IDE
in our case) and shoves these bytes into memory. It doesn't care whether
any alignment takes place or not.

Our code today however assumes that block accesses always happen on
sector (512 byte) boundaries. This is a fair assumption for most cases.

However, Mac OS X really likes to do unaligned, incomplete accesses
that it finishes with the next DMA request.

So we need to read / write the unaligned bits independent of the actual
asynchronous request, because that one can only handle 512-byte-aligned
data. We also need to cache these unaligned sectors until the next DMA
request, at which point the data might be successfully flushed from the
pipe.

Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-11 18:51:25 +02:00
Alexander Graf 03ee3b1e58 PPC: dbdma: Move processing to io
Soon we will introduce intermediate processing pauses which will
allow the bottom half to restart a DMA request that couldn't be
fulfilled yet.

For that to work, move the processing variable into the io struct
which is what DMA providers work with.

While touching it, also change it into a bool

Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-11 18:51:25 +02:00
Alexander Graf d2f0ce2189 PPC: dbdma: Move static bh variable to device struct
The DBDMA controller has a bottom half to asynchronously process DMA
request queues.

This bh was stored as a gross static variable. Move it into the device
struct instead.

While at it, move all users of it to the new generic kick function.

Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-11 18:51:24 +02:00
Alexander Graf d1e562deb2 PPC: dbdma: Introduce kick function
The DBDMA engine really is running all the time, waiting for input. However
we don't want to waste cycles constantly polling.

So introduce a kick function that data providers can call to notify the
DBDMA controller of new input.

Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-11 18:51:24 +02:00
Alexander Graf f2f963fd07 PPC: dbdma: Move defines into header file
We usually keep struct and constant definitions in header files. Move
them there to stay consistent and to make access to fields easier.

Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-11 18:51:24 +02:00
Don Koch 4268b09627 pci: fix BRDIGE typo
Fix typo in macro name: PCI_CLASS_BRDIGE_PCI_INF_SUB.

Signed-off-by: Don Koch <dkoch@verizon.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-10 12:49:33 +03:00
Don Koch e78e9ae4a9 pci-bridge: update mappings for migration/restore
Fix for LP#1187529: Devices on PCI bridge stop working when
live-migrated. Update bridge mappings for all PCI bridge
devices in get_pci_config_device().

Signed-off-by: Don Koch <dkoch@verizon.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-10 12:49:26 +03:00
Andreas Färber 2b927571cc intc/openpic: Build openpic only once
Since current_cpu is CPUState it no longer depends on CPUPPCState.

Move ppce500_set_mpic_proxy() to a new hw/ppc/ppc_e500.h because
hw/ppc/ppc.h is too heavily using CPUPPCState and PowerPCCPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09 21:33:02 +02:00
Anthony Liguori dc11549ec2 pci,misc enhancements
This includes some pci enhancements:
 
 Better support for systems with multiple PCI root buses
 FW cfg interface for more robust pci programming in BIOS
 Minor fixes/cleanups for fw cfg and cross-version migration -
     because of dependencies with other patches
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.13 (GNU/Linux)
 
 iQEcBAABAgAGBQJR2ctmAAoJECgfDbjSjVRpQpAH/Rk00yLrQ2R5ScNa8AL9LeaJ
 gVFndBmmuRz4gdhyATx6lzR98ic32iTr0+YR5mL51btgmM5a0bEd/SIu34nXriWj
 PsM0wdXfo/oEygdttxhvzJOH17tohRV9xg2WA2d8BEwDzrDyqoQ4J0VJlHlG7u3W
 nq4KVDVUpLNQFKG8ZgJ2vW0WMw/mBSj2rluhQUALhcuvChphtvAFZ2rsSfJr6bzD
 aBELrtIvfLvPGN/0WVeYs9qlp4EE03H3X6gN61QvV3/YElxubKUV5XyMDOX2dW3D
 2j0NQi84LYHn0SFap2r/Kgm47/F6Q56SFk5lrgZrg60mhQTwocw7PfL8CGxjXRI=
 =gxxc
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'mst/tags/for_anthony' into staging

pci,misc enhancements

This includes some pci enhancements:

Better support for systems with multiple PCI root buses
FW cfg interface for more robust pci programming in BIOS
Minor fixes/cleanups for fw cfg and cross-version migration -
    because of dependencies with other patches

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Sun 07 Jul 2013 03:11:18 PM CDT using RSA key ID D28D5469
# gpg: Can't check signature: public key not found

# By David Gibson (10) and others
# Via Michael S. Tsirkin
* mst/tags/for_anthony:
  pci: Fold host_buses list into PCIHostState functionality
  pci: Remove domain from PCIHostBus
  pci: Simpler implementation of primary PCI bus
  pci: Add root bus parameter to pci_nic_init()
  pci: Add root bus argument to pci_get_bus_devfn()
  pci: Replace pci_find_domain() with more general pci_root_bus_path()
  pci: Use helper to find device's root bus in pci_find_domain()
  pci: Abolish pci_find_root_bus()
  pci: Move pci_read_devaddr to pci-hotplug-old.c
  pci: Cleanup configuration for pci-hotplug.c
  pvpanic: fix fwcfg for big endian hosts
  pvpanic: initialization cleanup
  MAINTAINERS: s/Marcelo/Paolo/
  e1000: cleanup process_tx_desc
  pc_piix: cleanup init compat handling
  pc: pass PCI hole ranges to Guests
  pci: store PCI hole ranges in guestinfo structure
  range: add Range structure

Message-id: 1373228271-31223-1-git-send-email-mst@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-08 08:00:23 -05:00
David Gibson 7588e2b055 pci: Fold host_buses list into PCIHostState functionality
The host_buses list is an odd structure - a list of pointers to PCI root
buses existing in parallel to the normal qdev tree structure.  This patch
removes it, instead putting the link pointers into the PCIHostState
structure, which have a 1:1 relationship to PCIHostBus structures anyway.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-07 23:10:57 +03:00
David Gibson 29b358f93a pci: Add root bus parameter to pci_nic_init()
At present, pci_nic_init() and pci_nic_init_nofail() assume that they will
only create a NIC under the primary PCI root.  As we add support for
multiple PCI roots, that may no longer be the case.  This patch adds a root
bus parameter to pci_nic_init() (and updates callers accordingly) to allow
the machine init code using it to specify the right PCI root for NICs
created by old-style -net nic parameters.  NICs created new-style, with
-device can of course be put anywhere.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-07 23:10:57 +03:00
David Gibson 85c6e4fabb pci: Add root bus argument to pci_get_bus_devfn()
pci_get_bus_devfn() interprets a full PCI address string to give a PCIBus *
and device/function number within that bus.  Currently it assumes it is
working on an address under the primary PCI root bus.  This patch extends
it to allow the caller to specify a root bus.  This might seem a little odd
since the supplied address can (theoretically) include a PCI domain number.
However, attempting to use a non-zero domain number there is currently an
error, so that shouldn't really cause problems.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-07 23:10:57 +03:00